SiGe器件及其研究综述

阐述了ＳｉＧｅ器件的主要研究方向以及国内外对ＳｉＧｅ材料和器件的研究情况,并对ＳｉＧｅ器件与Ｓｉ器件和ＧａＡｓ器件的发展前景进行了比较。     

Delay time measurement in transition metal oxide glass devices

The switching delay times for transition metal oxide glass devices vary from operation to operation. However, a statistical treatment of delay time measurements has revealed the voltage dependence of the delay times and the existence of a well-defined threshold voltage for all of the devices tested. The effect of the switch-OFF history on the performance of the devices has also been investigated. Measurements of the transition metal oxide devices are compared with similar work on chalcogenide devices.     

Flexible devices: from materials,architectures to applications

Flexible devices,such as flexible electronic devices and flexible energy storage devices,have attracted a significant amount of attention in recent years for their potential applications in modem human lives.The development of flexible devices is moving forward rapidly,as the innovation of methods and manufacturing processes has greatly encouraged the research of flexible devices.This review focuses on advanced materials,architecture designs and abundant applications of flexible devices,and discusses the problems and challenges in current situations of flexible devices.We summarize the discovery of novel materials and the design of new architectures for improving the performance of flexible devices.Finally,we introduce the applications of flexible devices as key components in real life.     

基于材料填充的可调光子晶体光纤器件

详细阐述了最近几年基于材料填充的可调光子晶体光纤器件的研究进展,以及发展可调光子晶体器件的重要意义。并根据调制方法的不同,进行了归类介绍：热调器件,电调器件,光调器件。对基于材料填充的可调光子晶体光纤器件的前景进行了展望。     

基于金属表面等离子体的光学器件

基于金属表面等离子体的光学器件受到了越来越多的关注.简述了金属表面等离子体的特性,介绍了几种基于金属表面等离子体的光学器件,并讨论了此类器件的发展和应用前景.     

InP基RTD/HEMT集成的几个关键工艺研究

用MBE设备在半绝缘的InP衬底上依次生长高电子迁移率晶体管(HEMT)外延材料和共振遂穿二极管(RTD)外延材料,在此材料结构基础上研究和分析了RTD与HEMT器件单片集成工艺中的隔离工艺、欧姆接触工艺、HEMT栅挖槽工艺和空气桥工艺等几步关键工艺,给出了这些工艺的相关参数。利用上述工艺成功地制作了RTD和HEMT器件,并在室温下分别测试了RTD器件和HEMT器件的电学特性。测试表明:在室温下,RTD器件的峰电流密度与谷电流密度之比(PVCR)为3.66;HEMT器件的最大跨导约为370 mS/mm,在Vds=1.5 V时的饱和电流约为391 mA/mm。这将为RTD与HEMT的单片集成研究奠定工艺基础。     

Parametric macromodels of differential drivers and receivers

This paper addresses the modeling of differential drivers and receivers for the analog simulation of high-speed interconnection systems. The proposed models are based on mathematical expressions, whose parameters can be estimated from the transient responses of the modeled devices. The advantages of this macromodeling approach are: improved accuracy with respect to models based on simplified equivalent circuits of devices; improved numerical efficiency with respect to detailed transistor-level models of devices; hiding of the internal structure of devices; straightforward circuit interpretation; or implementations in analog mixed-signal simulators. The proposed methodology is demonstrated on example devices and is applied to the prediction of transient waveforms and eye diagrams of a typical low-voltage differential signaling (LVDS) data link.     

Merged CMOS/bipolar technologies utilizing zone-melting-recrystallized SOI films

Two merged CMOS/bipolar technologies utilizing SOI structures have been demonstrated. In each case a single sequence of processing steps was used to fabricate fully isolated CMOS devices and vertical bipolar transistors on the same Si wafer. The CMOS devices were fabricated in zone-melting-recrystallized SOI film, while the bipolar devices were fabricated either in the SOI film or in epitaxial Si layers grown selectively on the Si substrate. Good electrical characteristics were obtained for the CMOS devices and for both SOI and epitaxial bipolar devices.     

F注入AlGaN/GaN增强型HEMT

The fabrication of enhancement-mode AlGaN/GaN HEMTs by fluorine plasma treatment on sapphire substrates is reported. A new method is used to fabricate devices with different fluorine plasma RF power treatments on one wafer to avoid differences between different wafers. The plasma-treated gate regions of devices treated with different fluorine plasma RF powers were separately opened by a step-and-repeat system. The properties of these devices are compared and analyzed. The devices with 150 W fluorine plasma treatment power and with 0.6 μm gate-length exhibited a threshold voltage of 0.57 V, a maximum drain current of 501 mA/mm, a maximum transconductance of 210 mS/mm, a current gain cutoff frequency of 19.4 GHz and a maximum oscillation frequency of 26 GHz. An excessive fluorine plasma treatment power of 250 W results in a small maximum drain current, which can be attributed to the implantation of fluorine plasma in the channel.     

Enhanced operation and retention characteristics in charge-trapping flash memory device with a novel Si/Ge super-lattice channel

Charge-trapping flash memory devices with super-lattice channels having different stacking structures and thicknesses of Ge top-layer are investigated in this work. Both programming and erasing speeds are significantly improved for devices with super-lattice channels. Programming speed increases with increasing thickness of Ge layer in the super-lattice channel. The enhancement on programming speed can be achieved up to 40 times or better. For devices with Ge top-layer on super-lattice channel, a further enhancement is observed with increasing Ge thickness. The retention characteristic of devices with super-lattice channel is better than that with Si-channel devices owing to the slightly increased thickness of tunneling oxide.     

数字信息时代的显示器件

本文简要介绍了目前显示器件的技术发展特点。随着数字信息技术的迅速发展，显示器件已经呈现出向越来越小和越来越大的两个不同应用方向。因此，无论是适用于手机和PDA的小型显示器件，还是适用于壁挂影视图像的大型显示器件，都对当今的电子显示器件提出不同的技术要求。本文通过对技术特征的分析和比较，探讨了显示器件的未来发展趋势。     

RTD与PHEMT集成的几个关键工艺

在新型的共振隧穿二极管(RTD)器件与PHEMT器件单片集成材料结构上，研究和分析了分立器件的制作工艺，给出了分立器件的制作工艺参数．利用上述工艺成功制作了RTD和PHEMT器件，并在室温下分别测试了RTD器件和PHEMT器件的电学特性．测试表明：在室温下，RTD器件的峰电流密度与谷电流密度之比提高到1.78;PHEMT器件的最大跨导约为120mS/mm,在Vgs＝0.5V时的饱和电流约为270mA/mm．这将为RTD集成电路的研制奠定工艺基础．     

Enhanced electron trapping in reoxidized nitrided oxide dielectricat 77 K

The results of experiments on the electron trapping effect in ONO devices at cryogenic temperature are presented and compared with results for SiO₂ devices. Various types of ONO devices are used in the experiment in order to determine the mechanism of enhanced electron trapping phenomena in these devices     

共振隧穿器件概述——共振隧穿器件讲座(1)

通过对共振隧穿器件的特点、分类、工作原理、电流成分、器件参数等的介绍,为初学人员或非专业爱好人员提供一个对共振隧穿器件全面的、概括性的认识。     

Deuterium passivation of interface traps in MOS devices

The mechanism for deuterium passivation of interface traps in MOS devices is studied. Normal channel hot electron (CHE) stress was performed on hydrogen-passivated devices to locally desorb hydrogen from the interface at the drain region. The stressed devices were annealed in deuterium at 400°C, resulting in a full recovery of device characteristics. These devices were then subjected to CHE stress again in two modes. Some of them were stressed in the normal mode while others were stressed in the reverse mode in which the source and drain were interchanged. Compared with hydrogenated devices, these deuterated devices under the normal stress exhibit a significant reduction in interface trap generation and threshold voltage shift. In contrast, insignificant reliability improvement was observed for the reverse stress case. The asymmetric degradation behaviors on these deuterated devices suggest that the effectiveness of implementing deuterium to improve device reliability is limited by its replacement of pre-existing hydrogen at the oxide/silicon interface     

A comparison of semiconductor devices for high-speed logic

The bipolar transistor and FET are compared, considering both today's most advanced implementations and "ultimate" scaled-down devices. The differences between the devices are quantified in terms of transconductance and intrinsic speed. Old limits are re-examined and ways of extending the devices toward their ultimate in performance are proposed. While the major emphasis is on silicon, a comparison is made with the GaAs MESFET. Other semiconductor devices are discussed in the context of "bipolar-like" and "FET-like" devices, and the HEMT is considered a very promising candidate for high-speed logic. While Josephson junction logic is not discussed at length, it is a continual point of reference. In addition to comparing devices, the on-chip wiring environment is discussed, especially concerning its impact on power-delay products.     

无铅器件逆向转化有铅器件工艺

通过对有铅焊料与无铅器件混用的工艺性问题与质量问题进行分析,论述了无铅器件逆向转化为有铅器件的必要性;介绍了无铅器件焊端材料以及对逆向转化工艺的影响;提出并重点论述了有引线无铅器件、无引线无铅器件和球形焊端无铅器件逆向转化为有铅器件的工艺方法.     

Surface Plasmonic‐Assisted Photocatalysis and Optoelectronic Devices with Noble Metal Nanocrystals: Design,Synthesis, and Applications

The surface plasmon resonance (SPR) of noble metals is known to improve the efficiency of various processes and devices. The photocatalytic process is the production of fuels and storage of solar photons in chemical bonds without imposing harmful threats to the environment. Photovoltaics are other devices utilizing solar energy for electrical energy. Similarly, other optoelectronic devices like photodetectors absorb photons and convert it into charges via electron–hole dissociation processes. In contrast, light‐emitting optoelectronic devices work based on the phenomenon of charge recombination to produce light. All these devices, however, have efficiency limitations, which impede the application of novel functional materials in these devices. A more direct approach is the utilization of noble metals and their complexes, which significantly enhance the efficiencies of these devices by SPR. This article highlights recent works and applications of noble metals by SPR‐enhanced photocatalysis for hydrogen evolution from water, CO₂ conversion into useful compounds, and oxidation of hazardous pollutants. In addition, the plasmon‐enhancement of optoelectronic devices is summarized. Several possible mechanisms that have been previously reported in the literature are discussed in this work, with particular emphasis on different features of these mechanisms involving devices that are not highlighted and therefore need more attention.     

Digital CMOS IC's in 6H-SiC operating on a 5-V power supply

A CMOS technology in 6H-SiC utilizing an implanted p-well process is developed. The p-wells are fabricated by implanting boron ions into an n-type epilayer. PMOS devices are fabricated on an n-type epilayer while the NMOS devices are fabricated on implanted p-wells using a thermally grown gate oxide. The resulting NMOS devices have a threshold voltage of 3.3 V while the PMOS devices have a threshold voltage of -4.2 V at room temperature. The effective channel mobility is around 20 cm ²/Vs for the NMOS devices and around 7.5 cm²/Vs for the PMOS devices. Several digital circuits, such as inverters, NAND's, NOR's, and 11-stage ring oscillators are fabricated using these devices and exhibited stable operation at temperatures ranging from room temperature to 300°C. These digital circuits are the first CMOS circuits in 6H-SiC to operate with a 5-V power supply for temperatures ranging from room temperature up to 300°C     

Electron bombarded semiconductor devices

The first electron bombarded semiconductor (EBS) devices have recently appeared on the market. These devices have already demonstrated that EBS has considerable promise as an important new electron device for power amplification and control. EBS devices are described with particular emphasis on power devices. The basic EBS principle, some of the analysis used in device design, general considerations in designing the various elements of the device, overall device design, semiconductor processing, and reliability considerations are discussed. Predictions of general directions for future work are made. Some historical information is also presented as well as a brief comparison with other competing power devices.