Study of NiSi/Si Interface by Cross-Section Transmission Electron Microscopy

采用不同硅化工艺制备了NiSi薄膜并用剖面透射电镜(XTEM)对样品的NiSi/Si界面进行了研究.在未掺杂和掺杂(包括As和B)的硅衬底上通过物理溅射淀积Ni薄膜,经快速热处理过程(RTP)完成硅化反应.X射线衍射和喇曼散射谱分析表明在各种样品中都形成了NiSi.还研究了硅衬底掺杂和退火过程对NiSi/Si界面的影响.研究表明:使用一步RTP形成NiSi的硅化工艺,在未掺杂和掺As的硅衬底上,NiSi/Si界面较粗糙;而使用两步RTP形成NiSi所对应的NiSi/Si界面要比一步RTP的平坦得多.高分辨率XTEM分析表明,在所有样品中都形成了沿衬底硅〈111〉方向的轴延-NiSi薄膜中的一些特定晶面与衬底硅中的(111)面对准生长.同时讨论了轴延中的晶面失配问题.     

Pt层对Ni/Si(100)固相反应NiSi薄膜高温稳定性的增强效应

研究了顺次淀积在Si(100)衬底上的Ni/Pt和Pt/Ni的固相硅化反应．研究发现,当1nm Pt作为中间层或覆盖层加入Ni/Si体系中时,延缓了NiSi向NiSi2的转变,相变温度提高．对于这种双层薄膜体系,800℃退火后,XRD测试未检测到NiSi2相存在;850℃退火后的薄膜仍有一些NiSi衍射峰存在．800℃退火后的薄膜呈现较低的电阻率,在23—25μΩ*cm范围．上述薄膜较Ni/Si直接反应生成膜的热稳定性提高了100℃以上．这有利于NiSi薄膜材料在Si基器件制造中的应用．     

SiOx调制的三元硅化物(C01-xNix)Si2外延

报道了通过Co/Ni/SiOx/Si(100)体系固相反应,实现三元硅化物(Co1xNix)Si2薄膜外延生长及薄膜特性的表征.测试结果表明,中间氧化硅层对原子扩散起到阻挡作用.XRD和RBS图谱显示,有中间层的样品所形成的硅化物膜和硅衬底有良好的外延关系.而Co/Ni/Si(100)体系,则形成多晶硅化物膜,和硅衬底没有外延关系.外延三元硅化物(Co1-xNix)Si2膜的晶格常数介于CoSi2和NiSi2之间,从而可以降低生成膜的应力.薄膜的厚度约为110nm;最小沟道产额(Xmin)为22%.外延三元硅化物膜的电阻率约为17μΩ@cm;高温稳定性达1000C,与CoSi2膜相当.     

碳注入对 Ni0.95(Pt0.05)Si热稳定性影响探究

在两步快速热退火硅化之前,对硅衬底进行不同剂量的碳注入,以此探究碳对Ni0.95(Pt0.05)Si薄膜热稳定性的影响。与没有碳注入的比起来,1e15 cm-2和3e15 cm-2碳剂量注入得到的Ni0.95(Pt0.05)Si薄膜热稳定性分别被改善了100 oC和150 oC。通过方块电阻测量,XRD物相分析和SEM图像对比发现,沉淀在Ni0.95(Pt0.05)Si晶界处和Ni0.95(Pt0.05)Si/Si的界面处的碳原子是Ni0.95(Pt0.05)Si薄膜热稳定性提高的原因,而且碳的注入还在一定程度上改变了硅化反应中NiSi晶粒生长的择优取向。这些发现对Ni0.95(Pt0.05)Si:C材料的应用都将很有意义。     

CeO2高K栅介质薄膜的制备工艺及其电学性质

研究了CeO2作为高K(高介电常数)栅介质薄膜的制备工艺,深入分析了衬底温度、淀积速率、氧分压等工艺条件和利用N离子轰击氮化Si衬底表面工艺对CeO2薄膜的生长及其与Si界面结构特征的影响,利用脉冲激光淀积方法在Si(100)衬底生长了具有(100)和(111)取向的CeO2外延薄膜;研究了N离子轰击氮化Si衬底表面处理工艺对Pt/CeO2/Si结构电学性质的影响.研究结果显示,利用N离子轰击氮化Si表面/界面工艺不仅影响CeO2薄膜的生长结构,还可以改善CeO2与Si界面的电学性质.     

Ti中间层对超薄Ni膜硅化反应特性的影响

在多种Si衬底上利用离子束溅射淀积超薄Ni膜以及Ni/Ti双层膜,经过快速热退火处理完成薄膜的固相硅化反应,通过四探针法、微区喇曼散射法和俄歇深度分布测试法研究了Ti中间层对Ni硅化反应的影响.实验结果证明Ti中间层抑制了集成电路生产最需要的NiSi相的形成.     

Ti中间层对超薄Ni膜硅化反应特性的影响

在多种Si衬底上利用离子束溅射淀积超薄Ni膜以及Ni/Ti双层膜,经过快速热退火处理完成薄膜的固相硅化反应,通过四探针法、微区喇曼散射法和俄歇深度分布测试法研究了Ti中间层对Ni硅化反应的影响.实验结果证明Ti中间层抑制了集成电路生产最需要的NiSi相的形成.     

Ti中间层对超薄Ni膜硅化反应特性的影响

在多种Si衬底上利用离子束溅射淀积超薄Ni膜以及Ni/Ti双层膜，经过快速热退火处理完成薄膜的固相硅化反应，通过四探针法、微区喇曼散射法和俄歇深度分布测试法研究了Ti中间层对Ni硅化反应的影响. 实验结果证明Ti中间层抑制了集成电路生产最需要的NiSi相的形成.     

硅基高质量氧化锌外延薄膜的界面控制

本文利用反射式高能电子衍射(RHEED)、高分辨透射电镜和选区电子衍射方法,系统研究了Si(111)衬底上制备高质量氧化锌单晶薄膜的界面控制工艺.发现低温下Mg(0001)/Si(111)界面互扩散得到有效抑制,形成了高质量的单晶镁膜,进一步通过低温氧化法和分子束外延法实现了单晶MgO缓冲层的制备,从而为ZnO的外延生长提供了模板.在这一低温界面控制工艺中,Mg膜有效防止了Si表面的氧化,而MgO膜不仅为ZnO的成核与生长提供了优良的缓冲层,且极大地弛豫了由于衬底与ZnO之间的晶格失配所引起的应变.上述低温工艺也可用来控制其它活性金属膜与硅的界面,从而在硅衬底上获得高质量的氧化物模板.     

CeO_2高K栅介质薄膜的制备工艺及其电学性质

研究了 Ce O2 作为高 K (高介电常数 )栅介质薄膜的制备工艺 ,深入分析了衬底温度、淀积速率、氧分压等工艺条件和利用 N离子轰击氮化 Si衬底表面工艺对 Ce O2 薄膜的生长及其与 Si界面结构特征的影响 ,利用脉冲激光淀积方法在 Si(10 0 )衬底生长了具有 (10 0 )和 (111)取向的 Ce O2 外延薄膜 ;研究了 N离子轰击氮化 Si衬底表面处理工艺对 Pt/ Ce O2 / Si结构电学性质的影响 .研究结果显示 ,利用 N离子轰击氮化 Si表面 /界面工艺不仅影响 Ce O2 薄膜的生长结构 ,还可以改善 Ce O2 与 Si界面的电学性质     

Tunable work function in fully nickel-silicided polysilicon gates for metal gate MOSFET applications

The work function of fully nickel-silicided polysilicon was investigated. The midgap work function (4.7 eV) was obtained for undoped mononickel-silicide (NiSi). It was shown that the implantation of both arsenic and antimony into the polysilicon before silicidation reduces the NiSi work function, and the change in work function is greater for antimony than for arsenic. The pile-up of these species at the oxide interface during the nickel silicidation is demonstrated to be the physical mechanism responsible for the work function shift. Both species activations before silicidation and silicidation conditions were found to affect the NiSi work function shift significantly. The nonactivated species have minimum effect and incomplete silicidation can have maximum work function shift. The doping effect of indium on the NiSi work function is reported for the first time. A shift of /spl sim/0.14 eV toward the valence band was obtained for 2.6-nm oxide capacitors. It was found that the work function shift caused by the indium doping is saturated at a relatively low dose, which may be related to the low solid solubility of indium in polysilicon.     

Effective Schottky Barrier Height Reduction Using Sulfur or Selenium at the NiSi/n-Si (100) Interface for Low Resistance Contacts

We explore a novel integration approach that introduces valence-mending adsorbates such as sulfur (S) or selenium (Se) by ion implantation and prior to nickel silicidation for the effective reduction of contact resistance and Schottky barrier (SB) height at the NiSi/n-Si interface. While a low SB height of ~0.12 eV can be obtained for NiSi formed on S-implanted n-Si, the insertion of a 1000degC anneal prior to silicidation leads to S out-diffusion and loss of SB modulation effects. We demonstrate that Se-implanted Si does not suffer from Se outdiffusion even after a 1000degC anneal, and subsequent Ni silicidation formed an excellent ohmic contact with a low SB height of 0.13 eV. Se segregation at the NiSi/n-Si (100) interface occurred. Implantation of Se and its segregation at the NiSi/n-Si interface is a simple and promising approach for achieving reduced SB height and contact resistance in future high-performance n-channel field-effect transistors.     

Improvement of thermal stability of Ni silicide on N-Si by direct deposition of group III element (Al, B) thin film at Ni/Si interface

The direct deposition of a thin Al or B layer at Ni/Si interface was proposed as a new method to solve a problem of degraded thermal stability of Ni silicide on heavily doped N⁺-Si substrates. Significant improvement of thermal stability evaluated by the sheet resistance vs. silicidation temperature properties was observed. The improvement is attributed to suppression of agglomeration of the silicide layers. The Al layer was effective only when it was located at the Ni/Si interface before the silicidation process. The deposited Al and B layers under Ni layer segregated at the surface after the silicidation process. The use of B layer was preferable to control the phase transition from NiSi to NiSi₂.     

Silicidation of Ni(Yb) Film on Si(001)

The influence of the addition of Yb to Ni on the silicidation of Ni was investigated. The Ni(Yb) film was deposited on a Si(001) substrate by co-sputtering, and silicidation was performed by rapid thermal annealing (RTA). After silicidation, the sheet resistance of the silicide film was measured by the four-point probe method. X-ray diffraction and micro-Raman spectroscopy were employed to identify the silicide phases, and the redistribution of Yb after RTA was characterized by Rutherford backscattering spectrometry and Auger electron spectroscopy. The influence of the Yb addition on the Schottky barrier height (SBH) of the silicide/Si diode was examined by current–voltage measurements. The experimental results reveal that the addition of Yb can suppress the formation of the high-resistivity Ni₂Si phase, but the formation of low-resistivity NiSi phase is not affected. Furthermore, after silicidation, most of the Yb atoms accumulate in the surface layer and only a small number of Yb atoms pile up at the silicide/Si(001) interface. It is believed that the accumulation of a small amount of Yb at the silicide/Si(001) interface results in the SBH reduction observed in the Ni(Yb)Si/Si diode.     

The reaction characteristics of ultra-thin Ni films on undoped and doped Si (100)

Reaction characteristics of ultra-thin Ni films (5 nm and 10 nm) on undoped and highly doped (As-doped and B-doped) Si (100) substrates are investigated in this work. The sheet resistance (Rs) measurements confirm the existence of a NiSi salicidation process window with low Rs values within a certain annealing temperature range for all the samples except the one of Ni(5 nm) on P⁺-Si(100) substrate (abnormal sample). The experimental results also show that the transition reaction to low resistivity phase NiSi is retarded on highly doped Si substrates regardless of the initial Ni film thickness. Micro-Raman and x-ray diffraction (XRD) measurement show that NiSi forms in the process window and NiSi₂ forms in a higher temperature annealing process for all normal substrates. Auger electron spectroscopy (AES) results for the abnormal sample show that the high resistivity of the formation film is due to the formation of NiSi₂.     

非晶化注入技术在NiSi SALICIDE工艺中的应用

在pn结形成之后借助非晶化Si离子注入技术可以将结表面Si单晶层非晶化. 作者研究了这种非晶化处理对Ni硅化反应的影响. 实验发现，非晶化处理可以促进Ni在低温下与衬底Si的反应，而且在低温下Ni/Si可以直接反应形成NiSi. 实验结果表明这种非晶化未对硅化反应过程中杂质的再分布产生影响，但是剖面透射电镜分析表明，这种非晶化所需能量需要合理优化.     

CMOS Integration of Dual Work Function Phase-Controlled Ni Fully Silicided Gates (NMOS:NiSi, PMOS:Ni2Si, and Ni31Si12) on HfSiON

The CMOS integration of dual work function (WF) phase-controlled Ni fully silicided (FUSI) gates on HfSiON was investigated. For the first time, the integration of NiSi FUSI gates on n-channel MOS (NMOS) and Ni₃₁Si₁₂ FUSI gates on p-channel MOS (PMOS) with good V_t control to short gate lengths (L_G=50 nm, linear V_t of 0.49 V for NMOS, and -0.37 V for PMOS) is demonstrated. A poly-Si etch-back step was used to reduce the poly-Si height on PMOS devices, allowing for the linewidth-independent formation of NiSi on NMOS and Ni-rich silicides on PMOS with a two-step rapid thermal processing (RTP) silicidation process. The process space for the scalable formation of NiSi on NMOS and Ni₂Si or Ni₃₁ Si₁₂ on PMOS devices was investigated. It was found that within the process window for linewidth-independent NiSi FUSI formation on 100-nm poly-Si NMOS devices, it is possible to control the silicide formation on PMOS devices by adjusting the poly-Si etch-back and RTP1 conditions to obtain either Ni₂Si or Ni₃₁Si₁₂ FUSI gates. A reduction in the PMOS threshold voltage of 90 mV and improved device performance (18% I_on improvement at I_off=100 nA/mum) was obtained for Ni ₃₁Si₁₂ compared to Ni₂Si FUSI gates, as well as a V_t reduction of 350 mV when compared to a single WF flow using NiSi FUSI gates on PMOS     

Thickness scaling issues of Ni silicide

Ni silicidation processes without a capping layer and with a TiN capping layer are studied from the point of view of process window, morphology of the resulting silicide, and mechanisms of degradation at higher temperatures. The thermal stability of NiSi films on As- and on B-doped (100) Si substrates was investigated for Ni film thicknesses ranging from 5 to 30 nm. While agglomeration was the mechanism of degradation for the thin films, both morphological changes and transformation to NiSi₂ were possible for thicker films depending on anneal temperature and time. Activation energy of 2.5 eV for NiSi on n+ (100) Si and p+ (100) Si was determined for the process of morphological degradation. The measured temperature and time dependences for the thermal degradation of NiSi films suggest that the activation energy for transformation to NiSi₂ is higher than for morphological degradation.     

Ni(Pt)Si硅化物温度稳定性的研究

对比研究了夹层结构N i/P t/N i分别与掺杂p型多晶硅和n型单晶硅进行快速热退火形成的硅化物薄膜的电学特性。实验结果表明,在600~800°C范围内,掺P t的N iS i薄膜电阻率低且均匀,比具有低电阻率的镍硅化物的温度范围扩大了100~150°C。依据吉布斯自由能理论,对在N i(P t)S i薄膜中掺有2%和4%的P t样品进行了分析。结果表明,掺少量的P t可以推迟N iS i向N iS i2的转化温度,提高了镍硅化物的热稳定性。最后,制作了I-V特性良好的N i(P t)S i/S i肖特基势垒二极管,更进一步证明了掺少量的P t改善了N iS i肖特基二极管的稳定性。