Silicon‐Compatible Photodetectors: Trends to Monolithically Integrate Photosensors with Chip Technology

Encouraged by the increasing requirements of intelligent equipment, silicon integrated circuit–compatible photodetectors that support single‐chip photonic–electronic systems have gained considerable progresses. Advanced materials have resulted in enhanced device performance based on traditional photovoltaic effect and photoconductive effect, and novel device designs have catalyzed new working mechanisms combing rapid photoresponse and high responsivity gain. Surprising applications are developed using monolithic photonic–electronic platforms, and the developing integration strategies keep pace with the developing complementary metal‐oxide‐semiconductor techniques as well as nonsilicon substrates. Here, the recent developments in silicon‐compatible photodetectors, both in device advances and their integration routes, are reviewed. Meanwhile, the progresses, challenges, and possible future directions in this field are discussed and concluded.     

Novel Heterogeneous Integration Technology of III–V Layers and InGaAs FinFETs to Silicon

Heterogeneous integration of III–V compound semiconductors to Si substrates is regarded as a necessary step for advancing high‐speed electronics and hybrid optoelectronic systems for data processing and communications, and is extensively being pursued by the semiconductor industry. Here, an innovative fab‐compatible, hybrid integration process of III–V materials to Si, namely InGaAs thin films to insulator‐on‐Si, is reported, and the first III–V FinFET devices on Si are demonstrated. Transfer of crystalline InGaAs layers with high quality to SiO2/Si is accomplished by the formation of a robust interfacial nickel‐silicide (NiSi) bonding interface, marking the first report for using silicides in III–V hybrid integration technology. The performance of optimally fabricated InGaAs FinFETs on insulator on Si is systematically investigated for a broad range of channel lengths and Fin perimeters with excellent switching characteristics. This demonstrates a viable approach to large‐scale hybrid integration of active III‐V devices to mainstream Si CMOS technology, enabling low‐power electronic and fully‐integrated optoelectronic applications.     

Electric‐Driven Rotation of Silicon Nanowires and Silicon Nanowire Motors

In this work, the first highly controllable assembly and rotation of silicon nanowires and nanomotors in suspension are reported. Si and Si composite nanowires are fabricated with precisely controlled dimensions via colloidal assisted catalytic etching. The nanowires can be rotated with deterministic speed and chirality. The rotation speed and orientation not only depend on the applied AC electric frequency, but also on the electronic type, geometry, surface coating, as well as the electric conductance of suspension mediums. Theoretical analysis is used to understand the rotation of Si nanowires, and also the electric resistivity of Si nanowires is determined from their mechanical rotation. The Si nanowires are precisely assembled into nanomotors that can be rotated with controlled speeds and orientations at prescribed locations. This work provides a new paradigm for designing and actuating various Si‐based nanoelectromechanical system (NEMS) devices, which are relevant to man‐made nanomotors, nanorobots, and nanoengines.     

Liquid‐Tin‐Assisted Molten Salt Electrodeposition of Photoresponsive n‐Type Silicon Films

Production of silicon film directly by electrodeposition from molten salt would have utility in the manufacturing of photovoltaic and optoelectronic devices owing to the simplicity of the process and the attendant low capital and operating costs. Here, dense and uniform polycrystalline silicon films (thickness up to 60 µm) are electrodeposited on graphite sheet substrates at 650 °C from molten KCl–KF‐1 mol% K₂SiF₆ salt containing 0.020–0.035 wt% tin. The growth of such high‐quality tin‐doped silicon films is attributable to the mediation effect of tin in the molten salt electrolyte. A four‐step mechanism is proposed for the generation of the films: nucleation, island formation, island aggregation, and film formation. The electrodeposited tin‐doped silicon film exhibits n‐type semiconductor behavior. In liquid junction photoelectrochemical measurement, this material generates a photocurrent about 38–44% that of a commercial n‐type Si wafer.     

Densely Packed Arrays of Ultra‐High‐Aspect‐Ratio Silicon Nanowires Fabricated using Block‐Copolymer Lithography and Metal‐Assisted Etching

Metal‐assisted etching is used in conjunction with block‐copolymer lithography to create ordered and densely‐packed arrays of high‐aspect‐ratio single‐crystal silicon nanowires with uniform crystallographic orientations. Nanowires with diameters and spacings down to 19 nm and 10 nm, respectively, are created as either continuous carpets or as carpets within trenches. Wires with aspect ratios up to 220 are fabricated, and capillary‐induced clustering of wires is eliminated through post‐etching critical point drying. The wires are single crystals with 〈100〉 axis directions. The distribution of wire diameters is narrow and closely follows the size distribution of the block copolymer, with a standard deviation of 3.12 nm for wires of mean diameters 22.06 nm. Wire arrays formed in carpets and in channels have hexagonal order with good fidelity to the block copolymer pattern. Fabrication of wires in topographic features demonstrates the ability to accurately control wire placement. Wire arrays made using this new process will have applications in the creation of arrays of photonic and sensing devices.     

Single‐Crystal Germanium Growth on Amorphous Silicon

Growing single‐crystal semiconductors directly on an amorphous substrate without epitaxy or wafer bonding has long been a significant fundamental challenge in materials science. Such technology is especially important for semiconductor devices that require cost‐effective, high‐throughput fabrication, including thin‐film solar cells and transistors on glass substrates as well as large‐scale active photonic circuits on Si using back‐end‐of‐line CMOS technology. This work demonstrates a CMOS‐compatible method of fabricating high‐quality germanium single crystals on amorphous silicon at low temperatures of <450 °C. Grain orientation selection by geometric confinement of polycrystalline germanium films selectively grown on amorphous silicon by chemical vapor deposition is presented, where the confinement selects the fast‐growing grains for extended growth and eventually leads to single crystalline material. Germanium crystals grown using this method exhibit (110) texture and twin‐mediated growth. A model of confined growth is developed to predict the optimal confining channel dimensions for consistent, single‐crystal growth. Germanium films grown from one‐dimensional confinement exhibit a 200% grain size increase at 1 μm film thickness compared to unconfined films, while 2D confinement growth achieved single crystal Ge. The area of single crystalline Ge on amorphous layers is only limited by the growth time. Significant enhancement in room temperature photoluminescence and reduction in residual carrier density have been achieved using confined growth, demonstrating excellent optoelectronic properties. This growth method is readily extensible to any materials system capable of selective non‐epitaxial deposition, thus allowing for the fabrication of devices from high‐quality single crystal material when only an amorphous substrate is available.     

Large-Area Direct Hetero-Epitaxial Growth of 1550-nm InGaAsP Multi-Quantum-Well Structures on Patterned Exact-Oriented (001) Silicon Substrates by Metal Organic Chemical Vapor Deposition

We employ a simple two-step growth technique to grow large-area 1550-nm laser structures by direct hetero-epitaxy of III–V compounds on patterned exact-oriented (001) silicon (Si) substrates by metal organic chemical vapor deposition. Densely-packed, highly uniform, flat and millimeter-long indium phosphide (InP) nanowires were grown from Si v-grooves separated by silicon dioxide (SiO₂) stripes with various widths and pitches. Following removal of the SiO₂ patterns, the InP nanowires were coalesced and, subsequently, 1550-nm laser structures were grown in a single overgrowth without performing any polishing for planarization. X-ray diffraction, photoluminescence, atomic force microscopy and transmission electron microscopy analyses were used to characterize the epitaxial material. PIN diodes were fabricated and diode-rectifying behavior was observed.     

Perspective:optically-pumped Ⅲ–Ⅴ quantum dot microcavity lasers via CMOS compatible patterned Si (001) substrates

Direct epitaxial growthⅢ–Ⅴquantum dot(QD)structures on CMOS-compatible silicon substrates is considered as one of the most promising approaches to achieve low-cost and high-yield Si-based lasers for silicon photonic integration.However,epitaxial growth ofⅢ–Ⅴmaterials on Si encounters the following three major challenges:high density of threading dislocations,antiphase boundaries and thermal cracks,which significantly degrade the crystal quality and potential device performance.In this review,we will focus on some recent results related to InAs/GaAs quantum dot lasers on Si(001)substrates byⅢ–Ⅴ/Ⅳhybrid epitaxial growth via(111)-faceted Si hollow structures.Moreover,by using the step-graded epitaxial growth process the emission wavelength of InAs QDs can be extended from O-band to C/L-band.High-performance InAs/GaAs QD microdisk lasers with sub-milliwatts threshold on Si(001)substrates are fabricated and characterized.The above results pave a promising path towards the on-chip lasers for optical interconnect applications.     

Novel Type‐II InAs/AlSb Core–Shell Nanowires and Their Enhanced Negative Photocurrent for Efficient Photodetection

The control of optical and transport properties of semiconductor heterostructures is crucial for engineering new nanoscale photonic and electrical devices with diverse functions. Core–shell nanowires are evident examples of how tailoring the structure, i.e., the shell layer, plays a key role in the device performance. However, III–V semiconductors bandgap tuning has not yet been fully explored in nanowires. Here, a novel InAs/AlSb core–shell nanowire heterostructure is reported grown by molecular beam epitaxy and its application for room temperature infrared photodetection. The core–shell nanowires are dislocation‐free with small chemical intermixing at the interfaces. They also exhibit remarkable radiative emission efficiency, which is attributed to efficient surface passivation and quantum confinement induced by the shell. A high‐performance core–shell nanowire phototransistor is also demonstrated with negative photoresponse. In comparison with simple InAs nanowire phototransistor, the core–shell nanowire phototransistor has a dark current two orders of magnitude smaller and a sixfold improvement in photocurrent signal‐to‐noise ratio. The main factors for the improved photodetector performance are the surface passivation, the oxide in the AlSb shell and the type‐II bandgap alignment. The study demonstrates the potential of type‐II core–shell nanowires for the next generation of photodetectors on silicon.     

A Solution‐Processed UV‐Sensitive Photodiode Produced Using a New Silicon Nanocrystal Ink

This article presents a simple and effective method of functionalizing hydrogen‐terminated silicon (Si) nanocrystals (NCs) to form a high‐quality colloidal Si NC ink with short ligands that allow charge transport in nanocrystal solid films. Si NCs fabricated by laser‐pyrolysis and acid etching are passivated with allyl disulfide via ultraviolet (UV)‐initiated hydrosilylation to form a stable colloidal Si NC ink. Then a Si NC‐based photodiode is directly fabricated in air from this ink. Only a solution‐processed poly(3,4‐ethylenedioxy‐thiophene):poly(styrene sulfonate) (PEDOT: PSS) electron blocking layer and top‐ and bottom‐contacts are needed along with the Si NC layer to construct the device. A Schottky‐junction at the interface between the Si NC absorber layer and aluminum (Al) back electrode drives charge separation in the device under illumination. The unpackaged Si NC‐based photodiode exhibites a peak photoresponse of 0.02 A W^?1 to UV light in air, within an order of magnitude of the response of commercially available gallium phosphide (GaP), gallium nitride (GaN), and silicon carbide (SiC) based photodetectors. This provides a new pathway to large‐area, low‐cost solution‐processed UV photodetectors on flexible substrates and demonstrates the potential of this new silicon nanocrystal ink for broader applications in solution‐processed optoelectronics.     

Improved Thermal Behavior of Multiple Linked Arrays of Silicon Nanowires Integrated into Planar Thermoelectric Microgenerators

Low-dimensional structures have been shown to be promising candidates for enhancing the thermoelectric properties of semiconductors, paving the way for integration of thermoelectric generators into silicon microtechnology. With this aim, dense arrays of well-oriented and size-controlled silicon nanowires (Si NWs) obtained by the chemical vapor deposition (CVD)-vapor–liquid–solid (VLS) mechanism have been implemented into microfabricated structures to develop planar unileg thermoelectric microgenerators (μTEGs). Different low-thermal-mass suspended structures have been designed and microfabricated on silicon-on-insulator (SOI) substrates to operate as microthermoelements using p-type Si NW arrays as the thermoelectric material. To obtain nanowire arrays with effective lengths larger than normally attained by the VLS technique, structures composed of multiple ordered arrays consecutively bridged by transversal microspacers have been fabricated. The successive linkage of multiple Si NW arrays enabled the development of larger temperature differences while preserving good electrical contact. This gives rise to small internal thermoelement resistances, enhancing the performance of the devices as energy harvesters.     

A Multifunction Heterojunction Formed Between Pentacene and a Single‐Crystal Silicon Nanomembrane

A mesh patterned n‐type single‐crystalline silicon nanomembrane (SiNM) created from a silicon‐on‐insulator (SOI) wafer is complementally combined with a p‐type pentacene layer to form a heterogeneous p‐n junction on a flexible plastic substrate. Excellent rectifying characteristics are obtained from the heterogeneous p‐n diode. The diode also exhibits photosensitivity at visible wavelengths with a photo‐to‐dark current ratio exceeding four orders, a responsivity of 0.7 A/W, and an external quantum efficiency of 21.9% at 633 nm. Over 60% average transmittance in the visible spectrum is measured from the heterogeneous multilayer junction on a plastic substrate. Outstanding mechanical bending characteristics are observed with up to 1.08% of strain applied to the diode. These results suggest that organic‐inorganic heterogeneous integration may be a viable strategy to build flexible organic‐inorganic heterojunction devices and thus enable a number of novel multifunctional applications.     

Life‐cycle greenhouse gas effects of introducing nano‐crystalline materials in thin‐film silicon solar cells

Solar PV is widely considered as a “green” technology. This paper, however, investigates the environmental impact of the production of solar modules made from thin‐film silicon. We focus on novel applications of nano‐crystalline Silicon materials (nc‐Si) into current amorphous Silicon (a‐Si) devices. Two nc‐Si specific details concerning the environmental performance can be identified, when we want to compare to a‐Si modules. First, in how far the extra (and thicker) silicon layer (s) affects upstream material requirements and energy use. Second, in how far depositing an extra silicon layer may increase emissions of greenhouse gases as additional emissions of Fluor gases (F‐gases) are associated to this step. The much larger global warming potential of F‐gases (17 200–22 800 times that of CO₂) may lead to higher environmental burdens. To date, no study has yet analyzed the effect of F‐gas usage on the environmental profile of thin‐film silicon solar modules. We performed a life‐cycle assessment (LCA) to investigate the current environmental usefulness of pursuing this novel micromorph concept. The switch to the new micromorph technology will result in a 60–85% increase in greenhouse gas emissions (per generated kWh solar electricity) in case of NF₃ based clean processing, and 15–100% when SF₆ is used. We conclude that F‐gas usage has a substantial environmental impact on both module types, in particular the micromorph one. Also, micromorph module efficiencies need to be improved from the current 8–9% (stabilized efficiency) toward 12–16% (stab. eff.) in order to compensate for the increased environmental impacts. Copyright © 2010 John Wiley & Sons, Ltd.     

Comparison of III–V Heterostructures Grown on Ge/Si,Ge/SOI,and GaAs

Semiconductors - III–V/Ge/Si(001), III–V/Ge/SOI(001), and III–V/GaAs(001) heterostructures are fabricated and investigated. The Ge buffer layer for the III–V/Ge/Si structure...     

Fabrication of Single‐Crystalline Silicon Nanowires by Scratching a Silicon Surface with Catalytic Metal Particles

A novel strategy for preparing large‐area, oriented silicon nanowire (SiNW) arrays on silicon substrates at near room temperature by localized chemical etching is presented. The strategy is based on metal‐induced (either by Ag or Au) excessive local oxidation and dissolution of a silicon substrate in an aqueous fluoride solution. The density and size of the as‐prepared SiNWs depend on the distribution of the patterned metal particles on the silicon surface. High‐density metal particles facilitate the formation of silicon nanowires. Well‐separated, straight nanoholes are dug along the Si block when metal particles are well dispersed with a large space between them. The etching technique is weakly dependent on the orientation and doping type of the silicon wafer. Therefore, SiNWs with desired axial crystallographic orientations and doping characteristics are readily obtained. Detailed scanning electron microscopy observations reveal the formation process of the silicon nanowires, and a reasonable mechanism is proposed on the basis of the electrochemistry of silicon and the experimental results.     

Assessing material qualities and efficiency limits of III–V on silicon solar cells using external radiative efficiency

The paper presents a quantitative approach to the investigation and comparison of the material qualities of III–V on silicon (III–V/Si) solar cells by using external radiative efficiencies. We use this analysis to predict the limiting efficiencies and evaluate the criteria of material quality in order to achieve high‐efficiency III–V/Si solar cells. This result yields several implications for the design of high‐efficiency III–V/Si solar cells. Copyright © 2016 John Wiley & Sons, Ltd.     

A New Route to Large‐Scale Synthesis of Silicon Nanowires in Ultrahigh Vacuum

An approach for the large‐scale synthesis of high‐purity silicon nanowires (SiNWs) in ultrahigh vacuum is presented. A mixture of Si and SiO₂ is evaporated by an electron beam, and the growth temperature is 700 °C, which is much lower than those used for other oxide‐assisted growths. A new type of single‐crystal SiNWs, with [221] orientation, is thus synthesized. Moreover, it is experimentally demonstrated that SiO intermediates are formed in the process, and the nanowires are obtained via a disproportionation reaction of 2SiO → Si + SiO₂. A growth mechanism is proposed and the critical factors for the formation of 1D nanowires are also determined. The approach is particularly compatible with the mature Si‐based technology, and is favorable for device integration and practical applications.     

Nanostructured Silicon Anodes for High‐Performance Lithium‐Ion Batteries

Despite the high theoretical capacity of Si anodes, the electrochemical performance of Si anodes is hampered by severe volume changes during lithiation and delithiation, leading to poor cyclability and eventual electrode failure. Nanostructured silicon and its nanocomposite electrodes could overcome this problem holding back the deployment of Si anodes in lithium‐ion batteries (LIBs) by providing facile strain relaxation, short lithium diffusion distances, enhanced mass transport, and effective electrical contact. Here, the recent progress in nanostructured Si‐based anode materials such as nanoparticles, nanotubes, nanowires, porous Si, and their respective composite materials and fabrication processes in the application of LIBs have been reviewed. The ability of nanostructured Si materials in addressing the above mentioned challenges have been highlighted. Future research directions in the field of nanostructured Si anode materials for LIBs are summarized.     

A Possible Reaction Pathway to Fabricate a Half‐Metallic Wire on a Silicon Surface

Based on first‐principles electronic structure calculations and molecular dynamics simulations, a possible reaction pathway for fabricating half‐metallic Mo‐borine sandwich molecular wires on a hydrogen‐passivated Si(001) surface is presented. The molecular wire is chemically bonded to the silicon surface and is stable up to room temperature. Interestingly, the essential properties of the molecular wire are not significantly affected by the Si substrate. Furthermore, their electronic and magnetic properties are tunable by an external electric field, which allows the molecular wire to function as a molecular switch or a basic component for information storage devices, leading to applications in future molecular electronic and spintronic devices.     

体Si和SOI工艺SRAM芯片电磁敏感度的温度效应

考虑到芯片实际应用环境的复杂性,针对体硅(silicon,Si)和绝缘体上硅(silicon on insulator,SOI)两种工艺的静态随机存储器(static random-access memory,SRAM),测试研究温度效应分别对这两种不同工艺存储器芯片敏感度的影响.依据两种工艺下金属氧化物半导体(met...