Piecewise Pre-Equalized Linearization of the Wireless Transmitter With a Doherty Amplifier

This paper describes a predistorter (PD) based on piecewise pre-equalizers for use in multichannel wideband applications. The predistortion linearizer consists of piecewise pre-equalizers along with a look-up-table-based digital PD that together compensate for nonlinearities, as well as memory effects of power amplifiers (PAs). It takes advantage of multiple finite-impulse-response filters that significantly reduce the complexity when compared to memory polynomial methods. The proposed method was also compared with the conventional Hammerstein structure. A 300-W peak envelope power Doherty PA was first modeled by measured time-based samples in order to verify the adjacent channel power ratio (ACPR) performance in simulation using a multitone and single wideband code-division multiple-access (W-CDMA) carrier. Furthermore, the experimental results applying two W-CDMA carriers verify that the proposed method provided similar improvement to that of the memory polynomial approach. The experimental results verified the complexity reduction and superior ACPR performance over the conventional Hammerstein structure.     

A SiGe PA with dual dynamic bias control and memoryless digital predistortion for WCDMA handset applications

This paper demonstrates a two-stage 1.95-GHz WCDMA handset RFIC power amplifier (PA) implemented in a 0.25-/spl mu/m SiGe BiCMOS process. With an integrated dual dynamic bias control of the collector current and collector voltage, the average power efficiency of the two-stage PA is improved from 1.9% to 5.0%. The measured power gain is 18.5 dB. The gain variation with dynamic biasing is less than 1.8 dB. An off-chip memoryless digital predistortion linearizer is also adopted, satisfying the 3GPP wideband code division multiple access (WCDMA) linearity specification by a 10 dB improvement of adjacent channel power ratio (ACPR) at +26 dBm average channel output power.     

Multi-order predistortion of power amplifiers using a second harmonic based technique

A novel multi-order predistortion linearizer is proposed to achieve independent control of the third- and fifth-order intermodulation products in high power amplifier. The approach is based on a combination of the second harmonic technique and the difference frequency technique. The second harmonic and difference frequency terms are generated using an envelope detector and two frequency multipliers. The RF predistorter has the advantage of low insertion loss and the requirement of a short delay line. Experimental results demonstrate an adjacent channel power ratio (ACPR) reduction of 11 dB for W-CDMA, at 2140 MHz.     

WCDMA功放预失真发生器的研究

针对宽带码分多址(WCDMA)功放的非线性失真问题,提出了一种简单有效的解决方案,即通过预失真发生器对幅度-幅度(AM-AM)及幅度-相位(AM-PM)曲线进行调整,以补偿功放的非线性失真.这种方案主要是通过利用二极管的非线性特性设计出的预失真发生器来实现的.实验证明,将预失真发生器与WCDMA功放配合使用,能将功放的邻道功率泄漏比(ACPR)改善5 dB.     

High efficiency, wide dynamic range variable gain and poweramplifier MMICs for wideband CDMA handsets

A linearized variable gain amplifier (VGA) and a two-stage power amplifier (PA) MMIC were developed for 1.95-GHz wideband CDMA (W-CDMA) handsets application. A complete PA block with power control ability was obtained by cascading the VGA with the PA. The linearized VGA consists of a predistorter (PD) integrated with a conventional VGA, performing dual function for achieving high linearity power control, as well as reducing output distortion level of the following PA. With the use of predistortion, the P_out and power added efficiency (PAE) of the PA block improved from 27.5 dBm and 39.8% to 28.5 dBm and 44.8%, respectively, measured at -35 dBc adjacent channel leakage power ratio (ACPR). Under power control operation, the control range of the PA block increased from 23.6 dB to 31.2 db, and ACPR reduction of over 10 dB was achieved with the use of linearized VGA     

Quantization analysis and design of a digital predistortionlinearizer for RF power amplifiers

Significant improvements in terms of reduced power consumption and increased bandwidth are obtained if a digital predistortion linearizer is implemented with an application specific digital signal processor. This paper investigates the quantization effects in different parts of a table based complex gain predistortion linearizer. The analysis can be used to optimize the predistortion linearizer with respect to word length based on the knowledge of the RF amplifier gain characteristic, the probability density function for the modulation scheme and the maximum allowable adjacent channel interference level. A predistorter chip is described that has been designed using the analysis. The chip has been fabricated and tested. Compared with a standard digital signal processing (DSP) solution it provides seven times higher bandwidth but consumes only 10% of the power     

Performance of feed‐forward linearizers of power amplifiers in OFDM systems under complex gain errors

Adaptive feed‐forward (FF) linearization schemes of power amplifiers provide high distortion cancelation and adjacent channel power ratio (ACPR) reduction. However, FF schemes are very sensitive to imbalances in the circuit parameters used to achieve signal cancelation. In this paper, an FF linearization circuit is analyzed using the orthogonalization of the nonlinear model and considering the effects of complex gain errors in the signal and distortion cancelation loops on the overall performance of the FF linearizer. The analysis enables the effective signal‐to‐distortion ratio (SDR) and ACPR to be estimated from FF circuit model. It is shown that complex gain errors in the distortion cancelation loop have a more significant effect on in‐band distortion than out‐of‐band distortion, which means that the design of FF linearizers based on ACPR improvement is not optimal. Copyright © 2015 John Wiley & Sons, Ltd.     

A W-band high-power predistorted direct-conversion digital modulator for transmitter applications

This letter presents a W-band high-power direct-conversion transmitter using digital predistortion techniques for digital modulation applications. The transmitter is a direct-conversion configuration that employs a reflection-type IQ modulator module and a power amplifier module. With the predistortion function in digital signal processing (DSP), this transmitter demonstrated an output channel power of greater than 19 dBm, and the adjacent channel power ratio (ACPR) was improved by 10 and 18 dB for QPSK and /spl pi//4-DQPSK modulation, respectively. To the best of our knowledge, this is the first demonstration of linearization techniques for W-band high-power digital modulation transmitters.     

Genetic algorithm optimization of a hybrid analog/digital predistorter for RF power amplifiers

This study presents a genetic algorithm optimization of a hybrid analog/digital predistorter, in order to reduce the intermodulation distortion (IMD) caused by the nonlinear properties of the radio frequency (RF) power amplifier (PA). Designed predistorter based on polynomial work function and the coefficient of the polynomial is optimized in order to reduce IMD by spectrum monitoring. The design procedure and validation of predistorter have been carried out by Agilent-ADS2005A. In order to validate the predistorter two different modulation schemes as CDMA and 16-QAM have been used. Also in order to verifying the linearization a test power amplifier circuit has been examined including Motorola MOSFET MRF9742 showing the nonlinear characteristics with memory. Simulations have been shown that adjacent channel power ratio (ACPR) improvements were acceptable for both CDMA and 16-QAM modulation schemes.     

A predistortion linearizer using envelope-feedback technique withsimplified carrier cancellation scheme for class-A and class-AB poweramplifiers

A predistortion linearization method using an envelope-feedback technique is proposed and implemented in this paper. This linearizer compensates the gain and phase nonlinearity of power amplifier (PA) simultaneously by controlling both variable attenuator and phase shifter with the feedback of only the difference signal between input and output envelopes. A new carrier cancellation scheme composed of a minimization circuit, log detector, and vector modulator is also presented. This circuit achieves adaptive control of the linearizer by enabling direct measurement of out-of-band power. It is well suited to a multichannel system where the allocated channels are time variant. The principle of the proposed linearizer is described and simple AM-AM distortion analysis is presented analytically and graphically based on the conceptual schematic diagram. A two-tone test for a class-A PA at 1.855 GHz with frequency spacing of 1 MHz showed intermodulation-distortion reduction of maximum 16 dB and stable operation over 5-dB output power variation up to 4-dB backoff from the saturation power level. The proposed linearizer is also applicable to class-AB PA's without further special adjustments. The adaptation circuit is fully implemented with analog integrated circuits, which can further extend its applicability with the integration technology     

An adaptive digital predistortion for compensating nonlinear distortions in RF power amplifier with memory effects

In this paper, an adaptive digital predistortion based on a memory polynomial model is proposed in order to linearize the power amplifier with memory effect. The coefficients of the power amplifier model have been extracted using a least square method and those of predistortion have been identified by applying an indirect learning structure. Finally, the performance of digital predistortion has been demonstrated using the simulation of the power amplifier and the digital predistortion excited by a modulated 16 QAM signal in Matlab software. According to the simulation results, the criterion of adjacent channel power ratio (ACPR) declined by around 15 dB and the input/output power spectrum density of the power amplifier has quite similar curves. The linearized power amplifier output spectrum demonstrates the superiority of the proposed predistorter in eliminating the spectral regrowth which is caused by the memory effect in comparison to the other linearization methods.     

Dual-band transmitters using digitally predistorted frequency multipliers for reconfigurable radios

Two methods for reconfigurable transmitters using frequency multipliers in conjunction with digital predistortion linearizers are developed. One method utilizes a circuit topology that can be switched between a fundamental-mode in-phase combined amplifier, and a push-push frequency doubler using input phasing. Investigation to maximize output harmonics out of regular power amplifiers (PAs) was performed, and the implementation of the device was successful for the amplifier- and doubler-mode operation. To satisfy optimal load-line conditions for the operation in both modes, a bi-tuned output-combining technique is introduced as well. Measurement results indicate that the circuit is able to transmit 28 dBm of output power at 900 MHz in the amplifier mode, and 22 dBm at 1800 MHz in the doubler mode. In combination with predistortion linearization, the reconfigurable transmitter was shown to be capable of amplifying IS-95B code-division multiple-access (CDMA) signals with an adjacent-channel power ratio (ACPR) up to -58dBc/30kHz. The second suggested method utilizes a fundamental-frequency PA followed by a varactor multiplier that can be bypassed with an RF switch. A varactor-diode doubler with a saturated conversion loss of 1.3 dB was built and tested. Using predistortion linearization techniques on both the PA and doubler, an ACPR of -53dBc/30kHz at 885-kHz offset was achieved for a CDMA signal transmitted at 1850 MHz.     

FPGA Implementation of a Power Amplifier Linearizer for an ETSI-SDR OFDM Transmitter

Most satellite digital radio （SDR） systems use orthogonal frequency-division multiplexing （OFDM） transmission, which means that variable envelope signals are distorted by the RF power amplifier （PA）. It is customary to back off the input power to the PA to avoid the PA nonlinear region of operation. In this way, linearity can be achieved at the cost of power efficiency. Another attractive option is to use a linearizer, which compensates for the nonlinear effects of the PA. In this paper, an OFDM transmitter conforming to European Telecommunications Standard Institute SDR Technical Specifications 2007-2008 was designed and implemented on a low-cost field-programmable gate array （FPGA） platform. A weakly nonlinear PA, operating in the L-band SDR frequency, was used for signal transmission. An adaptive linearizer was designed and implemented on the same FPGA device using digital predistortion to correct the undesired effects of the PA on the transmitted signal. Test results show that spectral distortion can be suppressed between 6-9 dB using the designed linearizer when the PA is driven close to its saturation region.     

射频功率放大器数字预失真技术及其发展趋势

3G无线通信系统对功率放大器的设计提出了更加严格的要求。为了有效地利用宝贵的频谱资源,功率放大器既要保证高线性度以减小带外发射功率以及误码率,又要有较高的效率以减少电源消耗。在众多功放线性化高效率技术中,数字预失真技术被认为是最有效的解决方案,受到越来越多的关注。本文对数字预失真技术作了详细介绍,结合实例分析了当前主要的几种预失真模型和对应的预失真方案,并展望了Doherty放大器技术与数字预失真结合的应用方向。     

非均匀采样率并发双频数字预失真技术

5G通信的高速发展对发射机支持多模式多频带并发有了新的需求.考虑非均匀采样率并发双频场景下发射机的线性化方案,针对低采样率频段失真频谱超过采样带宽,从而恶化建模精度这一问题,提出一种混叠消除的并发双频数字预失真(DPD)方案.该方案通过在高采样率下构造模型基函数,然后通过低通滤波器来滤除超出采样带宽的频谱分量,再降采样...     

一种用于微波功放的新型预失真结构

预失真技术是一种能有效的改善宽带信号线性度的方法。在普通的反向并联二极管预失真技术基础上做出了一定改进,提出了一种新的预失真线性化器电路结构。这种预失器结构简单,可以直接与功放级联,不需要延时线,相移器和衰减器等额外器件。通过调节二极管的偏置电压,电阻值和可调增益放大器,同时控制载波信号和IMD的相位和幅度变化。采用这种预失真器能够有效地补偿微波功放的非线性失真,ADS双音测试表明,IMD3和IMD5分别改善了41 dB和2.4 dB。     

射频预失真器与基带预失真算法结合对行波管功率放大器线性化改善的影响

为了保证自适应算法的效果,一般会将行波管输出功率进行一定回退,但是会降低行波管的工作效率。通过在行波管前端加入射频预失真器,在额定输入功率范围内,线性化后的行波管的非线性失真现象得到了一定程度改善,然后再进行基带自适应算法的实现。X波段行波管在输出功率回退较少的同时,达到较好的非线性失真改善效果。     

基于实值时间卷积神经网络的功放预失真研究

为了实现传输速率高达千兆比特每秒(Gbps)的目标,5G通信系统需要更宽的传输带宽和更高的调制度,这些对射频功放的线性度提出了更加苛刻的要求。必须对功放的非线性进行线性化。文中构建了一种基于实值时间卷积神经网络(Real-Valued Temporal Convolutional Networks,RVTCN)模型的数字预失真器。RVTCN模型利用扩大因果卷积(Dilated Causal Convolution, DCC)提取功放的当前时序信息,把记忆信息存储在残差块(Residual Block,RB)中,不断获取时序特征并保存于网络中。为了验证RVTCN线性化的性能,文中采用了100 MHz带宽的5G NR信号,对中心频率3.5 GHz的Doherty功放进行了预失真线性化实验验证。实验结果表明:该RVTCN模型具有射频功放的动态非线性行为建模能力,其归一化均方误差可达-40 d B;RVTCN预失真器对测试功放的相邻信道功率比(ACPR)改善可达19.5 d B左右。     

Linearity Improvement of a Power Amplifier Using a Series LC Resonant Circuit

A radio frequency power amplifier microwave monolithic integrated circuit with a series LC resonant circuit as well as a bias control circuit for wide-band code division multiple access application is presented. The linearizer that consists of a series LC resonant circuit and base-emitter junction of a bias transistor operates as a diode rectifier circuit. A comparison between the circuits with and without the linearizer has been demonstrated. The power amplifier (PA) with the series LC resonant linearizer exhibits adjacent channel leakage ratio-1 (ACLR1) of -37.2 dBc at output power of 27 dBm, a 5.6 dB improvement compared to the circuit without the linearizer. The bias control circuit reduces consumed average dc current from 83 mA to 57 mA for efficiency improvement. The linearized PA exhibits 1-dB compression point (P₁dB) of 29.3 dBm, power-added efficiency of 45.7%, and power gain of 20.6 dB at low quiescent current of 37 mA with a 3.4 V single supply.     

采用辅助转动装置的MIMO 系统双目标DPD 实验研究

文中介绍了一种双目标数字预失真(DPD)方案,并进行了实验研究。不增加系统复杂度的情况下, 可以有效地扩展MIMO 系统的线性化波束宽度。在发射机附近增设一个发射低功率信号的线性辅助转动装置,该 架构实现了MIMO 系统主波束线性化。实验平台由发射机系统和一个辅助转动装置组成,发射机天线阵列为1×4。 输入信号采用两个20 MHz 带宽峰均比分别为5. 7 dB 和5. 6 dB 的正交频分复用(OFDM)信号。实验研究结果表明, 采用了辅助转动装置的双目标DPD 方法后,邻信道功率比(ACPR)达到-50 dBc 以下的主波束线性化宽度可以扩展 到22°,同时信号归一化均方误差(NMSE)平均数值为-40 dB。该方案有效地拓宽了MIMO 系统线性化波束宽度。