基于Spin的UML状态图模型检查的设计与实现

UML已经是软件建模方面的标准语言,UML Statechart描述了系统在其生命周期中的动态行为。随着系统规模的扩大和复杂度的提高,Statechart往往包含设计者所未预料到的隐患,通过模型检查来对Statechart进行穷举检验就成为一个重要课题,首先给出了含层次、并发Statechart的语义;随后提出了对Statechart进行模型检查的一种新方法,并且已经编写软件SC2Spin实现此方法,该方法使用了提出的Statechart山脉算法和迁移提取法,可以将一个Statechart自动转化为Spin的输入语言Promela,从而验证Statechart的死锁、活锁等错误和时序逻辑公式。     

A UML-based static verification framework for security

Secure software engineering is a new research area that has been proposed to address security issues during the development of software systems. This new area of research advocates that security characteristics should be considered from the early stages of the software development life cycle and should not be added as another layer in the system on an ad-hoc basis after the system is built. In this paper, we describe a UML-based Static Verification Framework (USVF) to support the design and verification of secure software systems in early stages of the software development life-cycle taking into consideration security and general requirements of the software system. USVF performs static verification on UML models consisting of UML class and state machine diagrams extended by an action language. We present an operational semantics of UML models, define a property specification language designed to reason about temporal and general properties of UML state machines using the semantic domains of the former, and implement the model checking process by translating models and properties into Promela, the input language of the SPIN model checker. We show that the methodology can be applied to the verification of security properties by representing the main aspects of security, namely availability, integrity and confidentiality, in the USVF property specification language.     

Integrating UML and UPPAAL for designing, specifying and verifying component-based real-time systems

A new tool for integrating formal methods, particularly model checking, in the development process of component-based real-time systems specified in UML is proposed. The described tool, TANGRAM (Tool for Analysis of Diagrams), performs automatic translation from UML diagrams into timed automata, which can be verified by the UPPAAL model checker. We focus on the CORBA Component Model. We demonstrate the overall process of our approach, from system design to verification, using a simple but real application, used in train control systems. Also, a more complex case study regarding train control systems is described.     

扩展UML状态图在软件测试中的应用

在可测试性方面，UML状态图模型存在不完整性和二义性及结构复杂不便于状态分析等缺陷。该文讨论了基于扩展UML状态图模型的测试用例生成技术，分析了基于扩展UML状态图模型的测试用例生成技术。针对UML状态图的不完整性和二义性进行扩展，以提高其可测试性。     

嵌入式建模中带有时间扩展的UML状态图的形式化方法

面向对象建模语言UML(Unified Modeling Language)已广泛用于嵌入式系统建模,但它在嵌入式实时系统建模时存在概念模型形式化复杂和状态图对时间约束方面的建模功能不强的问题,针对这些问题,提出一种对UML状态图进行时间扩展的方法,并提出利用"可执行UML"对带有时间扩展的UML状态图形式化的方法.     

一种新的Statechart模型验证方法

在传统的基于时序逻辑的模型检查框架下验证Statcchart模型面临三大挑战:全状态空间搜索、多次重复搜索和复杂时序逻辑公式难写。基于上述问题和实践工作,提出一种新的Statechart模型验证方法。该方法的中心是一种强化了的属性描述语言—属性状态图,并利用属性状态图中存在的先后关系和并发关系,把各个属性状态图有机地结合成一个树结构—属性树。属性树涵盖了目标系统要求验证的属性空间,因此可自上而下的验证整棵属性树。在验证过程中系统Statechart模型对应状态空间是逐步展开的,每验证部分属性就展开相应的部分状态空间并对其进行验证,验证过程是基于属性树转换并以step为单位,验证step的初始status和结束status是否满足对应属性树节点公式对其的属性约束,这样既能够迅速找出错误又能屏蔽step内部系统Statcchart模型的状态变化,使得验证过程更简单快捷。为了说明属性状态图和基于其的验证算法是实用和易用的,通过一个例子说明了从模型设计到具体验证整个过程。     

基于UML Statechart语义的测试序列生成方法

UML Statechart是UML的一个主要组成部分,与其他类型的Statechart相比,由于采用事件队列的调度方式,UML Statechart有着更多的不确定性,使得针对UML Statechart 模型的测试非常困难。本文给出了一个形式化的语义模型,并将Stateehart转化为一个比较简单的标志变迁系统,利用路径选择算法得到一个基于标志变迁系统的测试集,然后通过判断得到的测试集中每个测试用例是否满足UML Statechart执行步的语义,从而得到一个满足UML Statechart执行步的语义的、可执行的测试集。     

Using a process algebra interface for verification and validation of UML statecharts

UML diagrams are the conventional methods for visual modeling systems. Among them, the Statechart diagrams are used to show the runtime behavior of a system, but the correctness of such diagrams is the primary concern of the designers because of concurrency issues like livelock, inaccessible states, and non-deterministic states. Process algebra methods have the capabilities that are suitable for verification and validation of Statecharts. To this end, in this paper, process algebra language LOTOS (Language Of Temporal Ordering Specification) is used as the target language, and a method is presented to map UML Statecharts to the LOTOS processes, called USLP. Then the correctness of the proposed mappings is proved by demonstrating the isomorphism relation between the Labeled Transition System (LTS) of a Statechart and the LTS of its transformed LOTOS specification. Next, tools CADP (Construction and Analysis of Distributed Processes) is used for verification and validation of the mapped LOTOS models, and the CSP process algebra and its tools, FDR are used to verify the properties could not be verified by the LOTOS and its toolset. The experimental results show our approach can: (1) verify some properties (the issues) that are not verified by other approaches and (2) reduce the space that should be searched to verify the properties.     

模型驱动架构的语义组合Web服务的验证

针对语义Web服务的组合与验证问题,提出了基于模型驱动架构（MDA）的组合方法与基于语义匹配度的匹配方法。组合方法使用UML类图和用例图对OWL-S进行静态组合建模,使用活动图对OWL-S进行动态组合建模。在建模过程中使用基于语义匹配度的匹配方法,选择可用的子Web服务确定最合适的组合Web服务,并将该组合UML模型转化为可验证的Promela语言,使用SPIN工具进行验证,通过验证的UML模型作为模板保存于本体的知识库中以便使用。该模型提高了开发语义Web服务的效率,保证了组合过程的正确性,还能利用模板与语义匹配度实时发现与选择可用的Web服务。     

UML顺序图的自动验证

UML顺序图反映了系统中并发对象之间的消息交互及顺序,在软件建模中占有重要地位。该文对UML顺序图模型的自动验证方法进行了研究,在把UML顺序图转换为Promela语言后,使用模型检验器SPIN来验证系统设计模型是否满足某些关键性质需求。为了加强该方法的适用性,采用可扩展的标记语言XML文件格式定义顺序图模型的外部表示形式,该表示方法遵从OMG的XMI标准,从而使验证过程适用于不同的UML建模环境。     

The many meanings of UML 2 Sequence Diagrams: a survey

Scenario languages are widely used in software development. Typical usage scenarios, forbidden behaviors, test cases, and many more aspects can be depicted with graphical scenarios. Scenario languages were introduced into the Unified Modeling Language (UML) under the name of Sequence Diagrams. The 2.0 version of UML changed Sequence Diagrams significantly and the expressiveness of the language was highly increased. However, the complexity of the language (and the diversity of the goals Sequence Diagrams are used for) yields several possible choices in its semantics. This paper collects and categorizes the semantic choices in the language, surveys the formal semantics proposed for Sequence Diagrams, and presents how these approaches handle the various semantic choices.     

Model interoperability via Model Driven Development

Among the factors that contribute to the inherent complexity of the software development process is the gap between the design and the formal analysis domains. Software design is often considered a human oriented task while the analysis phase draws on formal representation and mathematical foundations. An example of this dichotomy is the use of UML for the software design phase and Petri Nets for the analysis; a separation of concerns that leads to the creation of heterogeneous models. Although UML is widely accepted as a language that can be used to model the structural and behavioural aspects of a system, its lack of mathematical foundations is seen as a serious impediment to rigorous analysis. Petri Nets on the other hand have a strong mathematical basis that are well suited for formal analysis; they lack however the appeal and the ease-of-use of UML. A pressing concern for software developers is how to bridge the gap between these domains and allow for model interoperability and the integration of different toolsets across them, and thus reduce the complexity of the software development process. The aim of this paper is to present a Model Driven Development (MDD) model transformation which supports a seamless transition between UML and Petri Nets. This is achieved by model interoperability from UML Sequence Diagrams to Petri Nets and supported by tool integration. The model transformation framework allows a software system to be designed in terms of UML Sequence Diagrams and subjected to formal analysis by taking advantage of the strong mathematical framework of Petri Nets. The behaviour of a Personal Area Network will be used to illustrate the proposed approach and to highlight model interoperability and tool integration through the design, the transformation and the analysis phases.     

Formal Verification of Object-Oriented Graph Grammars Specifications

Concurrent object-oriented systems are ubiquitous due to the importance of networks and the current demands for modular, reusable, and easy to develop software. However, checking the correctness of such systems is a hard task, mainly due to concurrency and inheritance aspects. In this paper we present an approach to the verification of concurrent object-oriented systems. We use graph grammars equipped with object oriented features (including inheritance and polymorphism) as the specification formalism, and define a translation from such specifications to Promela, the input language of the SPIN model checker.     

Model-Based Verification and Validation of Properties

One of the key issues in software development, like in all engineering problems, is to ensure that the product delivered meets its specification. Verification and validation are well-established techniques for ensuring the quality of a product within the overall software development lifecycle. With models being expressed in the Unified Modeling Language, the application of verification and validation is complicated. Firstly, concerning verification, a UML model is typically not the input language of a verification tool. Secondly, with regards to validation, a UML model is also not directly executable.In this paper, we show how verification and validation can be achieved for UML models. Within our approach, graph transformation techniques are applied for automated translation of UML models into a language understood by a verification tool or directly into an implementation. By the use of such semantic-preserving transformations, both verification and validation can be lifted up to the model level, allowing for a seamless integration of verification and validation into a UML-based development process.     

Reasoning about UML/OCL class diagrams using constraint logic programming and formula

Model Driven Engineering promotes the use of models as the main artifacts in software and system development. Verification and validation of models are key activities to ensure the quality of the system under development. This paper presents a framework to reason about the satisfiability of class models described using the Unified Modeling Language (UML). The proposed framework allows us to identify possible design flaws as early as possible in the software development cycle. More specifically, we focus on UML Class Diagrams annotated with Object Constraint Language (OCL) invariants, which are considered to be the main artifacts in Object-Oriented analysis and design for representing the static structure of a system. We use the Constraint Logic programming (CLP) paradigm to reason about UML Class Diagrams modeling foundations. In particular, we use Formula as a model-finding and design space exploration tool. We also present an experimental Eclipse plug-in, which implements our UML model to Formula translation proposal following a Model Driven Architecture (MDA) approach. The proposed framework can be used to reason, validate, and verify UML Class Diagram software designs by checking correctness properties and generating model instances using the model exploration tool Formula.     

Formalising concurrent UML state machines using coloured Petri nets

With the increasing complexity of dynamic concurrent systems, a phase of formal specification and formal verification is needed. UML state machines are widely used to specify dynamic systems behaviours. However, the official semantics of UML is described in a semi-formal manner, which renders the formal verification of complex systems delicate. In this paper, we propose a formalisation of UML state machines using coloured Petri nets. We consider in particular concurrent aspects (orthogonal regions, forks, joins, variables), the hierarchy induced by composite states and their associated activities, external, local or inter-level transitions, entry/exit/do behaviours, transition priorities, and shallow history pseudostates. We use a CD player as a motivating example, and run various verifications using CPN Tools.     

UML状态机的形式语义

许多大型系统在进行分析和设计时,均采用UML作为需求描述语言,尤其是一些对安全性要求较高的系统,更是广泛采用UML的动态行为描述机制--状态机来描述协议及控制机制.但是,由于UML没有形式化的动态语义,不利于对其所描述的需求进行形式化验证和证明.为了解决这一问题,采用以下方法为UML状态机构建形式语义.把UML状态机中的状态映射到一种项代数上,用归纳的状态项表示状态机的状态.然后,把状态项映射到一种加标记的变迁系统LTS上,LTS-状态是状态机的状态项,LTS-变迁是UML状态机的微步.最后,用Plotk     

基于一致性测试理论的Statechart描述的测试用例自动生成

本文研究Statechart描述的测试语义和测试用例的自动生成.基于Tretmans的从标记转换系统描述自动生成测试用例的方法,我们研究如何从Statechart描述自动生成测试用例.本文的主要贡献在于建立了基于Statechart描述的一致性测试和测试用例生成的形式化基础.为Statechart描述建立了形式化测试语...     

基于UML的模具网络化协商事务处理系统分析与设计

UML是在Booch,OMT,OOSE等面向对象建模方法的基础上发展起来的新一代标准图形化建模语言。它具有非常丰富的表达能力,是目前最为流行的建模语言。文章基于我国模具制造业的基本发展状况,首先采用UML的用例图(UseCaseDiagrams)对模具网络化协商事务处理系统进行用例分析,然后再利用活动图(ActivityDiagrams)对它的工作流进行了分析,最后,在此基础上再进一步利用UML的类图(ClassDiagrams)对协商事务处理系统进行了设计。