A 3-V fully differential distributed limiting driver for 40-Gb/s optical transmission systems

A fully differential 40-Gb/s electro-absorption modulator driver is presented. Based on a distributed limiting architecture, the circuit can supply up to 3.0-V/sub pp/ (peak-to-peak) per side in a 50-/spl Omega/ load at data rates as high as 44 Gb/s. Both the input and the output are internally matched to 50 /spl Omega/ and exhibit return loss of better than 10 dB up to 50 GHz. Additional features of the driver include the use of a single -5.2-V supply, output swing control (1.7-3.0-V/sub pp/ per side), dc output offset control (-0.15 V to -1.1 V), and pulsewidth control (30% to 66%). The driver architecture was optimized based on a comprehensive analytical derivation of the frequency response of cascaded source-coupled field-effect transistor logic blocks using both single and double source-follower topologies.     

InP D-HBT ICs for 40-Gb/s and higher bitrate lightwave transceivers

The combination of device speed (f/sub T/, f/sub max/ > 150 GHz) and breakdown voltage (V/sub bceo/ > 8 V) makes the double heterojunction bipolar InP-based transistor (D-HBT) an attractive technology to implement the most demanding analog functions of 40-Gb/s transceivers. This is illustrated by the performance of a number of analog circuits realized in an InP D-HBT technology with an 1.2- or 1.6-/spl mu/m-wide emitter finger: a low phase noise push-push voltage-controlled oscillator with -7-dBm output power at 146 GHz, a 40-GHz bandwidth and low-jitter 40-Gb/s limiting amplifier, a lumped 40-Gb/s limiting driver amplifier with 4.5-V/sub pp/ differential output swing, a distributed 40-Gb/s driver amplifier with 6-V/sub pp/ differential output swing, and a number of distributed preamplifiers with up to 1.3-THz gain-bandwidth product.     

10-Gb/s modulator drivers with local feedback networks

A novel intrinsic collector-base capacitance (C/sub CB/) feedback network (ICBCFN) was incorporated into the conventional cascode and series-connected voltage balancing (SCVB) circuit configurations to implement 10-Gb/s modulator drivers. The drivers fabricated in 0.35-/spl mu/m SiGe BiCMOS process could generate 9 V/sub PP/ differential output swings with rise/fall time of less than 29 ps. Also, the ICBCFN was modified as an intrinsic drain-gate capacitance feedback network (IDGCFN) to implement drivers with differential output swing of 8 V/sub PP/ in 0.18-/spl mu/m CMOS process. The power consumption is as low as 0.6 W. The present work shows that the driving capability is greater than that of the currently reported silicon-based drivers.     

2 V-operated InGaP-AlGaAs-InGaAs enhancement-mode pseudomorphic HEMT

A low-voltage single power supply enhancement-mode InGaP-AlGaAs-InGaAs pseudomorphic high-electron mobility transistor (PHEMT) is reported for the first time. The fabricated 0.5/spl times/160 /spl mu/m/sup 2/ device shows low knee voltage of 0.3 V, drain-source current (I/sub DS/) of 375 mA/mm and maximum transconductance of 550 mS/mm when drain-source voltage (V/sub DS/) was 2.5 V. High-frequency performance was also achieved; the cut-off frequency(F/sub t/) is 60 GHz and maximum oscillation frequency(F/sub max/) is 128 GHz. The noise figure of the 160-/spl mu/m gate width device at 17 GHz was measured to be 1.02 dB with 10.12 dB associated gain. The E-mode InGaP-AlGaAs-InGaAs PHEMT exhibits a high output power density of 453 mW/mm with a high linear gain of 30.5 dB at 2.4 GHz. The E-mode PHEMT can also achieve a high maximum power added efficiency (PAE) of 70%, when tuned for maximum PAE.     

6-k/spl Omega/ 43-Gb/s differential transimpedance-limiting amplifier with auto-zero feedback and high dynamic range

A high-gain, 43-Gb/s InP HBT transimpedance-limiting amplifier (TIALA) with 100-/spl mu/A/sub pp/ sensitivity and 6 mA/sub pp/ input overload current is presented. The circuit also operates as a limiting amplifier with 40-dB differential gain, better than 15-dB input return loss, and a record-breaking sensitivity of 8 mV/sub pp/ at 43 Gb/s. It features a differential TIA stage with inductive noise suppression in the feedback network and consumes less than 450mW from a single 3.3-V supply. The TIALA has 6-k/spl Omega/ (76dB/spl Omega/) differential transimpedance gain and 35-GHz bandwidth and comprises the transimpedance and limiting gain functions, an auto-zero dc feedback circuit, signal level monitor, and slicing level adjust functions. Other important features include 45-dB isolation and 800-mV/sub pp/ differential output.     

DC and RF characteristics of E-mode Ga/sub 0.51/In/sub 0.49/P-In/sub 0.15/Ga/sub 0.85/As pseudomorphic HEMTs

The DC and RF characteristics of Ga/sub 0.49/In/sub 0.51/P-In/sub 0.15/Ga/sub 0.85/As enhancement- mode pseudomorphic HEMTs (pHEMTs) are reported for the first time. The transistor has a gate length of 0.8 /spl mu/m and a gate width of 200 /spl mu/m. It is found that the device can be operated with gate voltage up to 1.6 V, which corresponds to a high drain-source current (I/sub DS/) of 340 mA/mm when the drain-source voltage (V/sub DS/) is 4.0 V. The measured maximum transconductance, current gain cut-off frequency, and maximum oscillation frequency are 255.2 mS/mm, 20.6 GHz, and 40 GHz, respectively. When this device is operated at 1.9 GHz under class-AB bias condition, a 14.7-dBm (148.6 mW/mm) saturated power with a power-added efficiency of 50% is achieved when the drain voltage is 3.5 V. The measured F/sub min/ is 0.74 dB under I/sub DS/=15 mA and V/sub DS/=2 V.     

DC, RF, and microwave noise performances of AlGaN/GaN HEMTs on sapphire substrates

High-performance AlGaN/GaN high electron-mobility transistors with 0.18-/spl mu/m gate length have been fabricated on a sapphire substrate. The devices exhibited an extrinsic transconductance of 212 mS/mm, a unity current gain cutoff frequency (f/sub T/) of 101 GHz, and a maximum oscillation frequency (f/sub MAX/) of 140 GHz. At V/sub ds/=4 V and I/sub ds/=39.4 mA/mm, the devices exhibited a minimum noise figure (NF/sub min/) of 0.48 dB and an associated gain (Ga) of 11.16 dB at 12 GHz. Also, at a fixed drain bias of 4 V with the drain current swept, the lowest NFmin of 0.48 dB at 12 GHz was obtained at I/sub ds/=40 mA/mm, and a peak G/sub a/ of 11.71 dB at 12 GHz was obtained at I/sub ds/=60 mA/mm. With the drain current held at 40 mA/mm and drain bias swept, the NF/sub min/,, increased almost linearly with the increase of drain bias. Meanwhile, the Ga values decreased linearly with the increase of drain bias. At a fixed bias condition (V/sub ds/=4 V and I/sub ds/=40 mA/mm), the NF/sub min/ values at 12 GHz increased from 0.32 dB at -55/spl deg/C to 2.78 dB at 200/spl deg/C. To our knowledge, these data represent the highest f/sub T/ and f/sub MAX/, and the best microwave noise performance of any GaN-based FETs on sapphire substrates ever reported.     

OC-192 transmitter and receiver in standard 0.18-/spl mu/m CMOS

This paper presents the first fully integrated SONET OC-192 transmitter and receiver fabricated in a standard 0.18-/spl mu/m CMOS process. The transmitter consists of an input data register, 16-b-wide first-in-first-out (FIFO) circuit, clock multiplier unit (CMU), and 16:1 multiplexer to give a 10-Gb/s serial output. The receiver integrates an input amplifier for 10-Gb/s data, clock and data recovery circuit (CDR), 1:16 demultiplexer, and drivers for low-voltage differential signal (LVDS) outputs. An on-chip LC-type voltage-controlled oscillator (VCO) is employed by both the transmitter and receiver. The chipset operates at multiple data rates (9.95-10.71 Gb/s) with functionality compatible with the multisource agreement (MSA) for 10-Gb transponders. Both chips demonstrate SONET-compliant jitter characteristics. The transmitter 10.66-GHz output clock jitter is 0.065 UI/sub pp/ (unit interval, peak-to-peak) over a 50-kHz-80-MHz bandwidth. The receiver jitter tolerance is more than 0.4 UI/sub pp/ at high frequencies (4-80 MHz). A high level of integration and low-power consumption is achieved by using a standard CMOS process. The transmitter and receiver dissipate a total power of 1.32 W at 1.8 V and are packaged in a plastic ball grid array with a footprint of 11/spl times/11 mm/sup 2/.     

10 Gbit/s series-connected voltage-balancing pulse driver with high-speed input buffer

A series-connected voltage-balancing pulse driver employing direct-coupled current switch architecture with a high-driving-capability input buffer and 0.1 /spl mu/m InP HEMTs is presented. By connecting two HEMTs in series the driver can output 3.6 V/sub pp/ voltage swing. With the input buffer, the -3 dB limiting bandwidth of the driver increases from 11 to 30 GHz, and the rise and fall times decrease from 33 to 16 and from 37 to 16 ps, respectively. These short rise and fall times enable the driver to output clear 10 Gbit/s eye opening.     

AlGaN-GaN HEMTs on Si with power density performance of 1.9 W/mm at 10 GHz

AlGaN-GaN high electron mobility transistors (HEMTs) on silicon substrate are fabricated. The device with a gate length of 0.3-/spl mu/m and a total gate periphery of 300 /spl mu/m, exhibits a maximum drain current density of 925 mA/mm at V/sub GS/=0 V and V/sub DS/=5 V with an extrinsic transconductance (g/sub m/) of about 250 mS/mm. At 10 GHz, an output power density of 1.9 W/mm associated to a power-added efficiency of 18% and a linear gain of 16 dB are achieved at a drain bias of 30 V. To our knowledge, these power results represent the highest output power density ever reported at this frequency on GaN HEMT grown on silicon substrates.     

A 21-26-GHz SiGe bipolar power amplifier MMIC

A three-stage 21-26-GHz medium-power amplifier fabricated in f/sub T/=120 GHz 0.2 /spl mu/m SiGe HBT technology has 19 dB small-signal gain and 15 dB gain at maximum output power. It delivers 23 dBm, 19.75% PAE at 22 GHz, and 21 dBm, 13% PAE at 24 GHz. The differential common-base topology extends the supply to BV/sub CEO/ of the transistors (1.8 V). New on-chip components, such as onchip interconnects with floating differential shields, and self-shielding four-way power combining/dividing baluns provide inter-stage coupling and single-ended I/O interfaces at the input and output. The 2.45/spl times/2.45 mm/sup 2/ MMIC was mounted as a flipchip and tested without a heatsink.     

Comparison of InP/InGaAs DHBT distributed amplifiers as modulator drivers for 80-Gbit/s operation

This paper compares three single-ended distributed amplifiers (DAs) realized in an in-house InP/InGaAs double heterojunction bipolar transistor technology featuring an f/sub t/ and f/sub max/ larger than 200 GHz. The amplifiers use five or eight gain cells with cascode configuration and emitter follower buffering. Although the technology is optimized for mixed-signal circuits for 80 Gbit/s and beyond, DA results could be achieved that demonstrate the suitability of this process for the realization of modulator drivers. The results are documented with scattering parameter, eye diagram, and power measurements. This includes amplifiers featuring a 3-dB bandwidth exceeding 80 GHz and a gain of over 10 dB. One of the amplifiers exhibits clear eyes at 80 Gbit/s with a gain of 14.5 dB and a voltage output swing of 2.4 V/sub pp/ limited by the available digital input signal. This amplifier delivers an output power of 18 dBm (5.1 V/sub pp/) at 40 GHz and 1-dB compression. Two amplifiers offer a tunable gain peaking, which can be used to optimize circuit performance and to compensate losses in the circuit environment. The results show that, using our InP/InGaAs technology, an integration of high-speed mixed-signal circuits (e.g., multiplexers) and high-power modulator drivers on a single chip is feasible.     

10-W/mm AlGaN-GaN HFET with a field modulating plate

AlGaN-GaN heterojunction field-effect transistors (HFETs) with a field modulating plate (FP) were fabricated on an SiC substrate. The gate-drain breakdown voltage (BV/sub gd/) was significantly improved by employing an FP electrode, and the highest BV/sub gd/ of 160 V was obtained with an FP length (L/sub FP/) of 1 /spl mu/m. The maximum drain current achieved was 750 mA/mm, together with negligibly small current collapse. A 1-mm-wide FP-FET (L/sub FP/=1 /spl mu/m) biased at a drain voltage of 65 V demonstrated a continuous wave saturated output power of 10.3 W with a linear gain of 18.0 dB and a power-added efficiency of 47.3% at 2 GHz. To our knowledge, the power density of 10.3 W/mm is the highest ever achieved for any FET of the same gate size.     

10-13.6 Gbit/s 0.18 /spl mu/m CMOS modulator drivers with 8 V/sub PP/ differential output swing

A novel intrinsic drain-gate capacitance (C/sub DG/) feedback network is incorporated into the conventional cascode circuit configuration to implement a 10-13.6 Gbit/s modulator driver. The driver fabricated in 0.18 /spl mu/m CMOS process could generate an 8 V/sub PP/ differential output swing. The power consumption is as low as 0.6 W. The present work shows that the driving capability is greater than the currently reported CMOS drivers.     

A CMOS 10-gb/s SONET transceiver

This paper presents a single-chip SONET OC-192 transceiver (transmitter and receiver) fabricated in a 90-nm mixed-signal CMOS process. The transmitter consists of a 10-GHz clock multiplier unit (CMU), 16:1 multiplexer, and 10-Gb/s output buffer. The receiver consists of a 10-Gb/s limiting input amplifier, clock and data recovery circuit (CDR), 1:16 demultiplexer, and drivers for low-voltage differential signal (LVDS) outputs. Both transmit and receive phase-locked loops employ a 10-GHz on-chip LC voltage-controlled oscillator (VCO). This transceiver exceeds all SONET OC-192 specifications with ample margin. Jitter generation at 10.66-Gb/s data rate is 18 mUI/sub pp/ (unit interval, peak-to-peak) and jitter tolerance is 0.6 UI/sub pp/ at 4-MHz jitter frequency. This transceiver requires 1.2V for the core logic and 1.8 V for input/output LVDS buffers. Multiple power supply domains are implemented here to mitigate crosstalk between receiver and transmitter. The overall power dissipation of this chip is 1.65 W.     

High-power ultralow-chirp 10-Gb/s electroabsorption modulator integrated laser with ultrashort photocarrier lifetime

A high-power, ultralow-chirp electroabsorption modulator (EAM) integrated with a distributed-feedback laser diode (EML) having ultrashort lifetime of photogenerated holes in the EAM quantum-well (QW) structure is reported for the first time. A shallow QW structure having a small valence band offset to enhance the sweepout of photogenerated holes was employed as EAM absorption layer. The measured hole lifetimes were 7-11 ps, and the measured frequency chirp (/spl alpha/-parameter) was low or negative at low EAM reverse bias voltages even under high optical output power conditions. Successful 10-Gb/s 80-km normal-dispersion single-mode fiber transmission (chromatic dispersion D=1600 ps/nm) and the record average fiber optical output power (P/sub f/) of +5.3 dBm were achieved at 25/spl deg/C. In addition, semicooled operation of EML at enhanced bit rates has been demonstrated for application in small-form-factor protocol-agnostic optical transceivers. A 10.7-Gb/s 1600-ps/nm transmission was achieved at 45/spl deg/C and P/sub f/=+3.0 dBm.     

40 Gb/s differential traveling wave modulator driver

In this letter a MMIC differential traveling wave driver for 40 Gb/s electro-absorption modulation driver is presented. The driver delivers 2.7 Vp-p or 2.4 V eye amplitude at each output into 50 /spl Omega/ load. The driver has high gain (>20 dB), a 3 dB bandwidth of 45 GHz, and rise/fall times of only 10/9 ps, respectively. The circuit uses a single -5.0 V power supply and consumes 1.8 W of dc power. The driver also features cross-point control and output amplitude control functions.     

High microwave and noise performance of 0.17-/spl mu/m AlGaN-GaN HEMTs on high-resistivity silicon substrates

AlGaN-GaN high-electron mobility transistors (HEMTs) based on high-resistivity silicon substrate with a 0.17-/spl mu/m T-shape gate length are fabricated. The device exhibits a high drain current density of 550 mA/mm at V/sub GS/=1 V and V/sub DS/=10 V with an intrinsic transconductance (g/sub m/) of 215 mS/mm. A unity current gain cutoff frequency (f/sub t/) of 46 GHz and a maximum oscillation frequency (f/sub max/) of 92 GHz are measured at V/sub DS/=10 V and I/sub DS/=171 mA/mm. The radio-frequency microwave noise performance of the device is obtained at 10 GHz for different drain currents. At V/sub DS/=10 V and I/sub DS/=92 mA/mm, the device exhibits a minimum-noise figure (NF/sub min/) of 1.1 dB and an associated gain (G/sub ass/) of 12 dB. To our knowledge, these results are the best f/sub t/, f/sub max/ and microwave noise performance ever reported on GaN HEMT grown on Silicon substrate.     

Millimeter-wave high-power 0.25-/spl mu/m gate-length AlGaN/GaN HEMTs on SiC substrates

Reports on the CW power performance at 20 and 30 GHz of 0.25 /spl mu/m /spl times/ 100 /spl mu/m AlGaN/GaN high electron mobility transistors (HEMTs) grown by MOCVD on semi-insulating SiC substrates. The devices exhibited current density of 1300 mA/mm, peak dc extrinsic transconductance of 275 mS/mm, unity current gain cutoff (f/sub T/) of 65 GHz, and maximum frequency of oscillation (f/sub max/) of 110 GHz. Saturated output power at 20 GHz was 6.4 W/mm with 16% power added efficiency (PAE), and output power at 1-dB compression at 30 GHz was 4.0 W/mm with 20% PAE. This is the highest power reported for 0.25-/spl mu/m gate-length devices at 20 GHz, and the 30 GHz results represent the highest frequency power data published to date on GaN-based devices.     

High breakdown voltage (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P/InGaAs quasi-enhancement-mode pHEMT with field-plate technology

A high breakdown voltage and a high turn-on voltage (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P/InGaAs quasi-enhancement-mode (E-mode) pseudomorphic HEMT (pHEMTs) with field-plate (FP) process is reported for the first time. Between gate and drain terminal, the transistor has a FP metal of 1 /spl mu/m, which is connected to a source terminal. The fabricated 0.5/spl times/150 /spl mu/m/sup 2/ device can be operated with gate voltage up to 1.6 V owing to its high Schottky turn-on voltage (V/sub ON/=0.85 V), which corresponds to a high drain-to-source current (I/sub ds/) of 420 mA/mm when drain-to-source voltage (V/sub ds/) is 3.5 V. By adopting the FP technology and large barrier height (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P layer design, the device achieved a high breakdown voltage of -47 V. The measured maximum transconductance, current gain cutoff frequency and maximum oscillation frequency are 370 mS/mm, 22 GHz , and 85 GHz, respectively. Under 5.2-GHz operation, a 15.2 dBm (220 mW/mm) and a 17.8 dBm (405 mW/mm) saturated output power can be achieved when drain voltage are 3.5 and 20 V. These characteristics demonstrate that the field-plated (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P E-mode pHEMTs have great potential for microwave power device applications.