8-GHz CMOS quadrature VCO using transformer-based LC tank

A fully integrated quadrature VCO at 8 GHz is presented. The VCO is implemented using a transformer-based LC tank in 0.18 /spl mu/m CMOS technology, in which two VCOs are coupled to generate I-Q signals. The VCO is realized employing the drain-gate transformer feedback configuration proposed here. This makes use of the quality factor enhancement in the resonator using a transformer and the deep switching-off technique by controlling gate bias. By turning off switching transistors of the differential VCO core deeply, the phase noise performance is improved more than 10 dB. The measured phase noise values are -110 and -117 dBc/HZ at the offset frequencies of 600 kHz and 1 MHz respectively. The tuning range of 250 MHz is achieved with the control voltage from 0 to 1 V. The VCO draws 8 mA in two differential core circuits from 3 V supply. When the bias voltage goes down to 2.5 V, the phase noise decrease only 2 dB compared to that of 3 V bias. The VCO performances are compared with previously reported quadrature Si VCOs in 5/spl sim/12 GHz frequency range.     

一个6GHz宽带低相位噪声CMOS LC VCO

用SMIC 0.13 μm CMOS工艺实现了一个低相位噪声的6 GHz压控振荡器(VCO).在对其相位噪声分析的基础上,通过改进和优化传统的调谐单元和噪声滤波电路以及加入源极负反馈电阻实现了一个宽带、低增益、低相位噪声VCO.测试结果显示,在中心频率频偏1 MHz处的相位噪声为-119 dBc/Hz,频率调谐范围为6...     

Bottom-series coupled quadrature VCO using the inductive gate voltage boosting technique

This article presents a new low-voltage bottom-series coupled quadrature voltage-controlled oscillator (QVCO), which consists of two n-core cross-coupled VCOs with the bottom-series coupling transistors. The low-voltage operation is obtained via an inductive gate voltage boosting technique. The proposed CMOS QVCO has been implemented with the TSMC 0.18?µm CMOS technology and the die area is 0.897?×?0.767?mm². At the supply voltage of 0.7?V, the total power consumption is 1.5?mW. The free-running frequency of the QVCO is tuneable from 3.77 to 4.12?GHz as the tuning voltage is varied from 0.0 to 0.7?V. The measured phase noise at 1?MHz frequency offset is ?123.35?dBc/Hz at the oscillation frequency of 4.12?GHz and the figure of merit of the proposed QVCO is ?193.5?dBc/Hz.     

Design and analysis of an ultra-low-power LC quadrature VCO

This paper presents the design of an ultra-low-power LC quadrature VCO (QVCO). It is designed in a single-poly seven-metal 65-nm CMOS process. Several aspects of state-of-the-art QVCO design are addressed, for example tank design and circuit topologies in nano-meter CMOS technology. To minimize power dissipation, an inductor with a high LQ product of 188 nH at 2.4 GHz, and a self-resonant frequency (f _SR ) of 3.8 GHz, was designed. According to post-layout simulations, the power dissipation is below 300 μW at a 0.6 V supply. At this supply, the simulated tuning range and phase noise at 1 MHz offset are 10.3% (2.26–2.5 GHz) and −109.6 dBc/Hz respectively. The phase noise figure of merit (FoM) is better than 182.5 dB at all supply voltages of interest, which is competitive to other state-of-the-art QVCOs.     

Wideband LC balun transformer using coupled LC resonators embedded into organic substrate

In this paper, wideband LC balun using coupled LC resonator has been newly designed, simulated, and fabricated. The proposed balun has a novel scheme which consists of two pairs of coupled embedded LC resonators which share one resonator with each other. The coupled resonators are applied to provide a precise phase difference of 180° and an identical magnitude between two balanced ports and DC isolation characteristic with impedance transformation. Furthermore, proposed resonators have relatively small inductance values which can be easily embedded into the organic package substrate. In order to reduce the size of embedded capacitors, BTO composite high dielectric film was applied to increase their capacitance densities. The measured results of fabricated wideband balun exhibited an insertion loss of 1.8 dB, a return loss of 10 dB, a phase imbalance of 0.5°, and magnitude imbalance of 0.7 dB at frequency bandwidth of 700 MHz ranged from 1.8 to 2.5 GHz, respectively. They agreed well with the simulated ones. The fabricated balun has a relatively small volume of 2 mm×3.5 mm×0.66 mm (height).     

On the quadrature accuracy of in-phase coupled quadrature LC oscillator

In this article, closed-form equations are proposed for phase and amplitude errors of an in-phase coupled quadrature LC oscillator. First of all, the injected current from coupling network to switching one is analytically calculated in a novel approach. Then, fundamental equations are obtained to derive phase and amplitude errors which are results of mismatches of the tank's inductors, capacitors and resistors. The analysis shows that the LC tank's phase of this oscillator has a negligible deviation from zero that is desirable and causes low phase noise. Also, the study indicates that in-phase coupling of this structure generates an injection current that reduces the output current magnitude. In the following, a mechanism is proposed to compensate the phase error, using intentional mismatch in tail currents. Moreover, In contrast to previous works, there is not a considerable trade-off between phase error and phase noise; meaning phase noise is almost stable while phase error dramatically decreases. Next, Many simulations have been done in TSMC 0.18 μm to evaluate the proposed analytical equations and efficiency of the presented approach. Finally, all of these tests confirm the high accuracy of equations and capability of the mentioned technique.     

Analysis and design of a 1.8-GHz CMOS LC quadrature VCO

This paper presents a quadrature voltage-controlled oscillator (QVCO) based on the coupling of two LC-tank VCOs. A simplified theoretical analysis for the oscillation frequency and phase noise displayed by the QVCO in the 1/f/sup 3/ region is developed, and good agreement is found between theory and simulation results. A prototype for the QVCO was implemented in a 0.35-/spl mu/m CMOS process with three standard metal layers. The QVCO could be tuned between 1.64 and 1.97 GHz, and showed a phase noise of -140 dBc/Hz or less across the tuning range at a 3-MHz offset frequency from the carrier, for a current consumption of 25 mA from a 2-V power supply. The equivalent phase error between I and Q signals was at most 0.25/spl deg/.     

A low phase-noise CMOS VCO with harmonic tuned LC tank

This paper presents a phase-noise reduction technique for voltage-controlled oscillators (VCOs) using a harmonic tuned (HT) LC tank. The phase-noise suppression is achieved through almost rectangular-shaped voltage at the switching differential cell, which effectively maximizes the slope of the switching cell output voltage at a zero crossing point. In addition, the proposed technique also suppresses the down-conversion of the noise around the second harmonic frequency by the second harmonic short of the tank. One second HT VCO and two third HT VCOs are designed and implemented to evaluate the concept using a 0.35- and 0.13-/spl mu/m CMOS process. The figure-of-merit (FOM) of the second HT VCO, third HT VCO1, and third HT VCO2 are -180.7, -183.7, and -189.5, respectively. The best FOM performance of the VCO has phase noises of -100.4, -132.0, and -140.8dBc/Hz at 100-kHz, 1-MHz, and 3-MHz offset frequencies at the 2-GHz carrier, respectively. This VCO consumes 3.29 mA from a 1.8-V supply with the silicon area of 500 /spl mu/m/spl times/750 /spl mu/m.     

A symmetrical 6-GHz fully integrated cascode coupling CMOS LC quadrature VCO

A fully symmetrical integrated quadrature LC oscillator with a wide tuning range of 1.2GHz is presented. The quadrature voltage-controlled oscillator (QVCO) is implemented using a symmetrical coupling method which has been used to produce the large tuning range with a low control voltage and to achieve good phase noise performance in 0.18/spl mu/m complementary metal oxide semiconductor technology. The measured phase noise at 1MHz offset from the center frequency (5.5GHz) is -115 dBc/Hz. The QVCO draws 3.2mA from a 1.8V supply. The equivalent phase error between I and Q signal was at most 0.5/spl deg/.     

Laterally coupled buried heterostructure high-Q ring resonators

All-buried InP-InGaAsP ring resonators laterally coupled to bus waveguides are demonstrated. The buried configurations offer a lower built-in refractive index step along the resonator periphery, which affords enhanced optical coupling coefficients between the waveguides and reduced scattering losses caused by the resonator sidewall imperfections. Very low optical intensity attenuations of 0.4 cm/sup -1/ and coupling-limited quality factors of greater than 10/sup 5/ are observed from 200-/spl mu/m-radii ring resonators. The measured spectral linewidth is as narrow as 0.0145 nm.     

Low-power CMOS LC QVCO using zero-biased transistor coupling of MWCNT network-based VCO structure

This paper presents design, analysis and implementation of a 2.4 GHz QVCO (Quadrature Voltage Controlled Oscillator), for low-power, low-voltage applications. Cross coupled LC VCO (Inductor–Capacitor Voltage Controlled Oscillator) topology realized using integration of a micro-scaled capacitor and a MWCNT (Multi-Wall Carbon Nano-Tube) network based inductor together with the CMOS circuits is utilized together with MOS transistors as coupling elements to realize QVCO. With the passive coupling achieved from the MOS transistors, power consumption is minimized while maintaining a small chip area. The variable capacitors and the inductors are designed using ANSYS and imported through DAC components in ADS (Advanced Design software). Accurate simulation of the QVCO is performed in the software environments and the results are provided. The measurement results show that the QVCO provides quadrature signals at 2.4 GHz and achieves a phase noise of −130 dBc/Hz 1 MHz away from the carrier frequency. The VCO produces frequency tuning from 2.1 GHz to 2.60 GHz (20.83%) with a control voltage varying from 0 to 0.3 V. It achieves a peak to peak voltage of 0.59 V with an ultra low power consumption of 3.8 mW from a 0.6 V supply voltage. The output power level of the QVCO is −10 dBm, with an improved quality factor of 45. The phase error of the QVCO is measured as 3.1°.     

A new robust capacitively coupled second harmonic quadrature LC oscillator

A study of some reported superharmonic LC quadrature voltage-controlled oscillator (LC-QVCO) is performed in which it is shown that robustness of the quadrature oscillation varies depending on the coupling configuration. Next, a new superharmonic LC-QVCO is proposed in which the common source node in either of two identical cross-connected LC-VCOs is coupled via a capacitor to the node common between the two varactors in the LC-tank of the other LC-VCO. As a result of connecting common mode nodes, the currents flowing through the two coupling capacitors are comprised of only the even harmonics. In the proposed coupling configuration there exists a closed loop through which the second harmonic signals circulate. A qualitative argument is presented to justify the robustness of the quadrature nature of the proposed QVCO by applying the Barkhausen phase criterion to the second harmonic signals in the loop. Since the coupling devices are only two capacitors, no extra noise sources and power consumption are added to the core VCOs. A Monte-Carlo simulation showed that the phase error of the proposed QVCO caused by device mismatches is no more than 1°. Also, generalizing this method to several numbers of VCOs in a loop, multiphase signals can be generated. The proposed circuits were designed using a 0.18-μm RF CMOS technology and simulation results are presented.     

Compact dual-frequency PIFA designs using LC resonators

We report our investigation into single-feed dual-frequency planar inverted F antenna (PIFA) designs which make use of LC resonators (or “RF traps”). We introduce three basic methods for incorporating the LC resonator into the PIFA, including a variant of the meandering PIFA. Experimental results are provided and these show that dual-frequency operation at 900 (cellular systems) and 1800 MHz (personal communication systems) can be achieved for all three designs     

A low-phase-noise 5-GHz CMOS quadrature VCO using superharmonic coupling

A new concept for quadrature coupling of LC oscillators is introduced and demonstrated on a 5-GHz CMOS voltage-controlled oscillator (VCO). It uses the second harmonic of the outputs to couple the oscillators. The technique provides quadrature over a wide tuning range without introducing any increase in phase noise or power consumption. The VCO is tunable between 4.57 and 5.21 GHz and has a phase noise lower than -124 dBc/Hz at 1-MHz offset over the entire tuning range. The worst-case measured image rejection is 33 dB. The circuit draws 8.75 mA from a 2.5-V supply.     

A 1.8-V 6/9-GHz reconfigurable dual-band quadrature LC VCO in SiGe BiCMOS technology

This paper presents a dual-band voltage-controlled oscillator (VCO) that can be reconfigured between 6- and 9-GHz frequency bands. It comprises a 6-GHz LC-tuned VCO, two 1/2 dividers, two mixers, and two 3-GHz notch filters. The 9-GHz output is generated based on the analog frequency multiplication method by mixing the 6-GHz VCO output with its divide-by-two signal. The VCO, implemented in a 0.18-/spl mu/m SiGe BiCMOS technology, achieves a fast reconfiguration time of 3.6 ns. The measured VCO phase noises are -106 and -104 dBc/Hz at 1-MHz offset for 6- and 9-GHz modes, respectively, while draining 10.8 mA from a 1.8-V supply.     

Design of a 4.6 GHz high-performance quadrature CMOS VCO using transformer couple

A CMOS quadrature LC-tank voltage-controlled oscillator topology which uses a planar spiral trans-former as coupling elements has been implemented in mixed-signal and RF 1P6M 0.18μm CMOS technology of SMIC. The measured phase noise is -125.7 dBc/Hz at an offset frequency of 1 MHz from the carrier of 4.6 GHz while the VCO core circuit draws only of 10 mW from a 1.8 V supply. The measured phase error is approximately 1.5° based on the time domain outputs and the output power is about -2 dBm. The VCO can cover the frequency range of 4.36-4.68 GHz. The tuning range is 320 MHz (7.0%) and the FOM is -189 dB.     

变压器耦合的4.6GHz高性能正交CMOS压控振荡器设计

设计一种采用平面螺旋变压器作为耦合终端的CMOS电感电容正交压控振荡器,该正交VCO采用SMIC 0.18 um 数模混合&RF 1P6M CMOS工艺进行了流片验证。测试结果表明：电路在1.8 V电源供电和工作频率为4.6 GHz时,相位噪声为-125.7 dBc/Hz@1MHz,核心直流功耗仅为10 mW。根据时域的输出波形,测量的相位误差大约为1.5°,输出功率约为-2dBm。芯片的工作频率为4.36-4.68 GHz,调谐范围为320MHz(7.0％),电路的优值为-189dB。     

High-selectivity single-ended and balanced bandpass filters using ring resonators and coupled lines loaded with multiple stubs

High-selectivity single-ended and balanced bandpass filters (BPFs) using dual-mode ring resonators and coupled lines loaded with multiple stubs are proposed in this paper. With the help of the loaded short-circuited and open-circuited stubs, six deep transmission zeros (TZs) from 0 to 2f₀ (f₀: center frequency of the passband) can be realized in both of single-ended and balanced BPFs to improve the stopband suppressions. The functions of the loaded short/open stubs and calculated analysis of TZs’ positions have been presented. For further demonstration, two examples of single-ended BPF and balanced BPF with high common-mode suppression are designed and fabricated, whose center frequencies are both at 2.1 GHz. Their measured 3-dB fractional bandwidths are 23.7% and 24.7% (differential-mode), respectively. The simulated results and measurements of these two filters are in good agreement.     

Compact frequency and bandwidth tunable stopband filters using split ring resonators and varactors coupled transmission line

Two highly compact tunable stopband filters using microstrip transmission lines coupled with split ring resonators (SRRs) and varactor diodes are presented. Frequency or bandwidth tuning capability of each device is demonstrated. The frequency tunable filter, realized by a single stage, shows a wide tuning range of 19.8% with a maximum bandwidth of 5% and an insertion loss of approximately 20 dB at 4 GHz. The bandwidth tunable filter, realized by double stages, shows a 10-dB bandwidth of 19–34% with a biasing voltage of 0–10 V. The implemented frequency tuning and bandwidth tuning devices show a significant area reduction of 60.1% and 53.5%, respectively, in comparison with a similar frequency or bandwidth tunable structure presented by others. Equivalent circuit models are presented. The measured S-parameters are in good agreement with simulated ones.     

UMTS diplexer design using dual-mode stripline ring resonators

A novel design for a UMTS diplexer using dual-mode rectangular stripline-ring resonators is proposed. The diplexer comprises two parallel-oriented rectangular stripline-rings and a connecting line between them. The degenerate-mode resonance is used to form the diplexer's Tx and Rx-bands, and a method to improve the isolation is also proposed in this circuit design.