Silicon nanoelectronic devices with delta-doped layers

Electronic devices grown by molecular beam epitaxy on a nanometer scale are presented. The use of a vertical device design in combination with delta-doping layers increases the performance of these devices. The vertical design offers the possibility of three dimensional device integration and allows the scaling of MOS field effect transistors down to its physical limits. The excellent crystal quality and doping profile is demonstrated by the very good performance of the grown devices.     

Massive assembly of ZnO nanowire-based integrated devices

Although a directed assembly strategy has been utilized for the massive assembly of various nanowires and nanotubes (NWs/NTs), its application has usually been limited to rather small-diameter NWs/NTs prepared in solution. We report two complementary methods for the massive assembly of large-size ZnO nanowires (NWs). In the solution-phase method, ZnO NWs were assembled and aligned selectively onto negatively charged surface patterns in solution. In addition, the substrate bias voltage and capillary forces can be used to further enhance the adsorption rate and degree of alignment of ZnO NWs, respectively. In the direct-transfer method, a NW film grown on a solid substrate was placed in close proximity to?a?molecule-patterned substrate, and ultrasonic vibration was applied so that the NWs were directly transferred and aligned onto the patterned substrate. The solution-phase and direct-transfer methods are complementary to each other and suitable for the assembly of NWs?prepared in solution and on solid substrates, respectively.     

Dielectrophoretic fabrication and characterization of a ZnO nanowire-based UV photosensor

Wide-gap semiconductors with nanostructures such as nanoparticles, nanorods, nanowires are promising as a new type of UV photosensor. Recently, ZnO (zinc oxide) nanowires have been extensively investigated for electronic and optoelectronic device applications. ZnO nanowires are expected to have good UV response due to their large surface area to volume ratio, and they might enhance the performance of UV photosensors. In this paper, a new fabrication method of a UV photosensor based on ZnO nanowires using dielectrophoresis is demonstrated. Dielectrophoresis (DEP) is the electrokinetic motion of dielectrically polarized materials in non-uniform electric fields. ZnO nanowires, which were synthesized by nanoparticle-assisted pulsed-laser deposition (NAPLD) and suspended in ethanol, were trapped in the microelectrode gap where the electric field became higher. The trapped ZnO nanowires were aligned along the electric field line and bridged the electrode gap. Under UV irradiation, the conductance of the DEP-trapped ZnO nanowires exponentially increased with a time constant of a few minutes. The slow UV response of ZnO nanowires was similar to that observed with ZnO thin films and might be attributed to adsorption and photodesorption of ambient gas molecules such as O(2) or H(2)O. At higher UV intensity, the conductance response became larger. The DEP-fabricated ZnO nanowire UV photosensor could detect UV light down to 10?nW?cm(-2) intensity, indicating a higher UV sensitivity than ZnO thin films or ZnO nanowires assembled by other methods.     

A system architecture solution for unreliable nanoelectronic devices

The shrinking of electronic devices will inevitably introduce a growing number of defects and even make these devices more sensitive to external influences. It is, therefore, likely that the emerging nanometer-scale devices will eventually suffer from more errors than classical silicon devices in large scale integrated circuits. In order to make systems based on nanometer-scale devices reliable, the design of fault-tolerant architectures will be necessary. Initiated by von Neumann, the NAND multiplexing technique, based on a massive duplication of imperfect devices and randomized imperfect interconnects, had been studied in the past using an extreme high degree of redundancy. In this paper, this NAND multiplexing is extended to a rather low degree of redundancy, and the stochastic Markov nature in the heart of the system is discovered and studied, leading to a comprehensive fault-tolerant theory. A system architecture based on NAND multiplexing is investigated by studying the problem of the random background charges in single electron tunneling (SET) circuits. It might be a system solution for an ultra large integration of highly unreliable nanometer-scale devices.     

Nanoscale impedance microscopy-a characterization tool for nanoelectronic devices and circuits

A recently developed conductive atomic force microscopy (cAFM) technique, nanoscale impedance microscopy (NIM), is presented as a characterization strategy for nanoelectronic devices and circuits. NIM concurrently monitors the amplitude and phase response of the current through a cAFM tip in response to a temporally periodic applied bias. By varying the frequency of the driving potential, the resistance and reactance of conductive pathways can be quantitatively determined. Proof-of-principle experiments show 10-nm spatial resolution and ideal frequency-dependent impedance spectroscopy behavior for test circuits connected to electron beam lithographically patterned electrode arrays. Possible applications of NIM include defect detection and failure analysis testing for nanoscale integrated circuits.     

Carbon nanotube nanoelectronic devices compatible with transmission electron microscopy

We report on a novel method to fabricate carbon nanotube (CNT) nanoelectronic devices on silicon nitride membrane grids that are compatible with high resolution transmission electron microscopy (HRTEM). Resist-based electron beam lithography is used to fabricate electrodes on 50 nm thin silicon nitride membranes and focused-ion-beam milling is used to cut out a 200 nm gap across a gold electrode to produce the viewing window for HRTEM. Spin-coating and AC electrophoresis are used as methods to deposit small bundles of carbon nanotubes across the electrodes. We demonstrate the viability of this approach by performing both electrical measurements and HRTEM imaging of solution-processed CNTs in a device.     

Fabrication of arrayed Si nanowire-based nano-floating gate memory devices on flexible plastics

Arrayed Si nanowire (NW)-based nano-floating gate memory (NFGM) devices with Pt nanoparticles (NPs) embedded in Al2O3 gate layers are successfully constructed on flexible plastics by top-down approaches. Ten arrayed Si NW-based NFGM devices are positioned on the first level. Cross-linked poly-4-vinylphenol (PVP) layers are spin-coated on them as isolation layers between the first and second level, and another ten devices are stacked on the cross-linked PVP isolation layers. The electrical characteristics of the representative Si NW-based NFGM devices on the first and second levels exhibit threshold voltage shifts, indicating the trapping and detrapping of electrons in their NPs nodes. They have an average threshold voltage shift of 2.5 V with good retention times of more than 5 x 10(4) s. Moreover, most of the devices successfully retain their electrical characteristics after about one thousand bending cycles. These well-arrayed and stacked Si NW-based NFGM devices demonstrate the potential of nanowire-based devices for large-scale integration.     

The fabrication of light-emitting devices from hot-pressed ZnSe powders

A hot-pressing process was developed to synthesize fine ZnSe powders into compacts with high bulk density. The hot-pressed ZnSe powder compacts after an annealing treatment in the Zn-Al alloy melt were readily processed into light-emitting devices based on a metal-semiconductor (M-S) device structure. The fabricated devices are found to emit light in the orange region of the visible spectrum and have a room temperature quantum efficiency of the order of 10^–6 photons/electron in the reverse direction. The photoluminescence and electroluminescence characteristics of the hot-pressed ZnSe powder compacts are also found to be very similar to those observed in single crystal material.     

Plasma anodization of silicon and its application to the fabrication of devices and integrated circuits

Plasma anodization was studied from the viewpoint of its application to the fabrication of devices and integrated circuits.First, the application of plasma anodization to the growth of oxide films by the localized oxidation of silicon process was investigated. A double-mask Al₂O₃/SiO₂ structure was employed as a mask and it was found that the bird's beak structure was suppressed.Secondly, the application of plasma-anodized oxide as the gate oxide of metal/oxide/semiconductor field effect transistors (MOS FETs) was considered. The interface state density in the plasma-anodized SiO₂/Si system was annealed almost completely in an Ar-CCl₄ mixture at 1000°C. P-channel MOS FETs were fabricated. The devices had a threshold voltage of -1.7 V and a mobility of 225 cm² V^-1 s^-1. The dominant neutral trapping centre in the plasma-anodized oxide was found to be the same as that in the thermally grown oxide, and its density was reduced by one order of magnitude after annealing at 1000°C.The feasibility of applying plasma anodization as a low temperature oxidation process for the fabrication of MOS FETs on neutron-irradiated silicon as a semi-insulating substrate and on a film of silicon on sapphire (SOS) was demonstrated. For MOS FETs prepared with neutron-irradiated silicon, the hole mobility was about 100 cm²V^-1s^-1 and the electron mobility was about 300 cm²V^-1s^-1. In addition, depletion mode MOS FETs made with SOS had the same characteristics as those of MOS FETs made by the high temperature process.     

CMOS-compatible fabrication of room-temperature single-electron devices

Devices in which the transport and storage of single electrons are systematically controlled could lead to a new generation of nanoscale devices and sensors. The attractive features of these devices include operation at extremely low power, scalability to the sub-nanometre regime and extremely high charge sensitivity. However, the fabrication of single-electron devices requires nanoscale geometrical control, which has limited their fabrication to small numbers of devices at a time, significantly restricting their implementation in practical devices. Here we report the parallel fabrication of single-electron devices, which results in multiple, individually addressable, single-electron devices that operate at room temperature. This was made possible using CMOS fabrication technology and implementing self-alignment of the source and drain electrodes, which are vertically separated by thin dielectric films. We demonstrate clear Coulomb staircase/blockade and Coulomb oscillations at room temperature and also at low temperatures.     

Extreme sensitivity of the spin-splitting and 0.7 anomaly to confining potential in one-dimensional nanoelectronic devices

Quantum point contacts (QPCs) have shown promise as nanoscale spin-selective components for spintronic applications and are of fundamental interest in the study of electron many-body effects such as the 0.7 × 2e(2)/h anomaly. We report on the dependence of the 1D Landé g-factor g* and 0.7 anomaly on electron density and confinement in QPCs with two different top-gate architectures. We obtain g* values up to 2.8 for the lowest 1D subband, significantly exceeding previous in-plane g-factor values in AlGaAs/GaAs QPCs and approaching that in InGaAs/InP QPCs. We show that g* is highly sensitive to confinement potential, particularly for the lowest 1D subband. This suggests careful management of the QPC's confinement potential may enable the high g* desirable for spintronic applications without resorting to narrow-gap materials such as InAs or InSb. The 0.7 anomaly and zero-bias peak are also highly sensitive to confining potential, explaining the conflicting density dependencies of the 0.7 anomaly in the literature.     

Microcontact printing-based fabrication of digital microfluidic devices

Digital microfluidics is a fluid manipulation technique in which discrete droplets are actuated on patterned arrays of electrodes. Although there is great enthusiasm for the application of this technique to chemical and biological assays, development has been hindered by the requirement of clean room fabrication facilities. Here, we present a new fabrication scheme, relying on microcontact printing (microCP), an inexpensive technique that does not require clean room facilities. In microCP, an elastomeric poly(dimethylsiloxane) stamp is used to deposit patterns of self-assembled monolayers onto a substrate. We report three different microCP-based fabrication techniques: (1) selective etching of gold-on-glass substrates; (2) direct printing of a suspension of palladium colloids; and (3) indirect trapping of gold colloids from suspension. In method 1, etched gold electrodes are used for droplet actuation; in methods 2 and 3, colloid patterns are used to seed electroless deposition of copper. We demonstrate, for the first time, that digital microfluidic devices can be formed by microCP and are capable of the full range of digital microfluidics operations: dispensing, merging, motion, and splitting. Devices formed by the most robust of the new techniques were comparable in performance to devices formed by conventional methods, at a fraction of the fabrication time. These new techniques for digital microfluidics device fabrication have the potential to facilitate expansion of this technology to any research group, even those without access to conventional microfabrication tools and facilities.     

Fast and controllable fabrication of suspended graphene nanopore devices

A poly(methyl methacrylate) assisted dry transfer method was developed to transfer graphene microflake onto a suspended SiN chip in an effective and efficient way for further graphene nanopore drilling for DNA analysis. Graphene microflakes can be patterned by e-beam lithography to a designed shape and size on a large scale of a few thousands simultaneously. Subsequently, individual graphene microflakes can be picked up and transferred to a target hole on a suspended SiN membrane with 1?μm precision via a site-specific transfer-printing method. Nanopores with different diameters from 3 to 20?nm were drilled on the as-transferred graphene membrane in a transmission electron microscope. This method offers a fast and controllable way to fabricate graphene nanopores for DNA analyses.     

Design and fabrication of nanofluidic devices by surface micromachining

Using surface micromachining technology, we fabricated nanofluidic devices with channels down to 10?nm deep, 200?nm wide and up to 8?cm long. We demonstrated that different materials, such as silicon nitride, polysilicon and silicon dioxide, combined with variations of the fabrication procedure, could be used to make channels both on silicon and glass substrates. Critical channel design parameters were also examined. With the channels as the basis, we integrated equivalent elements which are found on micro total analysis (μTAS) chips for electrokinetic separations. On-chip platinum electrodes enabled electrokinetic liquid actuation. Micro-moulded polydimethylsiloxane (PDMS) structures bonded to the devices served as liquid reservoirs for buffers and sample. Ionic conductance measurements showed Ohmic behaviour at ion concentrations above 10?mM, and surface charge governed ion transport below 5?mM. Low device to device conductance variation (1%) indicated excellent channel uniformity on the wafer level. As proof of concept, we demonstrated electrokinetic injections using an injection cross with volume below 50?attolitres (10(-18)?l).     

Electrohydrodynamic atomization approach to graphene/zinc oxide film fabrication for application in electronic devices

Graphene-based composites represent a new class of materials with potential for many applications. Metal, semiconductor, or any polymer properties can be tuned by attaching it to graphene. Here, a new route for fabrication of graphene based composites thin films has been explored. Graphene flakes (<4 layers) and a well-known semiconductor zinc oxide (ZnO) (<50 nm particle size) have been dispersed in N-methylpyrrolidone and ethanol, respectively. Thin film of graphene flakes is deposited and decorated with ZnO nanoparticles to fabricate graphene/ZnO composite thin film on silicon substrate by electro hydrodynamic atomization technique. Graphene/ZnO composite thin film has been characterized morphologically, structurally and chemically. To investigate electronic behavior of the composite thin film, it is deployed as cathode in a diode device i.e. indium tin oxide/poly (3,4-ethylenedioxythiophene) poly (styrenesulfonate)/polydioctylfluorene-benzothiadiazole/(graphene/ZnO). The J–V analysis of diode device has shown that at voltage of 1 V, the current density in organic structure is at low value of 4.69 × 10^?3 A/cm² and when voltage applied voltage is further increased; the device current density has increased by the order of 200 that is 1.034 A/cm² at voltage of 12 V.     

Surface-reactive acrylic copolymer for fabrication of microfluidic devices

A surface-reactive acrylic polymer, poly(glycidyl methacrylate-co-methyl methacrylate) (PGMAMMA), was synthesized and evaluated for suitability as a substrate for fabrication of microfluidic devices for chemical analysis. This polymer has good thermal and optical properties and is mechanically robust for cutting and hot embossing. A key advantage of this polymeric material is that the surface can be easily modified to control inertness and electroosmotic flow using a variety of chemical procedures. In this work, the procedures for aminolysis, photografting of linear polyacrylamide, and atom-transfer radical polymerization on microchannel surfaces in PGMAMMA substrates were developed, and the performance of resultant microfluidic electrophoresis devices was demonstrated for the separation of amino acids, peptides, and proteins. Separation efficiencies as high as 4.6 x 10(4) plates for a 3.5-cm-long separation channel were obtained. The results indicate that PGMAMMA is an excellent substrate for microfabricated fluidic devices, and a broad range of applications should be possible.     

Electron-beam fabrication of high-density amorphous bubble film devices

A low-temperature, all-vacuum process combined with electron-beam lithography suitable for single-level masking devices using 2-μm diameter amorphous bubble films has been developed. A test vehicle which uses 0.75-μm wide chevrons and 1-μm wide T.I bars in an 8,000- bit chip configuration, resulting in an areal density of 1×10⁷bits/in², was used. Important process features are found to be: (1) laminated NiFe films to obtain low Hcand high magneto-resistive effect when deposited at low substrate temperature, (2) maintenance of low surface temperature during metallization to preserve the integrity of exposed and developed electron-beam resist pattern, and (3) proper resist profile for ease of the lift-off process. Excellent bubble device operating characteristics have been obtained as a result of uniformity in materials and structure resulting from careful control of fabrication parameters.     

Lithography-free fabrication of high quality substrate-supported and freestanding graphene devices

We present a lithography-free technique for fabrication of clean, high quality graphene devices. This technique is based on evaporation through hard Si shadow masks, and eliminates contaminants introduced by lithographical processes. We demonstrate that devices fabricated by this technique have significantly higher mobility values than those obtained by standard electron beam lithography. To obtain ultra-high mobility devices, we extend this technique to fabricate suspended graphene samples with mobilities as high as 120 000 cm²/(V·s).     

SOI在高压器件中的应用

综述了绝缘层上的硅(SOI)材料在高压器件中的应用,分析了SOI高压器件的不同结构,并对现在最常用的RESURF LDMOS高压器件结构,以及不同器件参数对击穿电压的影响进行了分析和讨论.     

The influence of fabrication errors on the stopband magnitude responses of SAW devices

This article is devoted to an analysis of the influence of manufacturing errors on the magnitude responses of surface acoustic wave (SAW) devices. Analytical analysis of these random errors provides statistical distributions of the relevant responses and their parameters. It allows significant reduction in the modeling computations compared to the Monte Carlo method, and it provides possibilities for further analytical analysis. After the application of the statistical analysis to different potential structures of SAW devices, it is possible to choose the least sensitive one during the design process without the need of costly trials. Experimental analysis confirmed the existence of some of the features predicted both theoretically and by modeling. The experimental procedure for the evaluation of the fabrication error variances is described. The application of these results to the design process of the SAW devices allows simplification of the requirements for the manufacturing equipment and/or improvement of the devices' parameters, especially stopband suppression.