F等离子体处理增强型及耗尽型AlGaN/GaN HEMT集成的D触发器

耗尽型和F等离子体处理增强型高电子迁移率晶体管（HEMT）被集成在同一圆片上。增强型/耗尽型 HEMT反向器、与非门以及D触发器等直接耦合场效应晶体管逻辑电路被制作在AlGaN/GaN异质结上。D触发器在GaN体系中首次被实现。在电源电压为2伏的条件下,增强型/耗尽型反向器显示输出逻辑摆幅为1.7伏,逻辑低噪声容限为0.49伏,逻辑高噪声容限为0.83伏。与非门和D触发器的功能正确,证实了GaN基数字电路的发展潜力。     

Monolithically integrated enhancement/depletion-mode AlGaN/GaN HEMT D flip-flop using fluorine plasma treatment

Depletion-mode and enhancement-mode AlGaN/GaN HEMTs using fluorine plasma treatment were integrated on one wafer.Direct-coupled FET logic circuits,such as an E/D HEMT inverter,NAND gate and D flip-flop,were fabricated on an AlGaN/GaN heterostructure.The D flip-flop and NAND gate are demonstrated in a GaN system for the first time.The dual-gate AlGaN/GaN E-HEMT substitutes two single-gate E-HEMTs for simplifying the NAND gate and shrinking the area,integrating with a conventional AlGaN/GaN D-HEMT and demonstrating a NAND gate.E/D-mode D flip-flop was fabricated by integrating the inverters and the NAND gate on the AlGaN/GaN heterostructure.At a supply voltage of 2 V,the E/D inverter shows an output logic swing of 1.7 V,a logic-low noise margin of 0.49 V and a logic-high noise margin of 0.83 V.The NAND gate and D flip-flop showed correct logic function demonstrating promising potential for GaN-based digital ICs.     

Characterization of heterostructure complementary MISFET circuits employing the new gate current model

A complementary logic circuit employing heterostructure MISFET's is shown to have a larger logic swing and noise margin than an E/D MESFET logic circuit. The noise margin is calculated using a new gate current model that is derived by taking into account the small surface potential dependence on the gate voltage at the heterointerface. The circuit simulation indicates that, for multi-input logic gates, a NAND gate configuration is superior to a NOR gate configuration from the viewpoints of noise margin and switching speed. The normalized high- and low-level noise margins are comparatively balanced (34 and 49 percent) for a three-input NAND gate. For a fan-in/fan-out of 3/3 and a 100-fF wiring capacitance condition, a 54-ps delay time and 57-μW power dissipation/gate at a 100-MHz clock frequency are possible for a NAND gate with 0.5-μm gate-length MISFET's at 77 K.     

High-Temperature Operation of AlGaN/GaN HEMTs Direct-Coupled FET Logic (DCFL) Integrated Circuits

This letter presents the high-temperature performance of AlGaN/GaN HEMT direct-coupled FET logic (DCFL) integrated circuits. At 375 degC, enhancement-mode (E-mode) AlGaN/GaN HEMTs which are used as drivers in DCFL circuits exhibit proper E-mode operation with a threshold voltage (V_TH) of 0.24 V and a peak current density of 56 mA/mm. The monolithically integrated E/D-mode AlGaN/GaN HEMTs DCFL circuits deliver stable operations at 375 degC: An E/D-HEMT inverter with a drive/load ratio of 10 exhibits 0.1 V for logic-low noise margin (NM_L) and 0.3 V for logic-high-noise margin (NM_H) at a supply voltage (V_DD) of 3.0 V; a 17-stage ring oscillator exhibits a maximum oscillation frequency of 66 MHz, corresponding to a minimum propagation delay ( tau_pd) of 446 ps/stage at V_DD of 3.0 V     

Planar integration of E/D-mode AlGaN/GaN HEMTs using fluoride-based plasma treatment

A planar-fabrication technology for integrating enhancement/depletion (E/D)-mode AlGaN/GaN high-electron mobility transistors (HEMTs) has been developed. The technology relies heavily on CF/sub 4/ plasma treatment, which is used in two separate steps to achieve two objectives: 1) active device isolation and 2) threshold-voltage control for the enhancement-mode HEMT formation. Using the planar process, depletion- and enhancement-mode AlGaN/GaN HEMTs are integrated on the same chip, and a direct-coupled FET logic inverter is demonstrated. Compared with the devices fabricated by a standard mesa-etching technique, the HEMTs by a planar process have comparable dc and RF characteristics with no obvious difference in the device isolation. The device isolation by a plasma treatment remains the same after 400 /spl deg/C annealing, indicating a good thermal stability. At a supply voltage (V/sub DD/) of 3.3 V, the E/D-mode inverters show an output swing of 2.85 V, with the logic-low and logic-high noise margins at 0.34 and 1.47 V, respectively.     

F等离子体处理增强型及耗尽型AlGaN/GaN HEMT集成SRAM单元电路和电平转换电路

我们设计并且制备了GaN基增强型/耗尽型（E/D 模）直接耦合6管静态随机存取存储器（SRAM）单元电路和电平转换电路。利用氟等离子处理工艺,使用适中的AlGaN势垒层厚度异质结材料,增强型和耗尽型铝镓氮/氮化镓 HEMTs被集成在了同一个晶片上。六管SRAM单元由对称的两个E/D模反相器和增强型开关管组成。在1V的工作电压下,SRAM单元电路的输出高电平和低电平分别为0.95V和0.07V。电平转换电路的工作电压为+6V和-6V,通过4个串联的镍-铝镓氮/氮化镓肖特基二极管使电压降低。通过轮流控制电平转换电路的两个反相器模块的开关状态,电平转换电路输出两路电压,分别为-0.5V和-5V。电平转换器的翻转电压为0.76V。SRAM单元电路和电平转换电路都能正确地工作,展现了氮化镓基E/D模数字和模拟集成电路的潜力。提出了几条设计上的考虑,以避免阈值电压的漂移对电路工作造成的影响。     

含有Al组分阶变AlGaN过渡层的Si基AlGaN/GaN HEMT

采用一个AlN缓冲层和两个Al组分阶变的AlGaN过渡层作为中间层,在76.2mm Si衬底上外延生长出1.7μm厚无裂纹AlGaN/GaN异质结材料,利用原子力显微镜、X射线衍射、Hall效应测量和CV测量等手段对材料的结构特性和电学性能进行了表征。材料表面平整光滑,晶体质量和电学性能良好,2DEG面密度为1.12×1013cm-2,迁移率为1 208cm2/(V.s)。由该材料研制的栅长为1μm的AlGaN/GaN HEMT器件,电流增益截止频率fT达到10.4GHz,这些结果表明组分阶变AlGaN过渡层技术可用于实现高性能Si基GaN HEMT。     

Integrated circuits using fully solution-processed organic TFT devices with printed silver electrodes

We have demonstrated fully solution-processed inverter, NAND and NOR circuits using pseudo-CMOS logic and p-type organic TFT devices with printed electrodes that were fabricated using ink-jet printed silver nanoparticle inks at low temperatures. In order to optimize the gate electrode profiles, we thoroughly assessed the surface wettability of the silver nanoparticle inks. The pseudo-CMOS inverter circuit exhibited exceptional switching characteristics with a high signal gain of 34 at a supply voltage of 20 V. The NAND and NOR circuits also exhibited excellent logic characteristics, whereby the switching voltage was approximately V_DD/2 with a high noise margin and short delay time of 12.5 ms.     

AlGaN/GaN metal-oxide semiconductor heterostructure field-effect transistor with photo-chemical-vapor deposition SiO<Subscript>2</Subscript> gate oxide

High-quality SiO₂ was successfully deposited onto GaN by photo-chemicalvapor deposition (photo-CVD) using a D₂ lamp as the excitation source. The AlGaN/GaN metal-oxide semiconductor, heterostructure field-effect transistors (MOSHFETs) were also fabricated with photo-CVD oxide as the insulating layer. Compared with AlGaN/GaN metal-semiconductor HFETs (MESHFETs) with similar structure, we found that we could reduce the gate-leakage current by more than four orders of magnitude by inserting the photo-CVD oxide layer in between the AlGaN/GaN and the gate metal. With a 2-μm gate, it was found that the saturated I_ds, maximum g_m, and gate-voltage swing (GVS) of the fabricated nitride-based MOSHFET were 512 mA/mm, 90.7 mS/mm, and 6 V, respectively.     

High-performance enhancement-mode AlGaN/GaN HEMTs using fluoride-based plasma treatment

We report a novel approach in fabricating high-performance enhancement mode (E-mode) AlGaN/GaN HEMTs. The fabrication technique is based on fluoride-based plasma treatment of the gate region in AlGaN/GaN HEMTs and post-gate rapid thermal annealing with an annealing temperature lower than 500/spl deg/C. Starting with a conventional depletion-mode HEMT sample, we found that fluoride-based plasma treatment can effectively shift the threshold voltage from -4.0 to 0.9 V. Most importantly, a zero transconductance (g/sub m/) was obtained at V/sub gs/=0 V, demonstrating for the first time true E-mode operation in an AlGaN/GaN HEMT. At V/sub gs/=0 V, the off-state drain leakage current is 28 /spl mu/A/mm at a drain-source bias of 6 V. The fabricated E-mode AlGaN/GaN HEMTs with 1 /spl mu/m-long gate exhibit a maximum drain current density of 310 mA/mm, a peak g/sub m/ of 148 mS/mm, a current gain cutoff frequency f/sub T/ of 10.1 GHz and a maximum oscillation frequency f/sub max/ of 34.3 GHz.     

4 W/mm蓝宝石衬底AlGaN/GaN HEMT

报道了利用南京电子器件研究所生长的蓝宝石衬底AlGaN/GaN异质结材料制作的HEMT,器件功率输出密度达4W/mm。通过材料结构及生长条件的优化,利用MOCVD技术获得了二维电子气(2DEG)面密度为0.97×1013cm-2、迁移率为1000cm2/Vs的AlGaN/GaN异质结构材料,用此材料完成了栅长1μm、栅宽200μm AlGaN/GaN HEMT器件的研制。小信号测试表明器件的fT为17GHz、最高振荡频率fmax为40GHz;负载牵引测试得到2GHz下器件的饱和输出功率密度为4.04W/mm。     

基于MOCVD再生长n+ GaN 欧姆接触工艺fT/fmax＞150/210 GHz的AlGaN/GaN HFETs器件研究

基于SiC衬底AlGaN/GaN异质结材料研制具有高电流增益截止频率(fT)和最大振荡频率(fmax)的AlGaN/GaN异质结场效应晶体管(HFETs).基于MOCVD外延n+ GaN 欧姆接触工艺实现了器件尺寸的缩小, 有效源漏间距(Lsd)缩小至600 nm.此外, 采用自对准工艺制备了60 nm T型栅.由于器件尺寸的缩小, 在Vgs=2 V下, 器件最大饱和电流(Ids)达到2.0 A/mm, 该值为AlGaN/GaN HFETs器件直流测试下的最高值, 器件峰值跨导达到608 mS/mm.小信号测试表明, 器件fT和fmax最高值分别达到152 GHz和219 GHz.     

High-power monolithic AlGaN/GaN HEMT oscillator

A monolithic X-band oscillator based on an AlGaN/GaN high electron mobility transistor (HEMT) has been designed, fabricated, and characterized. A common-gate HEMT with 1.5 mm of gate width in conjunction with inductive feedback is used to generate negative resistance. A high Q resonator is implemented with a short-circuit low-loss coplanar waveguide transmission line. The oscillator delivers 1.7 W at 9.556 GHz into 50-/spl Omega/ load when biased at V/sub ds/=30 V and V/sub gs/=-5 V, with dc-to-RF efficiency of 16%. Phase noise was estimated to be -87 dBc/Hz at 100-kHz offset. Low-frequency noise, pushing and pulling figures, and time-domain characterization have been performed. Experimental results show great promise for AlGaN/GaN HEMT MMIC technology to be used in future high-power microwave source applications.     

GaN/AlGaN p-channel inverted heterostructure JFET

A novel GaN/AlGaN p-channel inverted heterostructure junction field-effect transistor (HJFET) with a n/sup +/-type gate is proposed and demonstrated. A new superlattice aided strain compensation techniques was used for fabricating high quality GaN/AlGaN p-n junction. The p-channel HJFET gate leakage current was below 10 nA, and the threshold voltage was 8 V, which is close to that of typical n-channel HFETs. This new HJFET device opens up a way for fabricating nitride based complimentary integrated circuits.     

InAlN/AlN/GaN HEMT器件特性研究

通过利用MOCVD生长的高质量蓝宝石衬底InAlN/AlN/GaN异质结材料,获得了高的二维电子气面密度,其值为1.65×10<'13>cm<'-2>.通过该结构制备了0.15 μm栅长InAlN/AIN/GaN HEMT器件,获得了相关的电学特性:最大电流密度为1.3A/mm,峰值跨导为260mS/ram,电流增益截...     

磁控溅射AlN介质MIS栅结构的AlGaN/GaN HEMT

报道了一种X波段输出功率密度达10.4W/mm的SiC衬底AlGaN/GaN MIS-HEMT。器件研制中采用了MIS结构、凹槽栅以及场板,其中MIS结构中采用了磁控溅射的AlN介质作为绝缘层。采用MIS结构后,器件击穿电压由80V提高到了180V以上,保证了器件能够实现更高的工作电压。在8GHz、55V的工作电压下,研制的1mm栅宽AlGaN/GaN MIS-HEMT输出功率达到了10.4W,此时器件的功率增益和功率附加效率分别达到了6.56dB和39.2%。     

Gate control, surface leakage currents, and peripheral charging in AlGaN/GaN heterostructure field effect transistors having nanometer-scale schottky gates

Gate control properties together with gate leakage currents in AlGaN/GaN heterostructure field effect transistors (HFETs) with nanometer-scale Schottky gates were investigated, focusing on the effects of AlGaN surfaces at the gate periphery. Fabricated AlGaN/GaN HFETs showed unexpectedly small gate length (L_G) dependence of transconductance, g_m. Comparing the transfer characteristics from theory and experiment, effective L_G values in the fabricated devices were found to be much longer than the geometrical size on the order of 100 nm, indicating the formation of virtual gates. Detailed analysis of the gate leakage current behaviors based on a thin surface barrier model showed the presence of a strong electric field at the gate periphery. The mechanism of the virtual gate formation was discussed based on the obtained nanometer-scale Schottky gate behaviors.     

AlN阻挡层对AlGaN/GaNHEMT器件的影响

利用低压MOCVD技术在蓝宝石衬底上生长了AlGaN/GaN异质结和AlGaN/AlN/GaN异质结二维电子气材料,采用相同器件工艺制造出了AlGaN/GaN HEMT器件和AlGaN/AlN/GaN HEMT器件.通过对两种不同器件的比较和讨论,研究了AlN阻挡层的增加对AlGaN/GaN HEMT器件性能的影响.     

Characterization and modeling of AlGaN/GaN MOS capacitor with leakage for large signal transistor modeling

Dual mode AlGaN/GaN metal oxide semiconductor (MOS) heterostructure field-effect transistor (HFET) devices were fabricated and characterized. In HFET mode of operation the devices showed an f/sub t//spl middot/L/sub g/ product of 12GHz/spl middot//spl mu/m at Vgs=-2 V. The AlGaN devices showed formation of an accumulation layer under the gate in forward bias and a f/sub t//spl middot/L/sub g/ product of 6GHz/spl middot//spl mu/m was measured at Vgs=5 V. A novel piecewise small signal model for the gate capacitance of MOS HFET devices is presented and procedures to extract the capacitance in presence of gate leakage are outlined. The model accurately fits measured data from 45MHz to 10GHz over the entire bias range of operation of the device.     

AlGaN/GaN MIS-HFETs with f/sub T/ of 163 GHz using cat-CVD SiN gate-insulating and passivation Layers

Al/sub 0.4/Ga/sub 0.6/N/GaN heterostructure field-effect transistors (HFETs) with an AlGaN barrier thickness of 8 nm and a gate length (L/sub G/) of 0.06-0.2 /spl mu/m were fabricated on a sapphire substrate. We employed two novel techniques, which were thin, high-Al-composition AlGaN barrier layers and SiN gate-insulating, passivation layers formed by catalytic chemical vapor deposition, to enhance high-frequency device characteristics by suppressing the short channel effect. The HFETs with L/sub G/=0.06-0.2 /spl mu/m had a maximum drain current density of 1.17-1.24 A/mm at a gate bias of +1.0 V and a peak extrinsic transconductance of 305-417 mS/mm. The current-gain cutoff frequency (f/sub T/) was 163 GHz, which is the highest value to have been reported for GaN HFETs. The maximum oscillation frequency (f/sub max/) was also high, and its value derived from the maximum stable gain or unilateral gain was 192 or 163 GHz, respectively.