CMOS-compatible surface-micromachined suspended-spiral inductors for multi-GHz silicon RF ICs

Fully CMOS-compatible, highly suspended spiral inductors have been designed and fabricated on standard silicon substrates (1/spl sim/30 /spl Omega//spl middot/cm in resistivity) by surface micromachining technology (no substrate etch involved). The RF characteristics of the fabricated inductors have been measured and their equivalent circuit parameters have been extracted using a conventional lumped-element model. We have achieved a high peak Q-factor of 70 at 6 GHz with inductance of 1.38 nH (at 1 GHz) and a self-resonant frequency of over 20 GHz. To the best of our knowledge, this is the highest Q-factor ever reported on standard silicon substrates. This work has demonstrated that the proposed microelectromechanical systems (MEMS) inductors can be a viable technology option to meet the today's strong demands on high-Q on-chip inductors for multi-GHz silicon RF ICs.     

Experimental analysis of the effect of metal thickness on the quality factor in integrated spiral inductors for RF ICs

The effect of metal thickness on the quality (Q-) factor of the integrated spiral inductor is investigated in this paper. The inductors with metal thicknesses of 5/spl sim/22.5 /spl mu/m were fabricated on the standard silicon substrate of 1/spl sim/30 /spl Omega//spl middot/cm in resistivity by using thick-metal surface micromachining technology. The fabricated inductors were measured at GHz ranges to extract their major parameters (Q-factor, inductance, and resistance). From the experimental analysis assisted by FEM simulation, we first reported that the metal thickness' effect on the Q-factor strongly depends on the innermost turn diameter of the spiral inductor, so that it is possible to improve Q-factors further by increasing the metal thickness beyond 10 /spl mu/m.     

High-performance inductors on plastic substrate

Wafer-transfer technology (WTT) has been applied to transfer RF inductors from a silicon wafer to an opaque plastic substrate (FR-4). By completely eliminating silicon substrate, the high performance of integrated inductors (Q-factor > 30 for inductance /spl sim/3 nH with resonant frequency /spl sim/23 GHz) has been achieved. Based on the analysis of a modified /spl pi/-network model, our results suggest that the performance limitation is switched from being a synthetic mechanism of substrate and metal-ohmic losses on low resistivity Si-substrate to merely a metal-ohmic loss on FR-4. Thus, the inductor patterns, which are optimized currently for RFICs on silicon wafer, can be further optimized to take full advantage of the WTT on new substrate from the newly obtained design freedom.     

Fabrication and performance of a novel suspended RF spiral inductor

A novel suspended radio frequency (RF) spiral inductor was fabricated on glass substrate by using the microelectromechanical systems (MEMS) technology. The suspended spiral inductor is sustained with the T-shaped pillars. Great improvements in Q-factor have been achieved because of the separation between the substrate and the inductor. In the fabrication process, fine polishing of the photoresist is used to simplify the processes and ensure the seed layer and the pillars contact perfectly, and dry etching technique is used to remove the seed layer. The inductance and Q-factor are measured using the HP 8722D network analyzer in the frequency range of 0.05-10 GHz. The maximum quality factor of this inductor is 37 for the inductance of 4.2 nH with a suspended height of 60 /spl mu/m. Also, the relationship between the maximum quality factor and the suspended height were studied; the maximum quality factor grows gradually with the increase of the suspended height.     

CMOS-compatible micromachined edge-suspended spiral inductors with high Q-factors and self-resonance frequencies

This paper reports a new category of high-Q edge-suspended inductors (ESI) that are fabricated using CMOS-compatible micromachining techniques. This structure was designed based on the concept that the current was crowded at the edges of the conducting metal wires at high frequencies due to the proximity effect. The substrate coupling and loss can be effectively suppressed by removing the silicon around and underneath the edges of the signal lines. Different from the conventional air-suspended inductors that have the inductors built on membranes or totally suspended in the air, the edge-suspended structures have the silicon underneath the center of the metal lines as the strong mechanical supports. The ESIs are fabricated using a combination of deep dry etching and anisotropic wet etching techniques that are compatible with CMOS process. For a three-turn 4.5-nH inductor, a 70% increase (from 6.8 to 11.7) in maximum Q-factor and a 57% increase (from 9.1 to 14.3 GHz) in self-resonance frequency were obtained with a 11-/spl mu/m suspended edge in 25-/spl mu/m-wide lines.     

双层悬空结构射频微电感制作研究

利用MEMS工艺制作了一种双层悬空结构的圆形射频微电感,研究了双层结构微电感中微带线宽度对其性能的影响。研究表明,双层悬空结构的圆形射频微电感不仅具有较大的电感量,而且其Q值也较高;双层微电感的Q值随微带线宽度的增大而升高,而电感量则随微带线宽度的增大而降低。对于微带线宽度为60μm的双层微电感,在频率2～4GHz时,其电感量可达到5nH左右,Q值达到20。     

Packaging-compatible high Q microinductors and microfilters forwireless applications

To meet requirements in mobile communication and microwave integrated circuits, miniaturization of the inductive components that many of these systems require is of key importance. At present, active circuitry is used which simulates inductor performance and which has high Q-factor and inductance; however, such circuitry has higher power consumption and higher potential for noise injection than passive inductive components. An alternate approach is to fabricate integrated inductors, in which lithographic techniques are used to pattern an inductor directly on a substrate or a chip. However, integrated inductors can suffer from low Q-factor and high parasitic effects due to substrate proximity. To expand the range of applicability of integrated microinductors at high frequency, their electrical characteristics, especially quality factor, should be improved. In this work, integrated spiral microinductors suspended (approximately 60 μm) above the substrate using surface micromachining techniques to reduce the undesirable effect of substrate proximity on the inductor performance are investigated. The fabricated inductors have inductances ranging from 15-40 nH and Q-factors ranging from 40-50 at frequencies of 0.9-2.5 GHz. Microfilters based on these inductors are also investigated by combining these inductors with integrated polymer filled composite capacitors     

Thermal effects in suspended RF spiral inductors

Self-heating effects on integrated suspended and bulk spiral inductors are explored. A dc current is fed through the inductors during measurement to emulate dc and radio frequency power loss on the inductor. A considerable drop in Q by /spl sim/18% at 36.5 mW is observed for suspended coils with 3-/spl mu/m aluminum metallization compared to reference inductors on bulk-Si. Simulations in Ansoft's ePhysics indicate that, due to the thermal isolation of the suspended coil, the power loss from resistive self-heating in the metal has to be transferred outwards through the metal turns. This also results in a thermal time constant. This time constant is measured to be /spl sim/10 ms, meaning that it can affect power circuits operating in pulsed mode.     

Design and modeling of a micromachined high-Q tunable capacitor with large tuning range and a vertical planar spiral inductor

In wireless communication systems, passive elements including tunable capacitors and inductors often need high quality factor (Q-factor). In this paper, we present the design and modeling of a novel high Q-factor tunable capacitor with large tuning range and a high Q-factor vertical planar spiral inductor implemented in microelectromechanical system (MEMS) technology. Different from conventional two-parallel-plate tunable capacitors, the novel tunable capacitor consists of one suspended top plate and two fixed bottom plates. One of the two fixed plates and the top plate form a variable capacitor, while the other fixed plate and the top plate are used to provide electrostatic actuation for capacitance tuning. For the fabricated prototype tunable capacitors, a maximum controllable tuning range of 69.8% has been achieved, exceeding the theoretical tuning range limit (50%) of conventional two-parallel-plate tunable capacitors. This tunable capacitor also exhibits a very low return loss of less than 0.6 dB in the frequency range from 45 MHz to 10 GHz. The high Q-factor planar coil inductor is first fabricated on a silicon substrate and then assembled to the vertical position by using a novel three-dimensional microstructure assembly technique called plastic deformation magnetic assembly (PDMA). Inductors of different dimensions are fabricated and tested. The S-parameters of the inductors before and after PDMA are measured and compared, demonstrating superior performance due to reduced substrate loss and parasitics. The new vertical planar spiral inductor also has the advantage of occupying much smaller silicon areas than the conventional planar spiral inductors.     

High Q multilayer spiral inductor on silicon chip for 5/spl sim/6 GHz

High Q-values of spiral inductors at frequency around 5/spl sim/6 GHz have been achieved with a multilayer spiral (MLS) structure on a high loss silicon substrate. Compared to a one-layer spiral (OLS) inductor, the Q-value of a 4-nH inductor has been improved by about 80% at 5.65 GHz. The impact of the structure on Q-value and resonant frequency has been analyzed, which shows that an optimal height for the via of MLS inductors should be considered when inductors are designed. The fabrication process is compatible with Cu/SiO/sub 2/ interconnect technology.     

双层螺旋RF MEMS电感的模拟与设计

分析了双层螺旋电感的等效电路模型,研究了一种与传统CMOS工艺兼容的MEMS工艺,通过腐蚀电感结构下的硅衬底使电感悬空.利用HFSS软件对一些双层螺旋微电感进行了模拟,模拟结果表明,相比传统单层电感,双层电感可以减少60%的芯片面积,10nH的电感也只需要很小的面积,经过MEMS后处理的双层螺旋电感的最大Q值都超过了20.     

Failure mode analysis of MEMS suspended inductors under mechanical shock

Micro-electromechanical system (MEMS) suspended inductors have been widely studied in recent decades because of their excellent radio frequency performance. However, few studies have been performed on the failure analysis of MEMS suspended inductors under mechanical shock. In this study, the failure of MEMS suspended inductors with a planar spiral coil is investigated through analytical and experimental methods. We present a stress and deformation analysis to study the failure mode of the suspended inductors under shock. To verify the theoretical analysis, MEMS inductors are designed and fabricated, and shock tests are carried out. The shock tests show that the failure mode of the MEMS suspended inductors is a fracture that occurs at the ends of the inductor coil, and the test results agree with the theoretical analysis.     

Large Q-factor improvement for spiral inductors on silicon using proton implantation

We have improved the Q-factor of a 4.6 nH spiral inductor, fabricated on a standard Si substrate, by more than 60%, by using an optimized proton implantation process. The inductor was fabricated in a 1-poly-6-metal process, and implanted after processing. The implantation increased the substrate impedance by /spl sim/ one order of magnitude without disturbing the inductor value before resonance. The S-parameters were well described by an equivalent circuit model. The significantly improved inductor performance and VLSI-compatible process makes the proton implantation suitable for high performance RF ICs.     

High-performance inductors integrated on porous silicon

To study the substrate effect on inductor performance, several types of spiral inductors were fabricated on porous silicon (PS), p/sup -/ and p/sup +/ silicon substrate. /spl pi/-network analysis results show that the use of PS effectively reduces the shunt conductance and capacitance. The analysis further shows that the use of PS significantly reduces the eddy current portion of series resistance of inductor, leading to slower increase of the apparent series resistance with increasing frequency. Higher Q-factor and resonant frequency (f/sub r/) result from the reduced shunt conductance, shunt capacitance, and frequency dependence of series resistance. Inductors fabricated on PS regions are subjected to a much less stringent set of constraints than those on bulk Si substrate, allowing for much higher inductance to be achieved without severe sacrifice in Q-factor and f/sub r/. Similarly, much higher Q-factor can be obtained for reasonable inductance and f/sub r/.     

Surface micromachined solenoid on-Si and on-glass inductors for RFapplications

RF performance of surface micromachined solenoid on-chip inductors fabricated on a standard silicon substrate (10 Ω·cm) has been investigated and the results are compared with the same inductors on glass. The solenoid inductor on Si with a 15-μm thick insulating layer achieves peak quality (Q-) factor of 16.7 at 2.4 GHz with inductance of 2.67 nH. This peak Q-factor is about two-thirds of that of the same inductor fabricated on glass. The highest performance has been obtained from the narrowest-pitched on-glass inductor, which shows inductance of 2.3 nH, peak Q-factor of 25.1 at 8.4 GHz, and spatial inductance density of 30 nH/mm². Both on-Si and on-glass inductors have been modeled by lumped circuits, and the geometrical dependence of the inductance and Q-factor have been investigated as well     

Development of RF/microwave on-chip inductors using an organic micromachining process

The design and development of a micromachined spiral inductor using an organic micromachining process are presented. The process utilizes an ultra-thick negative photoresist SU-8 to elevate an inductor structure above a substrate. The micromachined inductors have been designed and fabricated on solid and hollow ground planes to, investigate the feasibility for achieving high Q-factors. The experimental results demonstrate that a micromachined inductor integrated on a Si substrate achieves a Q-factor of 19.3 at 2.1 GHz.     

High-Q factor three-dimensional inductors

In this paper, the great flexibility of three-dimensional (3-D) monolithic-microwave integrated-circuit technology is used to improve the performance of on-chip inductors. A novel topology for high-Q factor spiral inductor that can be implemented in a single or multilevel configuration is proposed. Several inductors were fabricated on either silicon substrate (/spl rho/ = 30 /spl Omega/ /spl middot/ cm) or semi-insulating gallium-arsenide substrate demonstrating, more particularly, for GaAs technology, the interest of the multilevel configuration. A 1.38-nH double-level 3-D inductor formed on an Si substrate exhibits a very high peak Q factor of 52.8 at 13.6 GHz and a self-resonant frequency as high as 24.7 GHz. Our 4.9-nH double-level GaAs 3-D inductor achieves a peak Q factor of 35.9 at 4.7 GHz and a self-resonant frequency of 8 GHz. For each technology, the performance limits of the proposed inductors in terms of quality factor are discussed. Guidelines for the optimum design of 3-D inductors are provided for Si and GaAs technologies.     

RF inductors with suspended and copper coated thick crystalline silicon spirals for monolithic MEMS LC circuits

This letter presents a novel radio frequency (RF) inductor in a monolithic inductor-capacitor circuit developed by using micro-electromechanical systems (MEMS) fabrication technology. The inductor consists of 40-/spl mu/m-thick single crystalline silicon spiral with copper surface coating as the conductor, which is suspended on a glass substrate. The fabricated inductor exhibits a self-resonance frequency higher than 15GHz, with the quality factor more than 35 and inductance over 5nH at 11.3GHz. Simulations based on a compact equivalent circuit model with parameters extracted using a characteristic-function approach have also been carried out for the inductor, and good agreement with measurements is obtained.     

A small OCA on a 1/spl times/0.5-mm/sup 2/ 2.45-GHz RFID Tag-design and integration based on a CMOS-compatible manufacturing technology

This letter reports, for the first time, on the design strategy and process integration for a small on-chip-antenna (OCA) with a radio-frequency identification (RFID) tag chip-area /spl sim/1/spl times/0.5 mm/sup 2/. It is designed based on a 2.45-GHz RFID tag circuit with an inductive-coupling model. A patterned Al shielding layer is used to improve the consistency of the actual performance obtained from fabricated devices and those predicated from the design. The antenna's inductor coils were fabricated based on a conventional Cu-Damascene process. To achieve the required antenna performance (e.g., Q-factor), a set of thick USG and deep-via etch processes were specifically developed. Our results demonstrate that the dc power converted by the OCA is sufficient to enable the RFID tag chip to communicate with a corresponding 2.45-GHz RFID reader with a 1-mm distance.     

SOI technology for radio-frequency integrated-circuit applications

This paper presents a silicon-on-insulator (SOI) integration technology, including structures and processes of OFF-gate power nMOSFETs, conventional lightly doped drain (LDD) nMOSFETs, and spiral inductors for radio frequency integrated circuit (RFIC) applications. In order to improve the performance of these integrated devices, body contact under the source (to suppress floating-body effects) and salicide (to reduce series resistance) techniques were developed for transistors; additionally, locally thickened oxide (to suppress substrate coupling) and ultra-thick aluminum up to 6 /spl mu/m (to reduce spiral resistance) were also implemented for spiral inductors on high-resistivity SOI substrate. All these approaches are fully compatible with the conventional CMOS processes, demonstrating devices with excellent performance in this paper: 0.25-/spl mu/m gate-length offset-gate power nMOSFET with breakdown voltage (BV/sub DS/) /spl sim/ 22.0 V, cutoff frequency (f/sub T/)/spl sim/15.2 GHz, and maximal oscillation frequency (f/sub max/)/spl sim/8.7 GHz; 0.25-/spl mu/m gate-length LDD nMOSFET with saturation current (I/sub DS/)/spl sim/390 /spl mu/A//spl mu/m, saturation transconductance (g/sub m/)/spl sim/197 /spl mu/S//spl mu/m, cutoff frequency /spl sim/ 25.6 GHz, and maximal oscillation frequency /spl sim/ 31.4 GHz; 2/5/9/10-nH inductors with maximal quality factors (Q/sub max/) 16.3/13.1/8.95/8.59 and self-resonance frequencies (f/sub sr/) 17.2/17.7/6.5/5.8 GHz, respectively. These devices are potentially feasible for RFIC applications.