Graphene-graphite oxide field-effect transistors

Graphene's high mobility and two-dimensional nature make it an attractive material for field-effect transistors. Previous efforts in this area have used bulk gate dielectric materials such as SiO(2) or HfO(2). In contrast, we have studied the use of an ultrathin layered material, graphene's insulating analogue, graphite oxide. We have fabricated transistors comprising single or bilayer graphene channels, graphite oxide gate insulators, and metal top-gates. The graphite oxide layers show relatively minimal leakage at room temperature. The breakdown electric field of graphite oxide was found to be comparable to SiO(2), typically ~1-3 × 10(8) V/m, while its dielectric constant is slightly higher, κ ≈ 4.3.     

Proton-induced failures in high-power field-effect transistors

The effect of 1000-MeV protons on high-power metal-oxide-semiconductor field-effect transistors (MOSFETs) manufactured using microelectronic technology has been studied. It is established that high-energy proton bombardment leads to breakdown of the gate insulator (oxide) in the MOSFET structure that results in a “catastrophic” failure of the device. A model explaining the appearance of these failures is proposed that is based on the formation of fast residual particles as a result of nuclear reactions between high-energy protons and nuclei of the semiconductor material.     

Organic field-effect transistors using perylene

Organic thin-film field-effect transistors using organic semiconductor, perylene are fabricated, and electrical measurements are performed. The field-effect mobility of the device using perylene shows only p-type behavior while the electron and hole mobilities of its single crystal form are 5.5 and 0.5 cm²/V s, respectively. Stacked layers of perlyene (a layer fabricated with low deposition rate followed by another layer with high deposition rate) are formed for the active layer. Furthermore, hexadecafluorocopperphthalocyanine (F₁₆CuPc) and pentacene buffer layers are also used to modify the interface. For all of these devices, perylene layers acts as p-type. Electron trapping at grain boundaries and interface is thought to be a crucial factor. Hole mobility of 3.9×10⁻⁴ cm²/V s is obtained for the perylene film field-effect transistor device.     

Carbon nanotube multi-channeled field-effect transistors

Field-effect transistors (FETs) with multiple channels of single-wall carbon nanotubes (SWCNTs) have been constructed. SWCNT channels of the FETs are dispersedly aligned between the source and the drain by electric-field manipulation of surface decorated SWCNTs. The obtained multichanneled FETs not only can meet the requirement of large output current and high transconductance, but also manifested good reliability and applicability. It is found that the transconductance of the multi-channel FET has an almost linear dependency on the SWCNT channel number, which opens up a promising way to tune the transconductance of FETs by controlling the channel number.     

The origin of varistor property of SrTiO3-based ceramics

The role of oxygen in the heat-treatment process of SrTiO₃ varistor ceramics has been investigated in this paper. The varistor voltage of SrTiO₃ ceramics has been found to be independent of the sample thickness and it increases with the heat-treatment temperature. It has been further revealed that the dielectric property is mainly governed by a highly resistive surface layer. The XPS results of Mn 2p and O 1s suggest that the surface layer is formed by oxygen diffusion and surface chemisorption at grain boundaries during the heat treatment in air. The chemisorption of oxygen in grain boundaries, which leads to the highly resistive surface layer, is the origin of the varistor property of SrTiO₃ ceramics.     

Recent progress in photoactive organic field-effect transistors

Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts.     

Effect of self-assembled monolayers on charge injection and transport in poly(3-hexylthiophene)-based field-effect transistors at different channel length scales

Charge injection and transport in bottom-contact regioregular-poly(3-hexylthiophene) (rr-P3HT) based field-effect transistors (FETs), wherein the Au source and drain contacts are modified by self-assembled monolayers (SAMs), is reported at different channel length scales. Ultraviolet photoelectron spectroscopy is used to measure the change in metal work function upon treatment with four SAMs consisting of thiol-adsorbates of different chemical composition. Treatment of FETs with electron-poor (electron-rich) SAMs resulted in an increase (decrease) in contact metal work function because of the electron-withdrawing (-donating) tendency of the polar molecules. The change in metal work function affects charge injection and is reflected in the form of the modulation of the contact resistance, R(C). For example, R(C) decreased to 0.18 MΩ in the case of the (electron-poor) 3,5-bis-trifluoromethylbenzenethiol treated contacts from the value of 0.61 MΩ measured in the case of clean Au-contacts, whereas it increased to 0.97 MΩ in the case of the (electron-rich) 3-thiomethylthiophene treated contacts. Field-effect mobility values are observed to be affected in short-channel devices (<20 μm) but not in long-channel devices. This channel-length-dependent behavior of mobility is attributed to grain-boundary limited charge transport at longer channel lengths in these devices.     

Optimization of single-gate carbon-nanotube field-effect transistors

The performance of Schottky-barrier carbon-nanotube field-effect transistors (CNTFETs) critically depends on the device geometry. Asymmetric gate contacts, the drain and source contact thickness, and inhomogenous dielectrics above and below the nanotube influence the device operation. An optimizer has been used to extract geometries with steep subthreshold slope and high I/sub on//I/sub off/ ratio. It is found that the best performance improvements can be achieved using asymmetric gates centered above the source contact, where the optimum position and length of the gate contact varies with the oxide thickness. The main advantages of geometries with asymmetric gate contacts are the increased I/sub on//I/sub off/ ratio and the fact that the gate voltage required to attain minimum drain current is shifted toward zero, whereas symmetric geometries require V/sub g/=V/sub d//2. Our results suggest that the subthreshold slope of single-gate CNTFETs scales linearly with the gate-oxide thickness and can be reduced by a factor of two reaching a value below 100 mV/dec for devices with oxide thicknesses smaller than 5 nm by geometry optimization.     

Modeling hysteresis phenomena in nanotube field-effect transistors

A model is developed to explain a hysteresis observed experimentally in nanotube field-effect transistors. The model explains the hysteresis through trapping of electrons in an oxide layer. The Fowler-Nordheim tunneling mechanism is held responsible for the electron injection. The influence of different parameters such as the sweeping rate or the range of the gate voltage on the hysteresis is studied and compared with experimental results.     

Organic semiconductors for organic field-effect transistors

Abstract

The advantages of organic field-effect transistors (OFETs), such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed.     

并三苯场效应晶体管的研制

采用有机半导体材料并三苯作为有源层,环氧树脂作为绝缘介质,通过旋涂和真空掩蔽蒸发的方法,成功研制出了倒转结构的有机场效应晶体管.经测试器件的电子迁移率为5.76×10-2cm2/V·s,跨导为0.96μS.显示出该器件具有良好的输出特性曲线.     

Facile fabrication of all-SWNT field-effect transistors

Field-effect transistors (FETs) have been fabricated using as-grown single-walled carbon nanotubes (SWNTs) for the channel as well as both source and drain electrodes. The underlying Si substrate was employed as the back-gate electrode. Fabrication consisted of patterned catalyst deposition by surface modification followed by dip-coating and synthesis of SWNTs by alcohol chemical vapor deposition (CVD). The electrodes and channel were grown simultaneously in one CVD process. The resulting FETs exhibited excellent performance, with an I _ON/I _OFF ratio of 10⁶ and a maximum ON-state current (I _ON) exceeding 13 μA. The large I _ON is attributed to SWNT bundles connecting the SWNT channel with the SWNT electrodes. Bundling creates a large contact area, which results in a small contact resistance despite the presence of Schottky barriers at metallic-semiconducting interfaces. The approach described here demonstrates a significant step toward the realization of metal-free electronics.      

High electron mobility InAs nanowire field-effect transistors

Single-crystal InAs nanowires (NWs) are synthesized using metal-organic chemical vapor deposition (MOCVD) and fabricated into NW field-effect transistors (NWFETs) on a SiO(2)/n(+)-Si substrate with a global n(+)-Si back-gate and sputtered SiO(x)/Au underlap top-gate. For top-gate NWFETs, we have developed a model that allows accurate estimation of characteristic NW parameters, including carrier field-effect mobility and carrier concentration by taking into account series and leakage resistances, interface state capacitance, and top-gate geometry. Both the back-gate and the top-gate NWFETs exhibit room-temperature field-effect mobility as high as 6580 cm(2) V(-1) s(-1), which is the lower-bound value without interface-capacitance correction, and is the highest mobility reported to date in any semiconductor NW.