InP D-HBT ICs for 40-Gb/s and higher bitrate lightwave transceivers

The combination of device speed (f/sub T/, f/sub max/ > 150 GHz) and breakdown voltage (V/sub bceo/ > 8 V) makes the double heterojunction bipolar InP-based transistor (D-HBT) an attractive technology to implement the most demanding analog functions of 40-Gb/s transceivers. This is illustrated by the performance of a number of analog circuits realized in an InP D-HBT technology with an 1.2- or 1.6-/spl mu/m-wide emitter finger: a low phase noise push-push voltage-controlled oscillator with -7-dBm output power at 146 GHz, a 40-GHz bandwidth and low-jitter 40-Gb/s limiting amplifier, a lumped 40-Gb/s limiting driver amplifier with 4.5-V/sub pp/ differential output swing, a distributed 40-Gb/s driver amplifier with 6-V/sub pp/ differential output swing, and a number of distributed preamplifiers with up to 1.3-THz gain-bandwidth product.     

6-k/spl Omega/ 43-Gb/s differential transimpedance-limiting amplifier with auto-zero feedback and high dynamic range

A high-gain, 43-Gb/s InP HBT transimpedance-limiting amplifier (TIALA) with 100-/spl mu/A/sub pp/ sensitivity and 6 mA/sub pp/ input overload current is presented. The circuit also operates as a limiting amplifier with 40-dB differential gain, better than 15-dB input return loss, and a record-breaking sensitivity of 8 mV/sub pp/ at 43 Gb/s. It features a differential TIA stage with inductive noise suppression in the feedback network and consumes less than 450mW from a single 3.3-V supply. The TIALA has 6-k/spl Omega/ (76dB/spl Omega/) differential transimpedance gain and 35-GHz bandwidth and comprises the transimpedance and limiting gain functions, an auto-zero dc feedback circuit, signal level monitor, and slicing level adjust functions. Other important features include 45-dB isolation and 800-mV/sub pp/ differential output.     

SiGe heterojunction bipolar transistors and circuits toward terahertz communication applications

The relatively less exploited terahertz band possesses great potential for a variety of important applications, including communication applications that would benefit from the enormous bandwidth within the terahertz spectrum. This paper overviews an approach toward terahertz applications based on SiGe heterojunction bipolar transistor (HBT) technology, focusing on broad-band communication applications. The design, characteristics, and reliability of SiGe HBTs exhibiting record f/sub T/ of 375 GHz and associated f/sub max/ of 210 GHz are presented. The impact of device optimization on noise characteristics is described for both low-frequency and broad-band noise. Circuit implementations of SiGe technologies are demonstrated with selected circuit blocks for broad-band communication systems, including a 3.9-ps emitter coupled logic ring oscillator, a 100-GHz frequency divider, 40-GHz voltage-controlled oscillator, and a 70-Gb/s 4:1 multiplexer. With no visible limitation for further enhancement of device speed at hand, the march toward terahertz band with Si-based technology will continue for the foreseeable future.     

A fully integrated 10-Gb/s tapped delay Hilbert transformer for optical single sideband

A 10-Gb/s SiGe HBT tapped delay Hilbert transformer (HT) integrated circuit (IC) is described. The four tap filter uses an integrated LC transmission line with a total delay of 180ps, and the HT has a nominal group delay of 120ps. The circuit is fabricated in a 47-GHz f/sub T/ SiGe HBT process and consumes 112mW from a -3.3-V supply. Measured s-parameters and time domain waveforms are shown to agree with theory. Measurements of a 10-Gb/s optical single sideband system indicate that 7dB of broadband sideband suppression is obtainable using the IC.     

A 21-26-GHz SiGe bipolar power amplifier MMIC

A three-stage 21-26-GHz medium-power amplifier fabricated in f/sub T/=120 GHz 0.2 /spl mu/m SiGe HBT technology has 19 dB small-signal gain and 15 dB gain at maximum output power. It delivers 23 dBm, 19.75% PAE at 22 GHz, and 21 dBm, 13% PAE at 24 GHz. The differential common-base topology extends the supply to BV/sub CEO/ of the transistors (1.8 V). New on-chip components, such as onchip interconnects with floating differential shields, and self-shielding four-way power combining/dividing baluns provide inter-stage coupling and single-ended I/O interfaces at the input and output. The 2.45/spl times/2.45 mm/sup 2/ MMIC was mounted as a flipchip and tested without a heatsink.     

SiGe HBT and BiCMOS technologies for optical transmission and wireless communication systems

Technologies for a self-aligned SiGe heterojunction bipolar transistor (HBT) and SiGe HBTs with CMOS transistors (SiGe BiCMOS) have been developed for use in optical transmission and wireless communication systems. n-Si cap/SiGe-base multilayer fabricated by selective epitaxial growth (SEG) was used to obtain both high-speed and low-power performance for the SiGe HBTs. The process except the SEG is almost completely compatible with well-established Si bipolar-CMOS technology, and the SiGe HBT and BiCMOS were fabricated on a 200-mm wafer line. High-quality passive elements, i.e., high-precision poly-Si resistors, a high-Q varactor, an MIM capacitor, and high-Q spiral inductors have also been developed to meet the demand for integration of the sophisticated functions. A cutoff frequency of 130 GHz, a maximum oscillation frequency of 180 GHz, and an ECL gate-delay time of 5.3 ps have been demonstrated for the SiGe HBTs. An IC chipset for 40-Gb/s optical-fiber links, a single-chip 10-Gb/s transceiver large-scale IC (LSI), a 5.8-GHz electronic toll collection transceiver IC, and other practical circuits have been implemented by applying the SiGe HBT or BiCMOS technique.     

Monolithic ultra-broadband transimpedance amplifiers usingAlGaAs/GaAs heterojunction bipolar transistors

Monolithic ultra-broadband transimpedance amplifiers are developed using AlGaAs/GaAs HBTs. To realize good amplifier performances, two factors are mentioned: an affordable HBT fabrication process using the self-aligned method and an optimized circuit design considering large signal operations. The developed HBT fabrication process achieves excellent uniformity in DC characteristics and the effect on amplifier microwave performances, derived from the discrete device uniformity, is estimated. Amplifier circuit configurations are designed by harmonic balance simulation using the extracted large signal device parameters The fabricated amplifier exhibits a DC to 13.4-GHz bandwidth with an 18.1-dB gain. Fairly good uniformity is also achieved for the amplifier microwave performances. An optical receiver module is constructed mounting the developed HBT amplifier and InGaAs p-i-n photodiode chips. The optical receiver module provides a 9.4-GHz bandwidth and an optical receiver sensitivity of -15.7 dBm at 10-Gb/s data rate     

Half-terahertz operation of SiGe HBTs

This letter presents the first demonstration of a silicon-germanium heterojunction bipolar transistor (SiGe HBT) capable of operation above the one-half terahertz (500 GHz) frequency. An extracted peak unity gain cutoff frequency (f/sub T/) of 510 GHz at 4.5 K was measured for a 0.12/spl times/1.0 /spl mu/m/sup 2/ SiGe HBT (352 GHz at 300 K) at a breakdown voltage BV/sub CEO/ of 1.36 V (1.47 V at 300 K), yielding an f/sub T//spl times/BV/sub CEO/ product of 693.6 GHz-V at 4.5 K (517.4 GHz-V at 300 K).     

A Large Swing, 40-Gb/s SiGe BiCMOS Driver With Adjustable Pre-Emphasis for Data Transmission Over 75 $Omega$ Coaxial Cable

A fully differential 40-Gb/s cable driver with adjustable pre-emphasis is presented. The circuit is fabricated in a production 0.18 mum SiGe BiCMOS technology. A distributed limiting architecture is used for the driver employing high-speed HBTs in the lower voltage predriver, and a high-breakdown MOS-HV-HBT cascode, consisting of a 0.18 mum n-channel MOSFET and a high-voltage HBT (HV-HBT), for the high voltage output stages. The circuit delivers up to 3.6 V peak-to-peak per side into a 75 Omega load with variable pre-emphasis ranging from 0 to 400%. S-parameter measurements show 42 dB differential small-signal gain, a 3-dB bandwidth of 22 GHz, gain peaking control up to 25 dB at 20 GHz and input and output reflection coefficients better than -10 dB up to 40 GHz. Additional features of the driver include output amplitude control (from 1 V_pp to 3.6 V_pp per side), pulse-width control (35% to 65%) and an adjustable input dc level (1.1 V to 1.8 V) allowing the circuit to interface with a SiGe BiCMOS or MOS-CML SERDES. The transmitter is able to generate an eye opening at 38 Gb/s after 10 m of Belden 1694 A coaxial cable which introduces 22 dB of loss at 19 GHz. Measurement results also demonstrate that the transmitter IC operates as a standalone equalizer for 10-Gb/s data transmission over 40 m of Belden cable without the need for receiver equalization.     

A 6-b 12-GSamples/s track-and-hold amplifier in InP DHBT technology

This paper presents a 6-b 12-GSample/s track-and-hold amplifier (THA) fabricated in an InP-InGaAs-InP double heterojunction bipolar transistor (DHBT) technology. The THA is intended for the front end of a high-speed analog-to-digital converter in a digital-based electronic polarization-mode dispersion compensation circuit for a 10-Gb/s optical receiver. With a high-speed switched emitter follower and clocked track-to-hold transition operation, it shows the signal bandwidth over 14 GHz and features a total harmonic distortion (THD) compatible with 6-b operation with input frequency of 6 GHz and a sampling frequency of 12 GHz. The THD increases better than -23 dB with a 12-GHz input signal of 1 V/sub pp/, corresponding to a 4-b resolution, under a differential clock of 12 GHz.     

OC-192 transmitter and receiver in standard 0.18-/spl mu/m CMOS

This paper presents the first fully integrated SONET OC-192 transmitter and receiver fabricated in a standard 0.18-/spl mu/m CMOS process. The transmitter consists of an input data register, 16-b-wide first-in-first-out (FIFO) circuit, clock multiplier unit (CMU), and 16:1 multiplexer to give a 10-Gb/s serial output. The receiver integrates an input amplifier for 10-Gb/s data, clock and data recovery circuit (CDR), 1:16 demultiplexer, and drivers for low-voltage differential signal (LVDS) outputs. An on-chip LC-type voltage-controlled oscillator (VCO) is employed by both the transmitter and receiver. The chipset operates at multiple data rates (9.95-10.71 Gb/s) with functionality compatible with the multisource agreement (MSA) for 10-Gb transponders. Both chips demonstrate SONET-compliant jitter characteristics. The transmitter 10.66-GHz output clock jitter is 0.065 UI/sub pp/ (unit interval, peak-to-peak) over a 50-kHz-80-MHz bandwidth. The receiver jitter tolerance is more than 0.4 UI/sub pp/ at high frequencies (4-80 MHz). A high level of integration and low-power consumption is achieved by using a standard CMOS process. The transmitter and receiver dissipate a total power of 1.32 W at 1.8 V and are packaged in a plastic ball grid array with a footprint of 11/spl times/11 mm/sup 2/.     

A 2.5-V 45-Gb/s decision circuit using SiGe BiCMOS logic

A 45-Gb/s BiCMOS decision circuit operating from a 2.5-V supply is reported. The full-rate retiming flip-flop operates from the lowest supply voltage of any silicon-based flip-flop demonstrated to date at this speed. MOS and SiGe heterojunction-bipolar-transistor (HBT) current-mode logic families are compared. Capitalizing on the best features of both families, a true BiCMOS logic topology is presented that allows for operation from lower supply voltages than pure HBT implementations without compromising speed. The topology, based on a BiCMOS cascode, can also be applied to a number of millimeter-wave (mm-wave) circuits. In addition to the retiming flip-flop, the decision circuit includes a broadband transimpedance preamplifier to improve sensitivity, a tuned 45-GHz clock buffer, and a 50-/spl Omega/ output driver. The first mm-wave transformer is employed along the clock path to perform single-ended-to-differential conversion. The entire circuit, which is implemented in a production 130-nm BiCMOS process with 150-GHz f/sub T/ SiGe HBT, consumes 288 mW from a 2.5-V supply, including only 58 mW from the flip-flop.     

A 60-dB gain, 55-dB dynamic range, 10-Gb/s broad-band SiGe HBTlimiting amplifier

A limiting amplifier IC implemented in a silicon-germanium (SiGe) heterojunction bipolar transistor technology for low-cost 10-Gb/s applications is described. The IC employs 20 dB gain limiting cells, input overload protection, split analog-digital grounds, and on-chip isolation interface with transmission lines. A gain enhancement technique has been developed for a parallel-feedback limiting cell. The limiting amplifier sensitivity is less than 3.5 mV_pp at BER=10^-9 with 2-V_pp maximum input (55-dB dynamic range). The total gain is over 60 dB, and S₂₁ bandwidth exceeds 15 GHz at 10-mV_pp input. Parameters S₁₁ and S₂₂ are better than -10 dB in the 10-GHz frequency range. The AM to PM conversion is less than 5 ps across input dynamic range. The output differential voltage can be set from 0.2 to 2 V_pp with IC power dissipation from 250 mW to 1.1 W. The chip area is 1.2×2.6 mm². A 10-Gb/s optical receiver, built with the packaged limiting amplifier, demonstrated -19.6-dBm sensitivity. The IC can be used in 10-Gb/s fiber-optic receivers requiring high sensitivity and wide input dynamic range     

A DC-20-GHz InP HBT balanced analog multiplier for high-data-ratedirect-digital modulation and fiber-optic receiver applications

This paper reports on a dc-20-GHz InP heterojunction bipolar transistor (HBT) active mixer, which obtains the highest gain-bandwidth product (GBP) thus far reported for a direct-coupled analog mixer integrated circuit (IC). The InP HBT active mixer is based on the Gilbert transconductance multiplier cell and integrates RF, local oscillator, and IF amplifiers, High-speed 70-GHz f_T and 160-GHz f_max InP HBT devices along with microwave matching accounts for its record performance. Operated as a down-converter mixer, the monolithic microwave integrated circuit achieves an RF bandwidth (BW) from dc-20 GHz with 15.3-dB gain and benchmarks a factor of two improvement in GBP over state-of-the-art analog mixer ICs. Operated as an up-converter, direct-digital modulation of a 2.4-Gb/s 2³¹ -1 pseudorandom bit sequence (PRBS) onto a 20-GHz carrier frequency resulted in a carrier rejection of a 28 dB, clock suppression of 35 dBc, and less than a 50-ps demodulated eye phase jitter. The analog multiplier was also operated as a variable gain amplifier, which obtained 20-dB gain with a BW from dc-18 GHz, an third-order intercept of 12 dBm, and over 25 dB of dynamic range. A single-ended peak-to-peak output voltage of 600 mV was obtained with a ±35-mV 15 Gb/s 2⁵-1 PRES input demonstrating feasibility for OC-192 fiber-telecommunication data rates. The InP-based analog multiplier IC is an attractive building block for several wideband communications such as those employed in satellites, local multipoint distribution systems, high-speed local area networks, and fiber-optic links     

Over-10-Gb/s IC's for future lightwave communications

This paper reviews research and development in NTT Laboratories on IC's faster than 10 Gb/s for future optical communication systems. Novel design and circuit techniques achieve such high-speed IC's and stable operation even in packages and modules. High-bit-rate operation of 10 Gb/s (10-GHz equalizing amplifier circuit, a 10-GHz clock recovery circuit, 10-Gb/s decision circuits, and 10-Gb/s multiplexers and demultiplexers) is obtained. 20-Gb/s operation is also achieved for some IC's. Future improvements using advanced device and circuit technologies are discussed, and bit rates over 40 Gb/s are predicted     

A fully integrated 40-Gb/s clock and data recovery IC with 1:4DEMUX in SiGe technology

In this paper, a fully integrated 40-Gb/s clock and data recovery (CDR) IC with additional 1:4 demultiplexer (DEMUX) functionality is presented. The IC is implemented in a state-of-the-art production SiGe process. Its phase-locked-loop-based architecture with bang-bang-type phase detector (PD) provides maximum robustness. To the authors' best knowledge, it is the first 40-Gb/s CDR IC fabricated in a SiGe heterojunction bipolar technology (HBT). The measurement results demonstrate an input sensitivity of 42-mV single-ended data input swing at a bit-error rate (BER) of 10^-10. As demonstrated in optical transmission experiments with the IC embedded in a 40-Gb/s link, the CDR/DEMUX shows complete functionality as a single-chip-receiver IC. A BER of 10^-10 requires an optical signal-to-noise ratio of 23.3 dB     

A 0.18-/spl mu/m SiGe BiCMOS receiver and transmitter chipset for SONET OC-768 transmission systems

A 43-Gb/s receiver (Rx) and transmitter (Tx) chip set for SONET OC-768 transmission systems is reported. Both ICs are implemented in a 0.18-/spl mu/m SiGe BiCMOS technology featuring 120-GHz f/sub T/ and 100 GHz f/sub max/. The Rx includes a limiting amplifier, a half-rate clock and data recovery unit, a 1:4 demultiplexer, a frequency acquisition aid, and a frequency lock detector. Input sensitivity for a bit-error rate less than 10/sup -9/ is 40 mV and jitter generation better than 230 fs rms. The IC dissipates 2.4 W from a -3.6-V supply voltage. The Tx integrates a half-rate clock multiplier unit with a 4:1 multiplexer. Measured clock jitter generation is better than 170 fs rms. The IC consumes 2.3 W from a -3.6-V supply voltage.     

Ridged LiNbO/sub 3/ modulators fabricated by a novel oxygen-ion implant/wet-etch technique

This paper demonstrates a new ion implantation and wet-etch technique for fabricating high-quality ridged optical waveguides for high-speed LiNbO/sub 3/-based optical modulators. In addition, the paper demonstrates the fabrication of optical waveguide ridges >3 /spl mu/m in height with 90/spl deg/, and even re-entrant sidewall angles for the first time. The modeling used indicates that 90/spl deg/ (and re-entrant) sidewall ridges can reduce the required modulator drive voltage by 10-20% over modulators with conventional trapezoidal ridge profiles fabricated with reactive ion etching. A 40-Gb/s modulator with a 30-GHz bandwidth, 5.1-V switching voltage at 1 GHz, and a 4.8-dB optical insertion loss is fabricated using the ion implantation/wet-etch process. Fabricated devices showed good stability against accelerated aging, indicating that this process could be used for commercial purposes.     

Cryogenic operation of third-generation, 200-GHz peak-f/sub T/, silicon-germanium heterojunction bipolar transistors

We present a comprehensive investigation of the cryogenic performance of third-generation silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) technology. Measurements of the current-voltage (dc), small-signal ac, and broad-band noise characteristics of a 200-GHz SiGe HBT were made at 85 K, 120 K, 150 K, 200 K, and 300 K. These devices show excellent behavior down to 85 K, maintaining reasonable dc ideality, with a peak current gain of 3800, a peak cut-off frequency (f/sub T/) of 260 GHz, a peak f/sub max/ of 310 GHz, and a minimum noise figure (NF/sub min/) of approximately 0.30 dB at a frequency of 14 GHz, in all cases representing significant improvements over their corresponding values at 300 K. These results demonstrate that aggressively scaled SiGe HBTs are inherently well suited for cryogenic electronics applications requiring extreme levels of transistor performance.