Optical I/O Technology for Tera-Scale Computing

This paper describes both a near term and a long term optical interconnect solution, the first based on a packaging architecture and the second based on a monolithic photonic CMOS architecture. The packaging-based optical I/O architecture implemented with 90 nm CMOS transceiver circuits, 1 × 12 VCSEL/detector arrays and polymer waveguides achieves 10 Gb/s/channel at 11 pJ/b. A simple TX pre-emphasis technique enables a potential 18 Gb/s at 9.6 pJ/b link efficiency. Analysis predicts this architecture to reach less than 1 pJ/b at the 16 nm CMOS technology node. A photonic CMOS process enables higher bandwidth and lower energy-per-bit for chip-to-chip optical I/O through integration of electro-optical polymer based modulators, silicon nitride waveguides and polycrystalline germanium (Ge) detectors into a CMOS logic process. Experimental results for the photonic CMOS ring resonator modulators and Ge detectors demonstrate performance above 20 Gb/s and analysis predicts that photonic CMOS will eventually enable energy efficiency better than 0.3 pJ/b with 16 nm CMOS. Optical interconnect technologies such as these using multi-lane communication or wavelength division multiplexing have the potential to achieve TB/s interconnect and enable platforms suitable for the tera-scale computing era.     

Simultaneous All-Optical and and nor Gates for NRZ Differential Phase-Shift-Keying Signals

A scheme for realizing all-optical logic AND and NOR gates simultaneously for nonreturn-to-zero differential phase-shift-keying signals is proposed and demonstrated based on a delayed interferometer and two semiconductor optical amplifiers. Experimental demonstration at 20 Gb/s verifies the logic integrity of this scheme. The final results are derived in the ON-OFF keying format with clear open eyes and extinction ratios over 10 dB. The proposed scheme can be expanded to realize arbitrary logic gate.     

An Experimental Validation of a Wavelength-Striped, Packet Switched, Optical Interconnection Network

We experimentally validate a complete optical packet switched interconnection network, implementing the SPINet architecture. The scalable photonic integrated network (SPINet) architecture capitalizes on wavelength division multiplexing (WDM) to provide very large transmission bandwidths, simplify network design, and reduce the network's power dissipation. Contention resolution is performed in the optical domain, and a novel physical layer acknowledgement protocol is employed to mitigate the associated latency and performance penalties. Moreover, the SPINet architecture is specifically designed to enable on-chip integration by not using any kind of optical delay lines. Experiments presented include a complete functionality verification, error-free routing of 80 Gb/s wavelength-striped optical packets (8 wavelengths each modulated at 10 Gb/s) with a bit-error rate (BER) better than 10^-12, and novel performance-enhancement techniques such as path adjustments and load balancing.     

An optical bit-rate flexible transmission system with 5-Tb/s-kmcapacity employing multiple in-line erbium-doped fiber amplifiers

An optical bit-rate flexible transmission system using erbium-doped fiber amplifiers (EDFAs) is proposed, and the system design is discussed. An optical bit-rate flexible system using multiple in-line erbium-doped fiber amplifiers has produced a regenerative repeater spacing of 505 km at 10 Gb/s and 523 km at 5 Gb/s for direct-detection systems. This system proves that an optical bit-rate flexible system with a transmission capacity of 5.05 Tb/s-km can be feasibly constructed. System capacity is clarified both theoretically and experimentally. The power penalties involved are discussed. The related optical and electrical circuits proved operational above 10 Gb/s. The 523 km at 5 Gb/s and 505 km at 10 Gb/s transmission experiments successfully demonstrated that EDFAs effectively enhance a system's transmission capacity     

High-Performance Optical 3R Regeneration for Scalable Fiber Transmission System Applications

This paper proposes and demonstrates optical 3R regeneration techniques for high-performance and scalable 10-Gb/s transmission systems. The 3R structures rely on monolithically integrated all-active semiconductor optical amplifier-based Mach-Zehnder interferometers (SOA-MZIs) for signal reshaping and optical narrowband filtering using a Fabry-Peacuterot filter (FPF) for all-optical clock recovery. The experimental results indicate very stable operation and superior cascadability of the proposed optical 3R structure, allowing error-free and low-penalty 10-Gb/s [pseudorandom bit sequence (PRBS) 2²³-1 ] return-to-zero (RZ) transmission through a record distance of 1 250 000 km using 10 000 optical 3R stages. Clock-enhancement techniques using a SOA-MZI are then proposed to accommodate the clock performance degradations that arise from dispersion uncompensated transmission. Leveraging such clock-enhancement techniques, we experimentally demonstrate error-free 125 000-km RZ dispersion uncompensated transmission at 10 Gb/s (PRBS 2²³-1) using 1000 stages of optical 3R regenerators spaced by 125-km large-effective-area fiber spans. To evaluate the proposed optical 3R structures in a relatively realistic environment and to investigate the tradeoff between the cascadability and the spacing of the optical 3R, a fiber recirculation loop is set up with 264- and 462-km deployed fiber. The field-trial experiment achieves error-free 10-Gb/s RZ transmission using PRBS 2²³-1 through 264 000-km deployed fiber across 1000 stages of optical 3R regenerators spaced by 264-km spans     

Ultrafast integrable and reconfigurable XNOR, AND, NOR, and NOT photonic logic gate

A novel, simple, compact, and integrable scheme of reconfigurable and ultrafast photonic logic gate is demonstrated, based on a single semiconductor optical amplifier (SOA) and able to process ultrafast signals. XNOR function has been optically implemented exploiting four-wave mixing and cross-gain modulation in an SOA. The same scheme can be easily reconfigured to obtain AND, NOR, and NOT logic gates. Performances in terms of bit error rate for 20-ps return-to-zero signals at 10 Gb/s show a power penalty limited to 0.5 dB for all logic gates but the AND, which experiences regeneration (-2-dB power penalty) due to nonlinear SOA noise compression.     

A Standalone Receiver With Multiple Access Interference Rejection, Clock and Data Recovery, and FEC for 2-D$lambda -t$OCDMA

We demonstrate a standalone (no global clock) receiver for two-dimensional wavelength-time optical code-division multiple-access. The receiver provides the following functions: quantization (to eliminate multiple access interference), clock and data recovery, return-to-zero to nonreturn-to-zero conversion (for optical code-division multiple-access compatibility with digital logic), framing (for byte synchronization), and forward-error correction (FEC) using a (255, 239) Reed–Solomon decoder. The receiver more than doubles the number of supported users at a bit-error rate$≪ 10 ^-10$. The receiver supports an information rate of 156.25 Mb/s. We performed the measurements at a bit rate of 167.4 Mb/s and a chip rate of 1.339 Gb/s (eight chips per bit) to account for FEC overhead.     

High-speed all-optical AND gate using nonlinear transmission ofelectroabsorption modulator

We investigated an all-optical logic AND operation at 10 Gb/s using nonlinear transmission of electroabsorption modulator pumped with two counterpropagating data streams. The transmitted pump itself was used as the output of the optical gate to obtain high extinction ratio, and high-output peak powers. The gate has been tested using 2³¹ -1 long pseudorandom bit sequence. The logical output of the gate has an extinction ratio of more than 10 dB with good eye opening. Our measurements of the gate transmission window show that all-optical logic operation up to 100 Gb/s is feasible     

Optical signal processing based on semiconductor optical amplifier and tunable delay interferometer

In this paper,several applications in all-optical signal processing based on a semiconductor optical amplifier (SOA) and variable delayed interferometers (DIs) have been experimentally demonstrated.Wavelength converter based on a nonlinear polarization switch (NPS) and a DI is proposed and presented for the wavelength conversion of nonretum-to-zero (NRZ) signals.An alloptical nonretum-to-zero to return-to-zero (NRZ-to-RZ)format converter with tunable duty cycles is achieved by the DI with variable delays.The 40 Gb/s reconfigurable optical OR/NOR gate in a single SOA,followed a tunable optical bandpass filter (OBF) and a DI,optical 2R regeneration using an SOA-DI are investigated.It is found that this combinative realization of filters has been endowed with great flexibility and quality for 40 Gb/s optical logic and 2R regeneration.     

Field trial of data-granularity-flexible reconfigurable OADM with wavelength-packet-selective switch

Reconfigurable optical add/drop multiplexers (ROADMs), which enable dynamic and flexible node-to-node connection via wavelength paths, are key components in metro ring network nodes. A data-granularity-flexible ROADM node that combines a wavelength-tunable filter, and an optical packet ADM (PADM) has been proposed and demonstrated. In this paper, the first field trial of the data-granularity-flexible ROADM network with wavelength- and packet-selective switch is demonstrated using a novel concurrent generation technique of address-reconfigurable optical-code (OC) labels and payload data. Bit error rates (BERs) of less than 10/sup -12/ for all 16-wavelength channels are obtained over 90 km of transmission at 10 Gb/s.     

Bidirectional four-wave mixing in semiconductor optical amplifiers:theory and experiment

Bidirectional four wave mixing (FWM) is investigated in a bulk semiconductor optical amplifier (SOA) for dispersion compensation and for the clear/drop functionality in optical time division multiplexed (OTDM) systems. Good performance for bidirectional midspan spectral inversion (MSSI) is theoretically predicted for bit rates of 10, 20, and 40 Gb/s and is shown to be in agreement with measurements performed at 10 and 20 Gb/s. Measurements of the clear/drop functionality using the bidirectional technique show excellent performance for a 4×10 Gb/s signal and is again in good agreement with simulations. The clear/drop functionality is also simulated for 4×20 Gb/s and 4×40 Gb/s signals     

Ultrafast nonlinear interferometer (UNI)-based digital optical circuits and their use in packet switching

Digital optical logic circuits capable of performing bit-wise signal processing are critical building blocks for the realization of future high-speed packet-switched networks. In this paper, we present recent advances in all-optical processing circuits and examine the potential of their integration into a system environment. On this concept, we demonstrate serial all-optical Boolean AND/XOR logic at 20 Gb/s and a novel all-optical packet clock recovery circuit, with low capturing time, suitable for burst-mode traffic. The circuits use the semiconductor-based ultrafast nonlinear interferometer (UNI) as the nonlinear switching element. We also present the integration of these circuits in a more complex unit that performs header and payload separation from short synchronous data packets at 10 Gb/s. Finally, we discuss a method to realize a novel packet scheduling switch architecture, which guarantees lossless communication for specific traffic burstiness constraints, using these logic units.     

160 Gb/s variable length packet/10 Gb/s-label all-optical label switching with wavelength conversion and unicast/multicast operation

We report on the first demonstration of all-optical label switching (AOLS) with 160 Gb/s variable length packets and 10 Gb/s optical labels. This result demonstrates the transparency of AOLS techniques from previously demonstrated 2.5 Gb/s to this 160 Gb/s demonstration using a common routing and packet lookup framework. Packet forwarding/conversion, optical label erasure/re-write and signal regeneration at 160 Gb/s is achieved using a WDM Raman enhanced all-optical fiber cross-phase modulation wavelength converter. It is also experimentally shown that this technique enables packet unicast and multicast operation at 160 Gb/s. The packet bit-error-rate is measured for all optical label switched 16 /spl times/ 10 Gb/s channels and error free operation is demonstrated after both label swapping and packet forwarding.     

Bandwidth virtualization enables long-haul WDM transport of 40 Gb/s and 100 Gb/s services

This article describes how bandwidth virtualization can enable transmission of ultra-high bandwidth 40 Gb/s and 100 Gb/s services over existing optical transport networks independently of the underlying network infrastructure. An overview of the technology alternatives available to enable high-bandwidth service transport is provided, along with a discussion of the relative merits of different approaches. The authors describe how wavelength division multiplexing, using large- scale photonic integrated circuits combined with the use of a digital virtual concatenation mapping protocol, can be used to enable decoupling of 40 Gb/s and 100 Gb/s service provisioning from the underlying optical link engineering, thereby enabling bandwidth virtualization. Real-world implementation examples of bandwidth virtualization are provided, including 40 Gb/s service transmission over a 2000-km fiber link with 65 ps of peak PMD, a field trial of 40 Gb/s service transmission over an 8477-km trans-oceanic network, and finally a field trial of a pre-standard 100 gigabit Ethernet service transmission over a 4000-km terrestrial long-haul network.     

Gigabit receiver ICs for optical communications

The authors discuss gigabit receiver ICs for optical communications, focusing on their circuit and package design, the performance of receivers that were fabricated, and their application to a 1.6 Gb/s optical receiver. The key technologies for the receivers are discussed, and a design based on these key technologies is proposed. The proposed design is used to fabricate six receiver ICs (eight chips) using an ultra-high-speed bipolar process with transistors having a unity gain bandwidth of 6-8 GHz. The receivers are suitable for long-haul optical transmission at bit rates up to 1.6 Gb/s. Experimental results show that the 1.6 Gb/s receiver has an optical dynamic range of more than 23 dB without any adjustment, and the received average optical power required to maintain a 10^-11 error rate is less the -31 dBm     

Ultrafast time-domain technology and its application in all-optical signal processing

In this paper, we review recent advances in ultrafast optical time-domain technology with emphasis on the use in optical packet switching. In this respect, several key building blocks, including high-rate laser sources applicable to any time-division-multiplexing (TDM) application, optical logic circuits for bitwise processing, and clock-recovery circuits for timing synchronization with both synchronous and asynchronous data traffic, are described in detail. The circuits take advantage of the ultrafast nonlinear transfer function of semiconductor-based devices to operate successfully at rates beyond 10 Gb/s. We also demonstrate two more complex circuits-a header extraction unit and an exchange-bypass switch-operating at 10 Gb/s. These two units are key blocks for any general-purpose packet routing/switching application. Finally, we discuss the system perspective of all these modules and propose their possible incorporation in a packet switch architecture to provide low-level but high-speed functionalities. The goal is to perform as many operations as possible in the optical domain to increase node throughput and to alleviate the network from unwanted and expensive optical-electrical-optical conversions.     

A redundant multivalued logic for a 10-Gb/s CMOS demultiplexer IC

A redundant multivalued logic is proposed for high-speed communication ICs. In this logic, serial binary data are received and converted into parallel redundant multivalued data. Then they are restored into parallel binary data. Because of the multivalued data conversion, this logic makes it possible to achieve higher operating speeds than that of a conventional binary logic. Using this logic, a 1:4 demultiplexer (DEMUX, serial-parallel converter) IC was fabricated using a 0.18-/spl mu/m CMOS process. The IC achieved an operating speed of 10 Gb/s with a supply voltage of only 1.3 V and with power consumption of 38 mW. This logic may achieve CMOS communication ICs with an operating speed several times greater than 10 Gb/s.     

Optical signal processing for optical packet switching networks

Optical packet switching promises to bring the flexibility and efficiency of the Internet to transparent optical networking with bit rates extending beyond that currently available with electronic router technologies. New optical signal processing techniques have been demonstrated that enable routing at bit rates from 10 Gb/s to beyond 40 Gb/s. We review these signal processing techniques and how all-optical-wavelength converter technology can be used to implement packet switching functions. Specific approaches that utilize-ultra-fast all-optical nonlinear fiber wavelength converters and monolithically integrated optical wavelength converters are discussed and research results presented.     

IST-LASAGNE: towards all-optical label swapping employing optical logic gates and optical flip-flops

The Information Society Technologies-all-optical LAbel SwApping employing optical logic Gates in NEtwork nodes (IST-LASAGNE) project aims at designing and implementing the first, modular, scalable, and truly all-optical photonic router capable of operating at 40 Gb/s. The results of the first project year are presented in this paper, with emphasis on the implementation of network node functionalities employing optical logic gates and optical flip-flops, as well as the definition of the network architecture and migration scenarios.     

Pseudomorphic 2DEG FET IC's for 10 Gb/s optical communicationsystems with external optical modulation

An optical modulator driver IC and a preamplifier IC for 10 Gb/s optical communication systems are developed using AlGaAs/InGaAs/GaAs pseudomorphic two-dimensional electron gas (2DEG) FETs with a gate length of 0.35 μm. The optical modulator driver IC operates at a data rate up to 10 Gb/s with an output voltage swing of more than 4 V_p-p . The bandwidth for the amplifier IC is 13.0 GHZ with ab 47 dB-Ω transimpedance gain. In addition, optical transmission experiments with external optical modulation using these ICs have successfully been carried out at 10 Gb/s