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电子封装技术和封装材料 总被引:17,自引:0,他引:17
本文介绍了电子封装的各种类型,综述了电子封装技术与封装材料的现状及发展趋势,重点讨论了高热导AlN基片金属化及AlN-W多层共烧工艺。 相似文献
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AIN陶瓷具有高的热导率和与Si相接近的热膨胀系数以及电绝缘特性,是一种应用前景极好的基片材料。本文介绍了AIN陶瓷的基本特征、用于陶瓷基片和封装材料的工艺难点及AlN陶瓷的应用现状和前景。 相似文献
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功率微电子封装用铝基复合材料 总被引:1,自引:0,他引:1
微电子技术的发展对电子封装提出更高的要求,现有封装材料在性能方面存在局限性,已无法全面满足现代及一电子产品的要求,新型金属基复合材料因此应运而生,其中最有前景的封装材料是Al/SiC。 相似文献
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曲兰欣 《固体电子学研究与进展》1996,(3)
T/R组件的高密度微波封装据《1995IEEEMTT-sDigest》报道,休斯飞机公司的JohnWooldridge开发出一种X波段有源阵列雷达用T/R组件的低成本三维高密度微波封装(HDMP)技术。该项目主要集中在多层氮化铝(AIN)衬底的设计、... 相似文献
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高密度高性能电子封装技术 总被引:1,自引:0,他引:1
本文简要概述了电子封装的发展过程及其结构形式,全面系统地介绍了近几年国外高密度高性能电子封装的最新进展,对当前电子封装的国际发展水平作一综述。 相似文献
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GaAs单片电路封装 总被引:2,自引:0,他引:2
简述了微波在封装中的传输特性,以及不同封装型式和材料的GaAsMMIC封装,介绍了多层共烧陶瓷在MMIC封装中的应用。最后,综述了国外GaAsMMIC的最新封装与互连技术。 相似文献
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高度发达的信息社会急需先进的电子封装技术,本文概述了电子封装技术的现状和发展趋势。从芯片级封装、一级封装、封装和基板的连接以及二级封装几个方面重点介绍了封装中的先进技术。 相似文献
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新型陶瓷/金属化合物基板——直接敷铜板 总被引:4,自引:0,他引:4
直接敷铜(DBC)板是用于电子学封装的一种陶瓷/金属化合物基板。这种DBC板适用于光电子学封装的采集排列制作,并可提供无源对准、好的热导率、CTE匹配及良好的可靠性。本文介绍了采用DBC板的光电子学封概念布线、制作和应用。 相似文献
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Bhattacharya S.K. Moon K.S. Tummala R.R. May G.S. 《Electronics Packaging Manufacturing, IEEE Transactions on》2003,26(2):110-114
Meniscus coating is a low-cost deposition method that can be used to apply polymers in solution as thin films to the surface of electronics packaging substrates or flat panel displays. Most Roadmaps in electronics packaging project 6 to 8 /spl mu/m lines and spaces for next generation high density printed wiring board (PWB) substrates in the year 2006, which would require coating thickness of similar magnitudes for manufacturing fine lines with higher yield. Meniscus coating can be an enabling deposition method that can provide finer yet uniform coating on large area substrates which would translate to patterning finer copper traces, thereby increasing the wiring density. This paper reports preliminary results on coating thickness that can be achieved with photoresists, dielectrics, and solder masks which are the integral parts of the sequential build up multi-layer process for the system-on-package substrates. 相似文献
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为了研究不同封装条件对低温共烧陶瓷(LTCC)基板封装焊接后残余热应力的影响,该文针对不同温变载荷下LTCC基板的热应力变形进行了仿真计算和实验测试,结果显示仿真计算与实验测试结果具有较好的一致性,验证了数值仿真用于LTCC基板封装焊接后残余热应力仿真的可行性。在此基础上对零膨胀合金底板和硅铝合金封装条件下3种典型工作温度对应的LTCC基板的热应力进行了仿真计算。结果表明,封装焊接后LTCC基板两侧边缘应力集中,中间残余应力小,呈翘曲状态,采用硅铝合金封装焊接的热应力小于零膨胀合金封装。 相似文献
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运用光刻胶为注模的多次互不干扰金属电镀技术实现了惯性微型电学开关的低温制造与封装.电镀技术的低温过程可使微型开关直接成形于预先制作好的含有电子信号处理电路的基底上,加上同样借助于低温金属电镀技术的基于整个硅晶片的倒装封装,直接形成环绕各个器件的密封腔体.这一技术最终将使得模块化生产成为现实.微型开关的高度和它的密封腔的高度可以分别控制.电子信号可以通过金属互连线进入密封腔体.为了便于设计,建立了一个既简单又相对准确的“弹簧质量块”模型.以此设计的惯性开关,即使在未封装的常温、常压条件下,均可工作1e9次以上.本文对密封腔体的强度和密封性,以及金属互连线的可靠性,都作了详细的检测,各项指标均达到其各自的标准. 相似文献
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Gillot C. Schaeffer C. Massit C. Meysenc L. 《Components and Packaging Technologies, IEEE Transactions on》2001,24(4):698-704
A new technique for the packaging of IGBT modules has been developed. The components are sandwiched between two direct bond copper (DBC) substrates with aluminum nitride. Wire bonds are replaced with flip chip solder bumps, which allows cooling of components on both sides. Microchannel heat sinks are directly integrated in the package to decrease the thermal resistance of the module. Thus, a very compact module with high thermal performance is obtained. A prototype with two insulated gate bipolar transistors (IGBTs) and four diodes associated in parallel was realized and tested. In this paper, the innovative packaging technique is described, and results of thermal tests are presented 相似文献
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回顾了自1988年以来的逐次积层(SBU)层压基板的发展过程。文中报告了IBM自2000年采用的这种工艺的开发过程。这些层压基板是一种非均匀性结构,有3部分组成:芯板,积层和表面层,每一部分都是为满足封装应用的需求而开发。薄膜工艺极大提高了SBU层压基板的绕线能力,同时也使得这种工艺非常适合高性能设计。本文着重阐述了IBM在将该工艺用于ASIC和微处理器封装时,在设计、制造和可靠性测试等各个阶段所遇到的挑战。 相似文献
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A. Schneuwly P. Gröning L. Schlapbach V. P. Jaecklin 《Journal of Electronic Materials》1998,27(8):990-997
The influence of surface cleanliness of Au/Ni coated multichip materials (MCMs), Ag plated Cu lead frames, and Al bond pads
on semiconductor chips on the strength of Au wire bond contacts has been investigated. A clean surface is important for good
adhesion in any kind of attachment process. Investigations by means of x-ray photoelectron spectroscopy have been performed
on the bond substrates to determine the chemical composition, the nature as well as the thickness of the contamination layer.
The influence of contamination on bond contact quality has been examined by pull force measurements, which is an established
test method in semiconductor packaging industry for evaluating the quality of wire bonds. The results clearly show that a
strong correlation between the degree of contamination of the substrate and pull strength values exists. Furthermore, a contamination
thickness limiting value of 4 nm for Au and Ag substrates was determined, indicating good wire bond contact quality. The effect
of plasma cleaning on wire bondability of metallic and organic (MCMs) substrates has been examined by pull force measurements.
These results confirm the correlation between surface contamination and the strength of wire bond contacts for Au/Ni coated
MCMs and Ag plated Cu lead frames. Atomic force microscopy measurements have been performed to determine the roughness of
bond surfaces, demonstrating the importance of nanoscale characterization with regard to the bonding behavior of the substrates.
Finally, bonding substrates used in integrated circuit packaging are discussed with regard to their Au wire bonding behavior.
The Au wire bonding process first results in a cleaning effect of the substrate to be joined and secondly enables the change
of bonding energy into frictional heat giving rise to an enhanced interdiffusion at the interface. 相似文献