A 30 GHz Variable Gain Amplifier With High Output Voltage Swing for Ultra-Wideband Radar

This paper reports on the analysis, design and characterization of a 30 GHz fully differential variable gain amplifier for ultra-wideband radar systems. The circuit consists of a variable gain differential stage, which is fed by two cascaded emitter followers. Capacitive degeneration and inductive peaking are used to enhance bandwidth. The maximum differential gain is 11.5 dB with ${pm}1.5$ dB gain flatness in the desired frequency range. The amplifier gain can be regulated from 0 dB up to 11.5 dB. The circuit exhibits an output 1 dB compression point of 12 dBm. The measured differential output voltage swing is 1.23 V$_{pp}$ . The 0.75 mm$^2$ broadband amplifier consumes 560 mW at a supply voltage of ${pm}3.3$ V. It is manufactured in a low-cost 0.25 $mu$ m SiGe BiCMOS technology with a cut-off frequency of 75 GHz. The experimental results agree very well with the simulated response. A figure of merit has been proposed for comparing the amplifier performance to previously reported works.      

Microwave amplification in a GaAs bulk semiconductor

Continuous linear microwave amplification has been obtained usingn-type GaAs at room temperature. Amplification of signals in the 2 to 10 Gc/s range occurred when a dc field applied across semiconductor wafers mounted in a conventional reflection type amplifier circuit exceeded about 3100 volts/cm. Ohmic contacts were applied to wafers 125 µ square and 40 to 120 µ thick. The resistivity varied between 10 and 120 ohm-era. Then cdot Lproduct in amplifying samples did not exceed 5.10¹¹cm^-2. The conductance measured in the 1 to 10 Gc/s region was found in some samples to be negative over a frequency range of one octave. Other samples exhibited negative conductance (i.e., gain) only over a few hundred megacycles. Each sample showed a peak gain accompanied by a range of absorption at the high-frequency end of the negative conductance region. The differential conductance at dc was positive. An amplifier noise figure of 23 dB was measured using 120 ohm-era GaAs at 10 dB gain and 1 dB of gain compression occurred when the output power level reached -6 dBm.     

A 4–17 GHz Darlington Cascode Broadband Medium Power Amplifier in 0.18-$mu$ m CMOS Technology

This letter presents a broadband medium power amplifier in 0.18- $mu$m CMOS technology. The Darlington cascode topology is used to achieve wide bandwidth, flat gain and power frequency response. For wideband matching consideration, an interstage inductor and series peaking RL circuit are adopted. An output high pass matching circuit is used to maintain gain and power flatness at high frequency. The measured results show that the proposed PA demonstrates a gain of 10 dB from 4 to 17 GHz with less than 2-dB ripple, and a saturation output power of 16 to 18 dBm with PAE of better than 10% and power consumption of 306 mW. The chip size is only 0.67 mm$^{2}$ .      

A Low-Power, High-Suppression V-band Frequency Doubler in 0.13 $mu$ m CMOS

A V-band frequency doubler monolithic microwave integrated circuit with a current re-use buffer amplifier is presented. The circuit is designed and fabricated using 0.13 $mu$m CMOS technology. The buffer amplifier uses a current re-use topology, which adopts series connection of two common source amplifiers for low dc power consumption. The suppression of the fundamental frequency is obtained by shunting the input frequency at the output node of the doubler and the drain nodes of two common-source stages of the buffer amplifier. The fabricated frequency doubler exhibits an output power of ${-}$4.45 dBm and a conversion gain of ${-}$ 0.45 dB at input frequency of 27.1 GHz with an input power of ${-}$4 dBm. The suppression of the fundamental signal is 49.2 dB. The total dc power dissipation is 9 mW while the buffer amplifier consumes 5 mW. The integrated circuit size including pads is 1.24 mm$, times ,$0.75 mm. To our knowledge, this is the highest suppression with low-power dissipation among V-band frequency doublers.      

8mm GaAs Gunn稳态功率放大器

报导了以商用ＧａＡｓＧｕｎｎ氏振荡管（超临界掺杂Ｇｕｎｎ二极管）研制稳态型功率放大器的设计方法和研制结果。提出了放大器宽温不稳定的解决方法。单管单级放大器，增益大于１０ｄＢ，带宽大于２ＧＨｚ（３３～３５ＧＨｚ），最大输出功率２００ｍｗ，能在－４０～＋５５℃内稳定工作，全温增益变化小于０．５ｄＢ，带内波纹小于０．５ｄＢ。可靠性高。     

Integrated Multilayered On-Chip Inductors for Compact CMOS RFICs and Their Use in a Miniature Distributed Low-Noise-Amplifier Design for Ultra-Wideband Applications

A novel multilayered vertically integrated inductor structure is developed for miniature CMOS RF integrated circuits, and its properties are investigated. The effect of mutual inductance both within and between adjacent multilayer inductors is also studied. A distributed low noise amplifier is designed by incorporating this novel inductor structure in a standard JAZZ 0.18-$mu$m RF/mixed signal CMOS process, demonstrating the significance of the proposed multilayered inductors in CMOS circuit miniaturization. The three-stage distributed amplifier occupies just 288$,times,$291 $mu$m or 0.08 mm $^{2}$ of die area, making it the smallest distributed amplifier reported to date. The circuit exhibits a relatively flat gain of 6 dB from 3.1 to 10.6 GHz with less than 0.5-dB ripple, with excellent input and output match of less than ${-}$ 12 and ${-}$25 dB, respectively. The noise figure is less than 5 dB to 14 GHz with only 2.7 dB across 8–10 GHz, while the power consumption is approximately 22 mW.      

Stability criterion for Gunn diodes with injection-limiting cathodes

According to McCumber [1] a Gunn diode with an ohmic cathode (i.e., "differential cathode conductivity"sigma_{c} = delta) is stable in a constant-voltage circuit ifn_{0}L le (n_{0}L)_{crit} equiv 2.7 times 10^{11}cm^-2wheren_{0}Lis the doping-length product. We show that the same stability criterion applies to Gunn diodes with an injection-limiting cathode(sigma_{c} rightarrow 0), if(n_{0}L)_{crit}is allowed to be a function ofsigma_{c}L. The value of(n_{0}L)_{crit}increases by 30 percent if(sigma_{c}L)varies from infinity (ohmic cathode) to zero (injection-limiting cathode). If a cathode with negative differential conductivity is realizable, it may be possible to extend the(n_{0}L)region of stable operation of Gunn diodes drastically.     

一种新研制的W频段固态GaN功率放大器毫米波源

介绍了一种新研制的W频段固态GaN功率放大器毫米波源,给出了系统组成与工作原理,提供了其主要部件W频段固态Gunn驱动源、W频段波导-微带转换器、主放大器芯片基本性能及实验测试结果。该固态毫米波源工作频率94 GHz,输出连续波功率大于300 mW,线性增益10 dB,附加效率(PAE)大于16%。在W频段固态毫米波源研制过程中,其单片微波集成电路(MMIC)功率放大器半导体材料选择经历了GaAs、InP到GaN演变,结果清楚表明, W频段毫米波源的GaN MMlC功率放大器输出功率、增益、效率、高温性能要优于其他固态MMIC功率放大器性能。 W频段大功率固态GaN MMlC技术将在毫米波领域带来新的技术革命和应用。     

Theoretical study of a Gunn diode in a resonant circuit

A computer simulation of a GaAs Gunn diode in a parallel resonant circuit has been made to determine the optimum device and circuit parameters. The maximum dc to RF efficiency, 5 to 8 percent, is obtained when the product of doping and length is between 10¹²and 2 × 10¹²cm^-2, the product of frequency and length is 10⁷cm/s, and the bias voltage divided by length is 8000 V/cm for a load resistance of30 R_{0}where R0is the low-voltage resistance of the diode. The product of output power and load resistance varies with frequencyfasC f^{2}whereCis 12,000 watt-ohm-GHz²for a load resistance of50 R_{0}. The frequency can be varied over an octave tuning range by the resonant circuit.     

A 10-Gb/s Inductorless CMOS Limiting Amplifier With Third-Order Interleaving Active Feedback

This paper presents an inductorless circuit technique for CMOS limiting amplifiers. By employing the third-order interleaving active feedback, the bandwidth of the proposed circuit can be effectively enhanced while maintaining a suppressed gain peaking within the frequency band. Using a standard 0.18-mum CMOS process, the limiting amplifier is implemented for 10-Gb/s broadband applications. Consuming a DC power of 189 mW from a 1.8-V supply voltage, the fabricated circuit exhibits a voltage gain of 42 dB and a -3-dB bandwidth of 9 GHz. With a 2³¹-1 pseudo-random bit sequence at 10 Gb/s, the measured output swing and input sensitivity for a bit-error rate of 10^-12 are 300 and 10 mV_pp, respectively. Due to the absence of the spiral inductors, the chip size of the limiting amplifier including the pads is 0.68times0.8 mm² where the active circuit area only occupies 0.32times0.6 mm²     

A 27 GHz, 14 dBm CMOS Power Amplifier Using 0.18 $mu {rm m}$ Common-Source MOSFETs

A Ka-band three-stage CMOS power amplifier was designed and fabricated using 0.18 $mu {rm m}$ gate-length common-source transistors. For low loss and accurate matching networks for the amplifier, a substrate-shielded microstrip-line was used with good modeling accuracy up to 40 GHz. The measured insertion loss was 0.5 dB/mm at 25 GHz. The three-stage amplifier achieved a 14.5 dB small-signal gain, 14 dBm output power, and 13.2% power-added-efficiency at 27 GHz in a compact chip area of 0.84 ${rm mm}^{2}$. The measured gain was the highest for Ka-band power amplifiers using common-source transistors. These results were achieved at a voltage compatible with deep sub-micrometer CMOS technology.      

A 3–10 GHz CMOS UWB Low-Noise Amplifier With ESD Protection Circuits

A low-power fully integrated low-noise amplifier (LNA) with an on-chip electrostatic-static discharge (ESD) protection circuit for ultra-wide band (UWB) applications is presented. With the use of a common-gate scheme with a ${rm g}_{rm m}$ -boosted technique, a simple input matching network, low noise figure (NF), and low power consumption can be achieved. Through the combination of an input matching network, an ESD clamp circuit has been designed for the proposed LNA circuit to enhance system robustness. The measured results show that the fabricated LNA can be operated over the full UWB bandwidth of 3.0 to 10.35 GHz. The input return loss $({rm S}_{11})$ and output return loss $({rm S}_{22})$ are less than ${-}8.3$ dB and ${-}9$ dB, respectively. The measured power gain $({rm S}_{21})$ is $11 pm 1.5$ dB, and the measured minimum NF is 3.3 dB at 4 GHz. The dc power dissipation is 7.2 mW from a 1.2 V supply. The chip area, including testing pads, is 1.05 mm$,times,$ 0.73 mm.      

A Novel 3–5 GHz Active Matched Filter for Impulse Radio Ultra-Wideband

In this letter, a novel active matched filter for UWB-IR lower band (3.1–4.85 GHz) is presented. The signal to noise ratio is improved at the output using a tapped delay line with a common source amplifier. An artificial transmission line is used for wideband impedance matching. The matched filter achieves a power gain of 9.8 dB at center frequency. Input matching is better than ${-}19$ dB and output matching is better than ${-}15$ dB. The averaged SNR improvement is 4.6 dB using peak detection. Input referred 1-dB compression point is 0.7 dBm at the center frequency. The matched filter is biased from a 1.5 V supply with a total power consumption of 38 mW.      

A Low-Power Linear SiGe BiCMOS Low-Noise Amplifier for Millimeter-Wave Active Imaging

This letter presents a low-power linear and wideband two-stage millimeter-wave low-noise amplifier (LNA) fabricated in a low-cost 0.18 $mu{rm m}$ SiGe BiCMOS technology. Design techniques utilized to optimize the gain and NF and to achieve high linearity and wideband at W-band are addressed. The LNA achieves a peak power gain of 14.5 dB at 77 GHz with a 3 dB bandwidth of 14.5 GHz from 69 to 83.5 GHz. The measured NF is 6.9 dB at 77 GHz and is lower than 8 dB from 64 to 81 GHz. Both input and output return losses are better than 11 dB and 17 dB at 77 GHz, respectively. The measured input 1 dB compression point is $-$11.4 dBm at 77 GHz with low power consumption of only 37 mW.      

DC-40 GHz光通信系统用GaAs PHEMT驱动放大器。

利用0.2μmGaAsPHEMT工艺研制了40Gb/s光通信系统中的光调制器驱动放大器。该放大器芯片采用有源偏置的七级分布放大器结构,工作带宽达到40GHz,输入输出反射损耗约-10dB,功率增益14dB,功耗700mW,最大电压输出幅度达到7V。两级芯片级连后,功率增益约27dB,在40Gbit/s速率下得到清晰的眼图。     

A Single-Ended Fully Integrated SiGe 77/79 GHz Receiver for Automotive Radar

A single-ended 77/79 GHz monolithic microwave integrated circuit (MMIC) receiver has been developed in SiGe HBT technology for frequency-modulated continuous-wave (FMCW) automotive radars. The single-ended receiver chip consists of the first reported SiGe 77/79 GHz single-ended cascode low noise amplifier (LNA), the improved single-ended RF double-balanced down-conversion 77/79 GHz micromixer, and the modified differential Colpitts 77/79 GHz voltage controlled oscillator (VCO). The LNA presents 20/21.7 dB gain and mixer has 13.4/7 dB gain at 77/79 GHz, and the VCO oscillates from 79 to 82 GHz before it is tuned by cutting the transmission line ladder, and it centres around 77 GHz with a tuning range of 3.8 GHz for the whole ambient temperature variation range from $- hbox{40},^{circ}{hbox{C}}$ to $+ hbox{125},^{circ}{hbox{C}}$ after we cut the lines by tungsten-carbide needles. Phase noise is $-$90 dBc/Hz@1 MHz offset. Differential output power delivered by the VCO is 5 dBm, which is an optimum level to drive the mixer. The receiver occupies 0.5 ${hbox{mm}}^{2}$ without pads and 1.26 ${hbox{mm}}^{2}$ with pads, and consumes 595 mW. The measurement of the whole receiver at 79 GHz shows 20–26 dB gain in the linear region with stable IF output signal. The input ${rm P}_{rm 1dB}$ of the receiver is $-$35 dBm.      

Temperature effects in bulk GaAs amplifiers

The microwave-gain characteristics of a bulk GaAs amplifier have been investigated experimentally as a function of temperature. The resistivity of the samples showed a strong temperature dependence, hence the results have been interpreted in terms of changing carrier concentration assuming a constant mobility. It has been found that stable amplification only occurs within a narrow range of temperature (carrier concentration). The highestn . Lproduct (carrier density × sample length) for which gain has been observed was about 5 . 10¹¹cm^-2, and this is in agreement with earlier results and theory. Amplification did not occur belown . L = 8 . 10^{10}cm^-2. The frequency band where negative conductance appears was found to be strongly dependent on temperature (carrier density) and bias field. Noise figures, measured at temperatures where gain occurred, lay between 20 and 30 dB. Noise figure appears to be nearly independent of temperature. Gain versus field measurements on a stable amplifier indicate that the peak field of the velocity-field curve is about 4000 V/cm. Gain versus frequency and noise figure have also been measured on a bulk semiconductor amplifier which was operated with a coaxial transformer to increase the gain over a broad microwave frequency range.     

A W-Band Medium Power Amplifier in 90 nm CMOS

A W-band CMOS medium power amplifier (PA) is presented in this letter. The circuit is implemented in 90 nm mixed signal/radio frequency CMOS process. By utilizing balanced architecture, the PA demonstrated a measured maximum small signal gain of 17 dB with 3 dB bandwidth from 91 to 108 GHz. The saturation output power $(P_{rm sat})$ is 12 dBm between 90 and 100 GHz for $V_{rm ds}$ of each transistor at 1.5 V. To our knowledge, this is the highest frequency CMOS PA to date.      

The Matrix Balun—A Transistor-Based Module for Broadband Applications

In this paper the analysis and design of a new active balun with very broadband performance, the matrix balun, are reported. Measured results show a common mode rejection ratio, CMRR, larger than 15 dB between 4 and 42 GHz while exhibiting 2 dB single-ended gain with a ripple of 1 dB. The balun was realized in a 0.15 mum GaAs mHEMT process. It occupies a chip area of 0.63 mm² and consumes a dc power of 20 mW. The same matrix balun circuit may also be biased for amplification and used as a matrix amplifier. The circuit then exhibits 10.5 dB gain up to 63 GHz with 1 dB ripple above 5.5 GHz and a power consumption of 67 mW.     

A 40-GHz Low-Noise Amplifier With a Positive-Feedback Network in 0.18-$mu{hbox{m}}$ CMOS

A novel circuit topology for a CMOS millimeter-wave low-noise amplifier (LNA) is presented in this paper. By adopting a positive-feedback network at the common-gate transistor of the input cascode stage, the small-signal gain can be effectively boosted, facilitating circuit operations at the higher frequency bands. In addition, $LC$ ladders are utilized as the inter-stage matching for the cascaded amplifiers such that an enhanced bandwidth can be achieved. Using a standard 0.18-$mu{hbox{m}}$ CMOS process, the proposed LNA is implemented for demonstration. At the center frequency of 40 GHz, the fabricated circuit exhibits a gain of 15 dB and a noise figure of 7.5 dB, while the return losses are better than 10 dB within the 3-dB bandwidth of 4 GHz. Operated at a 1.8-V supply, the LNA consumes a dc power of 36 mW.