一种基于HfO2材料的RRAM波动性模型

基于HfO₂材料制作了一种具有良好非易失性的阻变存储器(RRAM)。根据ECM导电细丝机制,建立了动态的Verilog-A模型,该模型包含了RRAM的波动特性。对模型进行直流电压扫描验证,与实际器件的电流-电压特性曲线进行拟合。验证结果表明,该模型具备RRAM器件优良的电学特性,波动特性的加入对电路的前期设计具有指导意义。对模型进行脉冲仿真,仿真结果表明高、低阻态之间的鉴别窗口大于100倍,转变时间小于30 ns。     

1T1R结构RRAM的故障可测性设计

阻变随机存储器(RRAM)中存在的故障严重影响产品的可靠性和良率.采用精确高效的测试方法能有效缩短工艺优化周期,降低测试成本.基于SMIC 28 nm工艺平台,完成了1T1R结构的1 Mbit RRAM模块的流片.详细分析了测试中的故障响应情况,并定义了一种故障识别表达式.在March算法的基础上,提出针对RRAM故障的有效测试算法,同时设计了可以定位故障的内建自测试(BIST)电路.仿真结果表明,该测试方案具有占用引脚较少、测试周期较短、故障定位准确、故障覆盖率高的优势.     

CuO纳米线阻变存储器的组装及电阻开关特性

用热氧化法在空气中加热铜片制备了CuO纳米线(CuO NWs),通过FESEM对纳米线表面进行了观察,并用液体转移法组装成功了一种简单的阻变存储器件。通过I-V测试系统观察到了Cu/CuO NWs/Cu器件表现出了明显的双极型和单极型。最后通过对比高阻态(HRS)和低阻态(LRS)的表面形貌,解释了Cu/CuO NWs/Cu器件的阻变机制。     

基于RRAM延时单元的PUF设计

随着技术的发展，信息安全受到了很大挑战.物理不可克隆函数（Physically Unclonable Function，PUF）电路是一种新型的密钥生成电路，阻变存储器（Resistive Random Access Memory，RRAM）可以为其提供物理随机熵源，这使得PUF在物理上不可被攻击.但目前在基于RRAM的PUF设计方案中，RRAM延时单元的测试响应对（Challenge Response Pair，CRP）效率并不够高.本文提出一种基于RRAM延时单元的PUF结构，延时单元将RRAM的阻值输出到反向器中，形成脉冲的延迟，最后通过判决器判断两路脉冲达到顺序并编码为"0"和"1"，这就是PUF的输出位.基于RRAM延时单元，本文设计了8位、16位、32位、64位PUF，这些PUF在保证良好的随机性、稳定性、唯一性的前提下，大大提高了PUF的RRAM单元效率.实验结果表明：该设计能够有效的提高RRAM使用效率，使得PUF能够更好地防止外界的攻击.     

提高RF MEMS开关速度的电压控制方法

针对RF MEMS开关释放时间过长的问题,提出了一种电压控制方法有效地缩短了开关的释放时间,提高了开关的速度。这种方法无需修改器件设计,仅需要调整偏置电压变化形式,用线性压降替代传统的阶跃压降,就能有效抑制MEMS梁在释放过程中的振动。给出了这种方法的相关理论、等效模型及仿真结果。由ANSYS仿真结果可知,在标准大气压下,采用28μs单段线性压降后,梁的释放时间从103μs缩短到62.5μs;采用26μs双段线性压降后,梁的释放时间进一步缩短到26μs,仅为原来的1/4,即开关速度约为原来的4倍。     

一种基于斯坦福RRAM模型的参数提取方法

阻变随机存取存储器(RRAM)是一种新型非易失性存储器件,比主流的闪存(Flash)器件具有更快的读/写速度、更低的编程电压和功耗。然而由于工艺不成熟等因素,RRAM准确的器件模型需要在已有的斯坦福物理模型基础上,对多达6个曲线拟合参数反复进行调整,具有一定的建模难度。提出了一种简并参数的建模方法,通过器件实测数据计算出其中4个曲线拟合参数I₀、g₀、γ₀、β。该方法大大降低了将物理模型适配为实际模型的建模难度,且由于基于实测数据,该建模方法理论上对不同工艺具有适配性。最后在不同工艺条件下制作了基于HfO_x材料的RRAM器件,并验证了该方法的有效性、先进性和准确性。     

SOI热光开关调制区结构与速度和功耗关系的有限元法分析

利用有限元法分析了调制区内二维温度场的静态和动态分布.结果表明,上包层SiO2厚度的减小,有利于开关速度的提高和功耗的减小.增加埋层SiO2的厚度或引入绝缘槽,能有效降低器件功耗,但开关时间随之增加.电极的尺寸对开关性能影响较小.如果采用全体硅材料制作光开关,开关速度能达到5μs,但功耗将增至0.92W.     

SOI热光开关调制区结构与速度和功耗关系的有限元法分析

利用有限元法分析了调制区内二维温度场的静态和动态分布.结果表明,上包层Si O2 厚度的减小,有利于开关速度的提高和功耗的减小.增加埋层Si O2 的厚度或引入绝缘槽,能有效降低器件功耗,但开关时间随之增加.电极的尺寸对开关性能影响较小.如果采用全体硅材料制作光开关,开关速度能达到5 μs,但功耗将增至0 .92 W.     

一种基于RRAM和表决器逻辑的新型乘法器

计算机系统快速发展,逐步进入大内存系统时代。但存储瓶颈的问题严重制约着计算机系统的进一步发展。结合RRAM这种非易失性存储器,设计了一种可以实现存储与计算一体化的逻辑运算架构。首次利用多数表决器逻辑实现了一种新型的全加器和乘法器,并给出了一种新型的逻辑运算单元架构。试验结果表明,该多数表决器逻辑实现全加器仅需4个步骤、3个单元,实现乘法器仅需24个步骤、42个单元,远远低于目前其他逻辑所需的步骤数和单元数。     

Direct Observation of Conversion Between Threshold Switching and Memory Switching Induced by Conductive Filament Morphology

Volatile threshold switching (TS) and non‐volatile memory switching (MS) are two typical resistive switching (RS) phenomena in oxides, which could form the basis for memory, analog circuits, and neuromorphic applications. Interestingly, TS and MS can be coexistent and converted in a single device under the suitable external excitation. However, the origin of the transition from TS to MS is still unclear due to the lack of direct experimental evidence. Here, conversion between TS and MS induced by conductive filament (CF) morphology in Ag/SiO₂/Pt device is directly observed using scanning electron microscopy and high‐resolution transmission electron microscopy. The MS mechanism is related to the formation and dissolution of CF consisting of continuous Ag nanocrystals. The TS originates from discontinuous CF with isolated Ag nanocrystals. The results of current–voltage fitting and Kelvin probe force microscopy further indicate that the TS mechanism is related to the modulation of the tunneling barrier between Ag nanocrystals in CF. This work provides clearly experimental evidence to deepen understanding of the mechanism for RS in oxide‐electrolyte‐based resistive switching memory, contributing to better control of the two RS behaviors to establish high‐performance emerging devices.     

一种基于阻变单元特性的阻变存储器修复方案

针对新型阻变存储器(RRAM)工艺良率不高的问题,提出了一种新型的修复解决方案,该方案基于阻变单元的特殊性能,即初始状态为高阻,经过单元初始化操作过程后转变为低阻。利用这样特性的阻变单元作为错误检测位、冗余单元作为修复位,提出了三种不同的组织结构来实现修复操作。三种结构由于主存储器、检验位存储器及冗余存储器的组织方式不同,达到了不同的冗余存储器利用率。最后,通过数学分析可以证明,该方案在利用了较少冗余存储器的条件下,可以将阻变存储器的错误率普遍降低10～30倍,实现了较好的修复效果。     

Bipolar Ni/ZnO/HfO2/Ni RRAM with multilevel characteristic by different reset bias

The authors report the fabrication and characterization of resistive random access memory (RRAM) with Ni/ZnO/HfO₂/Ni structure at room temperature. It was found that the proposed device exhibited bipolar switching behavior with multilevel characteristics in a reset process. It was found that the device exhibited two-step reset stage under high reset bias. By applying a 2nd reset stage after the transformation of the 1st reset stage, it was found that the RRAM could return to the initial state. From I–V curves measured in these two reset stages, it was found that the current conduction was dominated by Schottky emission due to the migration of oxygen ions and recombination with oxygen vacancies. This reaction could break the conducting filament so as to transform carrier transport mechanism to Schottky emission. This also results in the simultaneous transformation from low resistance state (LRS) to high resistance state (HRS).     

Resistive Random Access Memory Cells with a Bilayer TiO2/SiOX Insulating Stack for Simultaneous Filamentary and Distributed Resistive Switching

In order to fulfill the information storage needs of modern societies, the performance of electronic nonvolatile memories (NVMs) should be continuously improved. In the past few years, resistive random access memories (RRAM) have raised as one of the most promising technologies for future information storage due to their excellent performance and easy fabrication. In this work, a novel strategy is presented to further extend the performance of RRAMs. By using only cheap and industry friendly materials (Ti, TiO₂, SiO_X, and n⁺⁺Si), memory cells are developed that show both filamentary and distributed resistive switching simultaneously (i.e., in the same I–V curve). The devices exhibit unprecedented hysteretic I–V characteristics, high current on/off ratios up to ≈5 orders of magnitude, ultra low currents in high resistive state and low resistive state (100 pA and 125 nA at –0.1 V, respectively), sharp switching transitions, good cycle‐to‐cycle endurance (>1000 cycles), and low device‐to‐device variability. We are not aware of any other resistive switching memory exhibiting such characteristics, which may open the door for the development of advanced NVMs combining the advantages of filamentary and distributed resistive switching mechanisms.     

Evidence for compliance controlled oxygen vacancy and metal filament based resistive switching mechanisms in RRAM

We present electrical evidence on asymmetric metal-insulator-semiconductor (MIS) based test structures in support of the presence of two different independent switching mechanisms in a resistive random access memory (RRAM) device. The valid mechanism for switching depends on the compliance capping (I_gl) for forming/SET transition. Our results convincingly show that low compliance based switching only involves reversible oxygen ion drift to and from oxygen gettering gate electrodes, while high compliance switching involves formation and rupture of conductive metallic nanofilaments, as verified further by our physical analysis investigations. We have observed this unique dual mode switching mechanism only in NiSi-based gate electrodes, which have a moderate oxygen solubility as well as relatively low melting point.     

2D Metal–Organic Framework Nanosheets with Time‐Dependent and Multilevel Memristive Switching

Metal–organic framework (MOF) nanosheets have attracted significant interests for sensing, electrochemical, and catalytic applications. Most significantly, 2D MOF with highly accessible sites on the surface is expected to be applicable in data storage. Here, the memory device is first demonstrated by employing M‐TCPP (TCPP: tetrakis(4‐carboxyphenyl)porphyrin, M: metal) as resistive switching (RS) layer. The as‐fabricated resistive random access memory (RRAM) devices exhibit a typical electroforming free bipolar switching characteristic with on/off ratio of 10³, superior retention, and reliability performance. Furthermore, the time‐dependent RS behaviors under constant voltage stress of 2D M‐TCPP–based RRAMs are systematically investigated. The properties of the percolated conducting paths are revealed by the Weibull distribution by collecting the measured turn‐on time. The multilevel information storage state can be gotten by setting a series of compliance current. The charge trapping assisted hopping is proposed as operation principle of the MOF‐based RRAMs which is further confirmed by atomic force microscopy at electrical modes. The research is highly relevant for practical operation of 2D MOF nanosheet–based RRAM, since the time widths, magnitudes of pulses, and multilevel‐data storage can be potentially set.     

Effect of oxygen concentration on resistive switching behavior in silicon oxynitride film

SiO_xN_y films with different oxygen concentrations were fabricated by reactive magnetron sputtering, and the resistive switching characteristics and conduction mechanism of Cu/SiO_xN_y/ITO devices were investigated. The Cu/SiO_xN_y/ITO device with SiO_xN_y deposited in 0.8-sccm O₂ flow shows a reliable resistive switching behavior, including good endurance and retention properties. As the conductivity of SiO_xN_y increases with the increase of the oxygen content dynamical electron trapping and detrapping is suggested to be the conduction mechanism. The temperature dependent I-V measurement indicates that the carrier transport can be ascribed to the hopping conduction rather than the metallic conductive filament.