低功耗RFID电源产生电路的优化设计

电子标签是创新消费模式、提升生活质量和工作效率的热门新科技,但是由于功耗和成本的原因阻碍了其广泛应用.介绍了一种电子标签芯片电源产生电路的优化设计,探讨了限幅电路、整流电路、模拟电源电路、数字电源电路和EEPROM高压电路的低功耗设计技术和实现方法,提出了融合并联分流的限幅电路、改进的桥式整流电路、带有低压检测复位功能的模拟电源电路.低功耗电源产生电路已成功应用到无源电子标签芯片的设计中,并在SMIC O.35μmCMOS工艺下流片成功.     

基于低频唤醒技术的半主动式电子标签设计

文中介绍了半主动式电子标签硬件和软件的设计方案,应用AS3933低频唤醒接收芯片实现了电子标签低频唤醒接收功能。针对低频唤醒接收模块,计算和讨论了其并联谐振电路相关的参数,并给出了电路和程序设计的方案。应用低频唤醒技术的半主动式电子标签可靠的低频通信距离可达3m以上,同时低频唤醒技术显著降低了电子标签的运行功耗。     

双界面智能卡芯片模拟前端ESD设计

双界面智能卡芯片静电放电(ESD)可靠性的关键是模拟前端(AFE)模块的ESD可靠性设计,如果按照代工厂发布的ESD设计规则设计,AFE模块的版图面积将非常大.针对双界面智能卡芯片AFE电路结构特点和失效机理,设计了一系列ESD测试结构.通过对这些结构的流片和测试分析,研究了器件设计参数和电路设计结构对双界面智能卡芯片ESD性能的影响.定制了适用于双界面智能卡芯片AFE模块设计的ESD设计规则,实现对ESD器件和AFE内核电路敏感结构的面积优化,最终成功缩小了AFE版图面积,降低了芯片加工成本,并且芯片通过了8 000 V人体模型(HBM) ESD测试.     

疏耦合电子标签研究与实现

近年来,RFID电子标签技术成为热门新科技,由于功耗和成本的原因阻碍了其广泛应用.介绍RFID系统的组成和实现原理,给出低成本、低功耗无源电子标签芯片体系结构,提出低功耗射频接口电路、数字控制电路、存储电路设计关键技术和优化设计,并成功应用到基于IS0/IEC 15693协议无源电子标签芯片设计中,在SMIC 0.35μm E2PROM工艺条件下流片成功,芯片面积为1.86 mm2,设计指标满足标签芯片的性能要求.     

一种程控高精度电阻测量仪的设计

针对电阻的精密测量需求,设计了一种高精度电阻测量仪,系统由恒流源模块、仪表放大器模块、档位控制模块电路和模拟-数字转换电路四部分组成。恒流源模块主要由OPA376精密运算放大芯片组成,仪表放大器模块主要由INA826精密仪表放大芯片组成,档位控制电路由单片机控制实现三个档位切换,模拟-数字转换电路由16位模拟-数字转换芯片ADS1118组成。硬件测试表明:在电阻值为50Ω~50kΩ范围内,测量相对误差小于0.05%。     

基于0.13μm CMOS工艺的无源RFID标签模拟前端电路设计

设计了13.56 MHz频段无源射频识别电子标签的模拟前端电路,采用常规0.13 μm含EEPROM的CMOS工艺,设计了一种箝位电路,能够实现采用常规5 V器件耐射频识别芯片感应的高压功能,整个芯片实现了射频识别标签通信时所需的稳定电源电压提供、载波中信号的提取、芯片时钟恢复和反向调制信号发射的全部功能.     

一种通用模拟用户接口电路的设计

模拟用户接口电路是连接普通模拟话机和数字交换网络的一个终端模块 ,文章介绍一种通用的模拟用户接口的设计电路 ,主要采用Mitel公司生产的用户线接口电路芯片MH886 15和编解码芯片MT896 5     

低频低功耗无源RFID模拟前端设计与分析

介绍了一款低频低功耗无源射频识别(RFID)技术芯片模拟前端的设计.详细介绍了低频RFID模拟前端的整体结构和主要模块.通过对低功耗带隙基准的设计,产生合适的偏置电压,为其他模块提供偏置,以此来限制其他模块的功耗,达到降低整个模拟前端功耗的目的.通过对高性能解调电路的设计,提高解调精度,保证通信过程准确.芯片采用0.35 μm标准CMOS工艺设计和制作,实际测试结果显示,在要求的最远通信距离时,芯片依然可以正常工作,表明该设计满足实际要求.     

基于nRF2401的腕带式电子标签设计

提出一种新的基于nRF2401射频芯片和MSP430单片机的腕带式有源电子标签设计,包括硬件匹配电路设计、天线设计以及软件编程设计。该有源电子标签工作于2.45GHz,采用内设丰富且功能强大的无线收发模块nRF2401作为射频前端,外围电路极少,满足腕带式电子标签体积小的设计要求;采用低功耗高性能的MSP430单片机作为微控制器,数据处理速度快并且兼顾低功耗的要求。测试结果证明,该标签整体性能稳定,抗干扰能力强,工作距离可达70m。     

无源RFID标签天线接口电路研究与实现

电子标签天线接口是芯片获得能量、时序、数据的接口,其设计的好坏直接影响到电子标签的性能.本文探讨了无源RFID电子标签的天线理论和天线耦合接口的功率传输,提出了电子标签天线接口的优化设计和实现电路,进行了仿真验证,并成功应用到标签芯片设计中,已在SMIC 0.35μm CMOS工艺下投片成功.     

Remotely powered addressable UHF RFID integrated system

This paper presents a fully integrated remotely powered and addressable radio frequency identification (RFID) transponder working at 2.45 GHz. The achieved operating range at 4 W effective isotropically radiated power (EIRP) base-station transmit power is 12 m. The integrated circuit (IC) is implemented in a 0.5 /spl mu/m silicon-on-sapphire technology. A state-of-the-art rectifier design achieving 37% of global efficiency is embedded to supply energy to the transponder. The necessary input power to operate the transponder is about 2.7 /spl mu/W. Reader to transponder communication is obtained using on-off keying (OOK) modulation while transponder to reader communication is ensured using the amplitude shift keying (ASK) backscattering modulation technique. Inductive matching between the antenna and the transponder IC is used to further optimize the operating range.     

航管应答机高度接口适配器设计

介绍了俄制大气机高度输出原理及输出接口电路形式,分析了国产航空应答机输入接口要求。设计了航管应答机高度接口适配器,该适配器由A／D转换器、编码器、电平转换电路、驱动电路、隔离电路、基准电压产生电路和电源等电路组成。实验表明,该适配器能够将俄制大气机输出的模拟高度电平信号转换成满足国产航空应答机要求的数字编码信号。     

无源UHF RFID电子标签模拟前端设计

提出了一种符合ISO/IEC 18000-6B标准的高性能无源UHF RFID电子标签模拟前端,在915MHz ISM频带下工作时其电流小于8μA.该模拟前端除天线外无外接元器件,通过肖特基二极管整流器从射频电磁场接收能量.该RFID模拟前端包括本地振荡器、时钟产生电路、复位电路、匹配网络和反向散射电路、整流器、稳压器以及AM解调器等.该芯片采用支持肖特基二极管和EEPROM的Chartered 0.35μm 2P4M CMOS工艺进行流片,读取距离大于3m,芯片面积为300μm×720μm.     

无源射频电子标签模拟前端的设计与分析

提出了与ISO/IEC 18000-3兼容的高频无源射频电子标签模拟前端.分析了设计中的考虑因素,尤其是射频电子标签的能量传输.基于这些分析,提出了一种新架构、高能量转换效率、低电压、低功耗、在噪声和能量波动环境下具有高性能的模拟前端.此电路在Chartered 0.35μm标准CMOS工艺下实现,测试结果表明芯片能很好地满足设计要求.     

Design and analysis of a low power passive UHF RFID transponder IC

This paper presents a low power passive UHF RFID transponder IC, which is compatible with ISO/IEC 18000-6B Standard, operating at the 915 MHz ISM band with the total supply current consumption less than 10 μA. The fully integrated passive transponder, whose reading distance more than 3 m at 4 W (36 dBm) EIRP with an antenna gain less than 1.5 dBi, is powered by the received RF energy. There are no external components, except for the antenna. The transponder IC includes matching network, rectifier, regulator, power on reset circuit, local oscillator, bandgap reference, AM demodulator, backscatter, control logic and memory. The IC is fabricated using Chartered 0.35 μm two-poly four-metal CMOS process with Schottky diodes and EEPROM supported. The die size is 1.5 mm × 1.0 mm.     

A 270-kb/s 35-mW modulator IC for GSM cellular radio hand-heldterminals

The modulator IC is a mixed analog/digital transceiver component in a chip set that is designed for the hand-held terminals of the pan-European 900-MHz Groupe Special Mobile (GSM) digital cellular radio network. The concept of the radio-frequency environment in which the circuit is used is explained, focusing on the differences in existing systems. The architecture and different functions of the modulator circuit and details of the digital and analog processing in the transmission mode are discussed. The receiving mode, which is mostly based on analog processing, is highlighted. The device generates Gaussian minimum-shift-keying (GMSK) modulation and converts the received signal to 8-b words after filtering. The modulator IC uses digital waveform generation and a quadrature signal representation. This device is implemented in a 1.5-μm CMOS technology. The power consumption is less than 35 mW from a 5-V supply     

UHF RFID标签芯片模拟射频前端设计

对射频识别标签芯片系统结构及工作原理进行分析,设计应用于符合ISO18000—6C／B两种标准的UHFRFID标签芯片的模拟射频前端,主要包括整流电路、稳压电路、调制／解调电路、上电复位及时钟产生电路。模拟射频前端芯片采用TSMC0．18μm CMOS混合信号工艺流片验证。测试结果表明,所研制的模拟射频前端性能满足UHF RFID标签芯片系统要求。     

A low-power transponder IC for high-performance identificationsystems

A novel CMOS integrated circuit for a batteryless transponder system is presented. Batteryless transponders require contactless transmission of both the information and power between a mobile data carrier and a stationary or handheld reader unit. The operating principle of this system gives a superior performance in reading distance due to separation of the powering and data transmission phases-compared to systems with continuous powering and damping modulation. This paper describes the function of the transponder IC and the circuit design techniques used for the various building blocks     

Compact 10-Gbit/s optical transmitter and receiver circuit packs

Compact wideband 10-Gbit/s optical transmitter and receiver circuit packs are realized using high speed analog and digital GaAs IC's as well as a highly thermally conductive board and appropriately designed small function block modules that employ multichip packaging and resonant cavity mode damping. To achieve a compact receiver, the receiver circuit employs a clamp and peak-detector IC in the high speed analog equalizer amplifier to obtain a constant output direct current level for any mark density imbalance in the number of ones and zeros in the signal and a variable phase-shifter IC in the timing circuit. Realized circuit pack size is 200×280×15.24 mm and the power consumption of each pack is about 25 W