基于队列的动态电源管理策略

动态电源管理技术是一项系统级电源优化策略,它通过有选择性的关闭(或者降低性能)空闲的可控设备来降低功耗.在回顾以往系统级动态电源管理策略的基础上,提出了一种基于队列的新型系统级动态电源管理策略,利用队列不但可以提高对于可控模块何时被唤醒时间的预测命中率,并且能够根据不断变化的任务负载情况进行自身的快速调节,以适应不同任务的要求,通过搭建的SkyEye环境进行仿真,结果验证了在性能和节能方面,该方法优于传统方法.     

End-to-End Energy Management in Networked Real-Time Embedded Systems

Performing end-to-end energy management for the data aggregation application poses certain unique challenges particularly when the computational demands on the individual nodes are significant. In this paper, we address the problem of minimizing the total energy consumption of data aggregation with an end-to-end latency constraint while taking into account both the computational and communication workloads in the network. We consider a model where individual nodes support both Dynamic Voltage Scaling (DVS) and Dynamic Modulation Scaling (DMS) power management techniques and explore the energy-time tradeoffs these techniques offer. Specifically, we make the following contributions in this paper. First, we present an analytical problem formulation for the ideal case where each node can scale its frequency and modulation continuously. Second, we prove that the problem is NP-Hard for practical scenarios where such continuity cannot be supported. We then present a Mixed Integer Linear Programming (MILP) formulation to obtain the optimal solution for the practical problem. Further, we present polynomial time heuristic algorithms which employ the energy-gain metric. We evaluated the performance of the proposed algorithms for a variety of scenarios and our results show that the energy savings obtained by the proposed algorithms are comparable to that of MILP.     

Variable assignment and instruction scheduling for processor with multi-module memory

Multi-module memory has been employed in high-end digital signal processing system (DSP). It provides high memory bandwidth and low power operating mode for energy savings. However, making full use of these architectural features is a challenging problem for code optimization. In this paper, we propose an integer linear programming (ILP) model to optimize the performance and energy consumption of multi-module memories by solving variable assignment, instruction scheduling and operating mode setting problems simultaneously. The combined effect of performance and energy saving requirements has been considered as well. Specially, we develop two optimization techniques to improve the computation efficiency of our ILP model. The experimental results show that the optimal performance and energy solution can be achieved within a reasonable amount of time.     

Cutting the energy bills of Internet Service Providers and telecoms through power management: An impact analysis

The energy consumption of the Information and Communication Technology (ICT) sector has been increasing recently; this sector is estimated to account for 2% of the total energy consumption. An even more aggressively increasing trend is the volume of Internet traffic and the number of connected devices. Thus, reducing the energy needs of the Internet is recognised as one of the main challenges that the ICT sector will have to face in the near future to reduce its overall energy footprint. Introducing energy-efficient techniques, both at the device level and the network level, is required.The main goal of this work is to quantitatively evaluate the potential energy savings from applying energy-efficient techniques, while examining the trade-off between network performance and the achieved energy savings.We introduce a categorisation of the energy-aware design space, focusing on the existing techniques in the device data plane, and contribute an analytical framework to represent the impact of energy-aware technologies and solutions for network devices. Our energy profile model represents the diverse energy-aware states of the network devices and is applied over two reference scenarios, one of a large-scale Telco (Telecom Italia) and one of a medium size Internet Service Provider (GRNET), to evaluate the impact of each energy-aware technology and the energy savings potential at the Home, Access, Metro/Transport and Core parts of each network.The results show the estimates of energy savings exceed 60% in many cases, while maintaining the same quality of service as in the energy-agnostic case.     

Energy-optimal base station density in cellular access networks with sleep modes

Sleep modes are widely accepted as an effective technique for energy-efficient networking: by adequately putting to sleep and waking up network resources according to traffic demands, a proportionality between energy consumption and network utilization can be approached, with important reductions in energy consumption. Previous studies have investigated and evaluated sleep modes for wireless access networks, computing variable percentages of energy savings. In this paper we characterize the maximum energy saving that can be achieved in a cellular wireless access network under a given performance constraint. In particular, our approach allows the derivation of realistic estimates of the energy-optimal density of base stations corresponding to a given user density, under a fixed performance constraint. Our results allow different sleep mode proposals to be measured against the maximum theoretically achievable improvement. We show, through numerical evaluation, the possible energy savings in today’s networks, and we further demonstrate that even with the development of highly energy-efficient hardware, a holistic approach incorporating system level techniques is essential to achieving maximum energy efficiency.     

Sleep modes effectiveness in backbone networks with limited configurations

In this work we propose a strategy to minimize the impact of energy saving techniques on the performance of an Internet Service Provider network. We study the problem of putting in sleep mode links of a backbone network, while limiting the number of times each device changes its power state (full power mode or sleep mode). Our aim is to limit the number of network configurations, i.e., the change of the current set of network links at full power. We tackle the problem both analytically and by simulations. We first present a model, based on random graph theory, to compute the links energy saving given a traffic variation, QoS requirements, and the number of allowed network configurations. The same analysis is then repeated over two realistic case studies, and with realistic algorithms to choose the set of links in sleep mode. Results show (both analytically and by simulation) that the energy savings with few configurations (two or three per day) are close to the maximum one, in which a new configuration is applied for each traffic matrix. Moreover, we show that few configurations per day limit the number of overhead messages required for exchanging information about the device state. Thus, we can conclude that a practical implementation of sleep mode strategies for network operators is to define, on the basis of typical traffic trend, few configurations to be activated in specific time instants.     

Dynamic core allocation for energy efficient video decoding in homogeneous and heterogeneous multicore architectures

This paper describes two dynamic core allocation techniques for video decoding on homogeneous and heterogeneous embedded multicore platforms with the objective of reducing energy consumption while guaranteeing performance. While decoding a frame, the scheme measures “slack” and “overshoot” over the budgeted decode time and amortizes across the neighboring frames to achieve overall performance, compensating for the overshoot with the slack time. It allocates, on a per-frame basis, an appropriate number and types of cores for decoding to guarantee performance, while saving energy by using clock gating to switch off unused cores. Using the Sniper simulator to evaluate the implementation of the scheme on a modern embedded processor, we get an energy saving of 6%–61% while strictly adhering to the required performance of 75 fps on homogeneous multicore architectures. We receive an energy saving of 2%–46% while meeting the performance of 25 fps on heterogeneous multicore architectures. Thus, we show that substantial energy savings can be achieved in video decoding by employing dynamic core allocation, compared with the default strategy of allocating as many cores as available.     

Rolling-horizon scheduling for energy constrained distributed real-time embedded systems

Energy-efficient scheduling approaches are critical to battery driven real-time embedded systems. Traditional energy-aware scheduling schemes are mainly based on the individual task scheduling. Consequently, the scheduling space for each task is small, and the schedulability and energy saving are very limited, especially when the system is heavily loaded. To remedy this problem, we propose a novel rolling-horizon (RH) strategy that can be applied to any scheduling algorithm to improve schedulability. In addition, we develop a new energy-efficient adaptive scheduling algorithm (EASA) that can adaptively adjust supply voltages according to the system workload for energy efficiency. Both the RH strategy and EASA algorithm are combined to form our scheduling approach, RH-EASA. Experimental results show that in comparison with some typical traditional scheduling schemes, RH-EASA can achieve significant energy savings while meeting most task deadlines (namely, high schedulability) for distributed real-time embedded systems with dynamic workloads.     

A thermal-aware VM consolidation mechanism with outage avoidance

Efficient energy and temperature management techniques are essential elements for operators of cloud data centers. Dynamic virtual machine (VM) consolidation using live migration techniques presents a great opportunity for cloud service providers to adaptively reduce energy consumption and optimize their resource utilization. In recent studies, power consumption readings of individual physical hosts were chosen as the main monitoring parameters in their allocation policies, whereas very few have considered host temperature, which has shown to have a negative impact on server reliability, as a migration criterion. In this work, a thermal-aware VM consolidation mechanism is proposed for resource allocation optimization and server reliability assurance. We consider the variability in host temperature as a migration criterion to avoid outage incidents via having better VM consolidations. Extensive simulation results obtained from CloudSim show the promising performance of the proposed mechanism in energy saving while reducing the number of server outage incidents due to fluctuations in host temperature.     

Achieving energy efficiency during collective communications

Energy consumption has become a major design constraint in modern computing systems. With the advent of petaflops architectures, power‐efficient software stacks have become imperative for scalability. Techniques such as dynamic voltage and frequency scaling (called DVFS) and CPU clock modulation (called throttling) are often used to reduce the power consumption of the compute nodes. To avoid significant performance losses, these techniques should be used judiciously during parallel application execution. For example, its communication phases may be good candidates to apply the DVFS and CPU throttling without incurring a considerable performance loss. They are often considered as indivisible operations although little attention is being devoted to the energy saving potential of their algorithmic steps. In this work, two important collective communication operations, all‐to‐all and allgather, are investigated as to their augmentation with energy saving strategies on the per‐call basis. The experiments prove the viability of such a fine‐grain approach. They also validate a theoretical power consumption estimate for multicore nodes proposed here. While keeping the performance loss low, the obtained energy savings were always significantly higher than those achieved when DVFS or throttling were switched on across the entire application run. Copyright © 2012 John Wiley & Sons, Ltd.     

A new integrated energy-saving scheme in green Fiber-Wireless（FiWi） access network

Energy savings in Internet have been regarded as a significant technical issue for academic and industrial community.Particularly,access network accounts for more than 70%of the total energy consumption of Internet.As a promising access technique,Fiber-Wireless(FiWi)network not only enables the cost-effective broadband access,but also provides more opportunities for energy savings.Previous works mostly focused on the energy savings in the optical back-end of FiWi.Generally,they extended the Optical Network Unit(ONU)sleep mechanisms initially designed for Passive Optical Network(PON)to FiWi by combining with the wireless rerouting.However,most of these works left the energy savings in the wireless front-end untouched.In fact,when one or more ONUs in the network is/are sleeping,many wireless components remain idle or underutilized which cause a lot of energy waste.Motivated by this,we propose a new integrated Wireless-Optical Energy Savings(WOES)scheme for the comprehensive energy savings in FiWi.The WOES scheme consists of two interactive modules,Energy-Efficient ONU Management(EEOM)and Energy-Aware Topology Configuration(EATC).EEOM aims at the energy savings in the optical back-end by putting the low-load ONUs into sleep state.A pair of thresholds is introduced into EEOM to maintain the states of ONUs.As soon as ONUs states change,EATC will reconfigure the wireless topology by putting the idle Radio Interfaces(RIs)into standby state,thus minimizing the energy consumption of the wireless front-end.Simulation results show that the WOES scheme can reduce the energy consumption significantly with just a little performance degradation in network throughput and end-to-end delay.     

Automatic runtime frequency-scaling system for energy savings in parallel applications

Although high-performance computing has always been about efficient application execution, both energy and power consumption have become critical concerns owing to their effect on operating costs and failure rates of large-scale computing platforms. Modern processors provide techniques, such as dynamic voltage and frequency scaling (DVFS) and CPU clock modulation (called throttling), to improve energy efficiency on-the-fly. Without careful application, however, DVFS and throttling may cause a significant performance loss due to system overhead. This paper proposes a novel runtime system that maximizes energy saving by selecting appropriate values for DVFS and throttling in parallel applications. Specifically, the system automatically predicts communication phases in parallel applications and applies frequency scaling considering both the CPU offload, provided by the network-interface card, and the architectural stalls during computation. Experiments, performed on NAS parallel benchmarks as well as on real-world applications in molecular dynamics and linear system solution, demonstrate that the proposed runtime system obtaining energy savings of as much as 14 % with a low performance loss of about 2 %.     

Hybrid Clouds brokering: Business opportunities,QoS and energy-saving issues

Hybrid Clouds couple the scalability offered by public Clouds with the greater control supplied by private ones. A (hybrid) Cloud broker acting as an intermediary between users and providers of public Cloud services, may support customers in the selection of the most suitable offers, optionally adding the provisioning of dedicated services with higher levels of quality.The paper presents a Cloud brokering algorithm delivering services with different level of non-functional requirements, to the private or public resources, on the basis of different scheduling criteria. With the objective of maximize user satisfaction and broker’s revenues, the algorithm pursues profit increases by reducing energy costs, through the adoption of energy saving mechanisms. A simulation model is used to evaluate performance in terms of broker’s revenue, user satisfaction and energy behavior of various allocation policies. Simulation results show that differences among policies depend on system loads and that the use of turn on and off techniques greatly improves energy savings at low and medium load rates.     

Energy Efficient Scheduling of Real-Time Tasks on Multicore Processors

Multicore processors deliver a higher throughput at lower power consumption than unicore pro- cessors. In the near future, they will thus be widely used in mobile real-time systems. There have been many research on energy-efficient scheduling of real-time tasks using DVS. These approaches must be modified for multicore processors, however, since normally all the cores in a chip must run at the same performance level. Thus blindly adopting existing DVS algorithms which do not consider the restriction will result in a waste of energy. This article suggests Dynamic Repartitioning algorithm based on existing partitioning approaches of multiprocessor systems. The algorithm dynamically balances the task loads of multiple cores to optimize power consumption during execution. We also suggest Dynamic Core Scaling algorithm which adjusts the number of active cores to reduce leakage power consumption under low load conditions. Simulation results show that Dynamic Repartitioning can produce energy savings of about 8% even with the best energy-efficient partitioning algorithm. The results also show that Dynamic Core Scaling can reduce energy consumption by about 26% under low load conditions.     

RAFT: A router architecture with frequency tuning for on-chip networks

With increasing number of cores being integrated on a single die, Network-on-Chips (NoCs) have become the de-facto standard in providing scalable communication backbones for these multi-core chips. NoCs have a significant impact on the system’s performance, power and reliability. However, NoCs can be plagued by higher power consumption and degraded throughput if the network and router are not designed properly. Towards this end, this paper proposes a novel router architecture, where we tune the frequency of a router in response to network load to manage both performance and power. We propose three dynamic frequency tuning techniques, FreqBoost, FreqThrtl and FreqTune, targeted at congestion and power management in NoCs. We also propose and evaluate a novel fine-grained frequency tuning scheme where we vary the number of virtual-channels in a router dynamically. As a further optimization to these schemes, we propose a frequency tuning scheme where we tune the frequency of the four ports of a mesh router separately from the local port. As enablers for these techniques, we exploit Dynamic Voltage and Frequency Scaling (DVFS) and the imbalance in a generic router pipeline through time stealing. We also evaluate and analyze the proposed schemes from the point of view of reliability against soft error vulnerability and provide guidelines in choosing the appropriate scheme when reliability is the prime design constraint.Experiments using synthetic workloads on an 8 × 8 wormhole-switched mesh interconnect show that FreqBoost is a better choice for reducing average latency (maximum 40%) while, FreqThrtl provides the maximum benefits in terms of power saving and energy delay product (EDP). The FreqTune scheme is a better candidate for optimizing both performance and power, achieving on an average 36% reduction in latency, 13% savings in power (up to 24% at high load), and 40% savings (up to 70% at high load) in EDP. With application benchmarks, we observe IPC improvement up to 23% using our design. Our analysis shows FreqBoost to be the most robust scheme amongst the three schemes when reliability is a concern.     

EClass: An execution classification approach to improving the energy-efficiency of software via machine learning

Energy efficiency at the software level has gained much attention in the past decade. This paper presents a performance-aware frequency assignment algorithm for reducing processor energy consumption using Dynamic Voltage and Frequency Scaling (DVFS). Existing energy-saving techniques often rely on simplified predictions or domain knowledge to extract energy savings for specialized software (such as multimedia or mobile applications) or hardware (such as NPU or sensor nodes). We present an innovative framework, known as EClass, for general-purpose DVFS processors by recognizing short and repetitive utilization patterns efficiently using machine learning. Our algorithm is lightweight and can save up to 52.9% of the energy consumption compared with the classical PAST algorithm. It achieves an average savings of 9.1% when compared with an existing online learning algorithm that also utilizes the statistics from the current execution only. We have simulated the algorithms on a cycle-accurate power simulator. Experimental results show that EClass can effectively save energy for real life applications that exhibit mixed CPU utilization patterns during executions. Our research challenges an assumption among previous work in the research community that a simple and efficient heuristic should be used to adjust the processor frequency online. Our empirical result shows that the use of an advanced algorithm such as machine learning can not only compensate for the energy needed to run such an algorithm, but also outperforms prior techniques based on the above assumption.     

A transparent and adaptive reconfigurable system

In the current scenario, where computer systems are characterized by a high diversity of applications coexisting in a single device, and with the stagnation in frequency scaling because of the excessive power dissipation, reconfigurable systems have already proven to be very effective. However, they all present two major drawbacks, which are addressed by this work: lack of transparency (the need for special tools or compilers that changes the original code) and no ability to adapt to applications with different behaviors and characteristics, so significant gains are achieved only in very specific data stream oriented applications. Therefore, this work proposes the Dynamic Instruction Merging (DIM), a Binary Translation mechanism responsible for transforming sequences of instructions into a coarse-grained array configuration at run-time, in a totally transparent process, with support to speculative execution. The proposed system does not impose any kind of modification to the source or binary codes, so full binary compatibility is maintained. Moreover, it can optimize any application, even those that do not present specific kernels for optimization. DIM presents, on average, 2.7 times of performance gains and 2.35 times of energy savings over a MIPS processor, and a higher IPC than an out-of-order superscalar processor, running the MIBench benchmark set.     

Practical aspects of preprocessing techniques for K-Best tree search MIMO detectors

It has been shown in several works that some preprocessing techniques can improve data detection performance when they are applied to the channel matrix of MIMO wireless systems. In particular, these techniques can be used previously to K-Best tree search algorithms, and they are known to achieve successful results. Throughout this work, the performance and complexity of two preprocessing techniques (VBLAST ZF-DFE ordering and LLL lattice-reduction) are evaluated and compared. The LLL algorithm and a recently proposed fixed-complexity version of it are tested. In addition, a low-complexity implementation of the VBLAST ZF-DFE method is proposed. Results show that the LLL preprocessing is less costly than the VBLAST ZF-DFE ordering in average. Also, the BER curves of the K-Best detector in a 4×4 MIMO system reveal that the LLL method can only present better detection performance than the VBLAST ZF-DFE ordering for high SNRs and low values of K.     

A survey of power and energy efficient techniques for high performance numerical linear algebra operations

Extreme scale supercomputers available before the end of this decade are expected to have 100 million to 1 billion computing cores. The power and energy efficiency issue has become one of the primary concerns of extreme scale high performance scientific computing. This paper surveys the research on saving power and energy for numerical linear algebra algorithms in high performance scientific computing on supercomputers around the world. We first stress the significance of numerical linear algebra algorithms in high performance scientific computing nowadays, followed by a background introduction on widely used numerical linear algebra algorithms and software libraries and benchmarks. We summarize commonly deployed power management techniques for reducing power and energy consumption in high performance computing systems by presenting power and energy models and two fundamental types of power management techniques: static and dynamic. Further, we review the research on saving power and energy for high performance numerical linear algebra algorithms from four aspects: profiling, trading off performance, static saving, and dynamic saving, and summarize state-of-the-art techniques for achieving power and energy efficiency in each category individually. Finally, we discuss potential directions of future work and summarize the paper.     

System level fixed priority energy management algorithm for embedded real time application

Dynamic power management (DPM) and dynamic voltage scaling (DVS) are crucial techniques to reduce the energy consumption in embedded real-time systems. Many previous studies have focused on the energy consumption of the processor or I/O devices. In this paper, we focus on the problem of energy management integrating DVS and DPM techniques for periodic embedded real-time applications with rate monotonic (RM) policy and present a system level fixed priority energy-efficient scheduling (SLFPEES) algorithm. The SLFPEES algorithm consists of I/O device scheduling and job scheduling. I/O device scheduling is based on the dynamic power management with rate monotonic (DPM-RM) policy which puts devices into the sleep state when the idle interval is larger than devices break even time. Job scheduling is based on the RM policy and uses stack resource protocol (SRP) to guarantee exclusive access to the shared resources. For energy efficiency, the SLFPEES algorithm schedules the task with a lower speed and a higher speed. The experimental result shows that the SLFPEES algorithm can yield significantly energy savings with respect to the existing techniques.