A wide-locking range ÷3 injection-locked frequency divider using concurrent injection mechanisms

A new wide locking range divide-by-3 injection-locked frequency divider (ILFD) using a standard 0.18 μm CMOS process is presented. The ILFD uses two concurrent injection mechanisms with two independent push–push circuits to extend the locking range. It is realized with a cross-coupled n-core MOS LC-tank oscillator. The core power consumption of the ILFD core is 11.496 mW. The divider’s free-running oscillation frequency is tunable from 4.32 to 3.78 GHz by tuning the varactor’s control bias, and at the incident power of 0 dBm the maximum locking range is 3 GHz (25 %), from the incident frequency 10.5 to 13.5 GHz. The operation range is 3.6 GHz (30.76 %), from 9.9 to 13.5 GHz.     

Wide-locking range ÷3 series-tuned injection-locked frequency divider

A new wide locking range series-tuned (ST) divide-by-3 injection-locked frequency divider (ILFD) using a standard 0.18 μm CMOS process is presented. The ÷3 ILFD circuit is realized with a ST cross-coupled n-core MOS LC-tank oscillator. Two direct-injection MOSFETs in series are used as a frequency doubler and a dynamic linear mixer to widen the locking range. The power consumption of the ILFD core is 10.56 mW. The divider’s free-running frequency is tunable from 3.529 to 3.828 GHz by tuning the varactor’s control bias, and at the incident power of 0 dBm the maximum locking range is 2.3 GHz (21.6 %), from the incident frequency 9.5 to 11.8 GHz. The operation range is 2.5 GHz (23.7 %), from 9.3 to 11.8 GHz.     

A 44-/spl mu/W 4.3-GHz injection-locked frequency divider with 2.3-GHz locking range

A microwatt frequency divider for the 2.5-GHz ISM band is proposed. This divider directly modulates the output in a ring oscillator by means of a switch and realizes low power consumption with low supply voltage and a wide locking range. It is fabricated using a five-layer-metal and 0.2-/spl mu/m-gate length CMOS process. The core size is 10.8/spl times/10.5 /spl mu/m/sup 2/, which is much smaller than that of a typical inductor-enhanced frequency divider. This divider operates with a supply voltage in the range from 1.8 to 0.7V, and attains minimum power consumption of 44 /spl mu/W, in which case the supply voltage is 0.7 V, the maximum operating frequency is 4.3 GHz, and the locking range is 2.3 GHz. A derivation of the frequency locking range of the divider is provided in the Appendix.     

V-Band GaAs pHEMT Cross-Coupled Sub-Harmonic Oscillator

A$V$-band cross-coupled sub-harmonic injection-locked oscillator has been designed and fabricated using 0.15-$mu$m GaAs pHMET technology. Based on the known harmonic injecting circuit topology, this oscillator was designed by a differential output approach, a low-$Q$microstrip-line resonator, and a current mirror, which has a free-running oscillation frequency around 60GHz with a tuning range of 2.5GHz (from 57.8GHz to 60.3GHz). The maximum single-end output power is 3.8dBm with a dc dissipation of 225mW under a$-$3V supply voltage. Within the input matching network for second (30GHz) and fourth (15GHz) sub-harmonic signals injection, it demonstrates the maximum locking ranges close to 120MHz and 30MHz, respectively.     

A Low Voltage 0.35$mu$m CMOS FrequencyDivider With the Body Injection Technique

This letter proposes a new CMOS injection locked frequency divider (ILFD) fabricated in a 0.35 mum CMOS process. The ILFD circuit is realized with a cross-coupled CMOS LC-tank oscillator, and the injecticon is carried out through the bodies of cross- coupled transistors. The self-oscillating ILFD is injection-locked by second-(third-) harmonic input to obtain the division order of two (three). Measurement results show that at the supply voltage of 1.5 V and at the incident power of 10 dBm, the locking range is from the incident frequency 6.94 to 8.41 GHz in the divide-by-3 mode and the operation range is from the incident frequency 4.56 to 5.59 GHz in the divide-by-2 mode.     

LC-Tank Colpitts Injection-Locked Frequency Divider With Record Locking Range

A new wide locking range injection-locked frequency divider (ILFD) using a standard 0.18-$mu$ m CMOS process is presented. The ILFD is based on a differential voltage controlled oscillator (VCO) with two embedded injection metal oxide semiconductor field effect transistors (MOSFETs) for coupling external signal to the resonators. The new VCO is composed of two single-ended VCOs coupled with cross-coupled MOSFETs and a transformer. Measurement results show that at the supply voltage of 1.5 V, the divider's free-running frequency is tunable from 5.85 to 6.17 GHz, and at the incident power of 0 dBm the locking range is about 7.1 GHz (65.4%), from the incident frequency 7.3 to 14.4 GHz. The ILFD has a record locking range percentage among published divide-by-2 $LC$-tank ILFDs.      

A fully integrated V-band PLL MMIC using 0.15-/spl mu/m GaAs pHEMT technology

A fully integrated V-band phase-locked loop (PLL) MMIC with good phase noise and low-power consumption is developed using 0.15-/spl mu/m GaAs pHEMTs. For V-band frequency division,a wideband divide-by-3 frequency divider is proposed using cascode FET-based harmonic injection locking. The fourth subharmonic mixer using anti-parallel diode pair is employed as a high-frequency phase detector. In this way, the required frequency of the reference oscillator is lowered to one twelfth of V-band output signal. An RC low-pass filter and DC amplifier are also integrated to effectively suppress the spurious and harmonic signals, and to increase the loop gain. To reduce the circuit interactions and frequency pulling effect, buffer amplifiers are used at the output of VCO and frequency divider. The fabricated V-band PLL MMIC shows the locking range of 840 MHz around 60.1GHz under a very low power dissipation of 370 mW. Good phase noise of -95.5 dBc/Hz is measured at 100 kHz offset. The chip size is as small as 2.35/spl times/1.80 mm/sup 2/. To the best of our knowledge, the PLL MMIC of this work is one of the highest frequency monolithic PLLs that integrates all the required elements on a single chip.     

LC-tank divide-by-4 injection-locked frequency divider using the second-order harmonic feedback

A low voltage, wide locking range and operation range divide-by-4 injection-locked frequency divider (ILFD) is proposed in the paper and the ILFD was fabricated in the TSMC 90 nm RF-CMOS process. The divide-by-4 ILFD uses a cross-coupled voltage-controlled oscillator (VCO) with a parallel-tuned LC resonator and a three-transistor composite that acts as a linear and nonlinear mixer. At a drain-source bias of 0.6 V and at an incident power of 0 dBm, the operation range of the divide-by-4 ILFD is 5.3 GHz, from the incident frequency 21.1 GHz to 26.4 GHz, and the percentage of operation range is 22.31%. The locking range of the divide-by-4 ILFD is 1.4 GHz, from the incident frequency 21.1 GHz to 22.5 GHz, and the percentage of locking range is 6.42%. The core power consumption is 2.58 mW. The die area is 0.86 × 0.75 mm².     

Ring-Based Direct Injection-Locked Frequency Divider in Display Technology

This letter presents the first RF frequency divider on glass to demonstrate the feasibility of system on display (SoD). The frequency divider is developed in 1P2M 3 $mu{rm m}$ low-temperature polycrystalline silicon (LTPS) thin-film transistor technology. The core cell of the LTPS direct injection-locked frequency divider is the single stage ring oscillator. The additional cross-coupled transistor pair increases the phase shift of the ring oscillator to meet the oscillation condition. The maximum locking range of the LTPS frequency divider is 2 MHz, and it can be operated from 120 Hz to 8 MHz with frequency tuning. Operated at 10 V, the frequency divider consumes 1.8 mW of power. The area of the frequency divider circuitry is 2.13$,times,$ 2.6 mm.      

Ka波段具有宽锁定范围高注入灵敏度的分频器*

This paper proposes a direct injection-locked frequency divider（ILFD） with a wide locking range in the Ka-band. A complementary cross-coupled architecture is used to enhance the overdriving voltage of the switch transistor so that the divider locking range is extended efficiently. New insights into the locking range and output power are proposed. A new method to analyze and optimize the injection sensitivity is presented and a layout technique to reduce the parasitics of the cross-coupled transistors is applied to decrease the frequency shift and the locking range degradation. The circuit is designed in a standard 90-nm CMOS process. The total locking range of the ILFD is 43.8% at 34.5 GHz with an incident power of –3.5 dBm. The divider IC consumes 3.6 mW of power at the supply voltage of 1.2 V. The chip area including the pads is 0.50.5 mm2.     

A Ring-Oscillator-Based Wide Locking Range Frequency Divider

This letter proposes a wide locking range injection locked frequency divider (ILFD) and describes the operation principle of the ILFD. The circuit is made of a dual band two-stage differential complementery metal–oxide–semiconductor (CMOS) ring oscillator and is based on MOS switches directly coupled to the differential outputs of the ring oscillator. The divide-by-two ILFD can provide wide locking range and the measurement results show that at the supply voltage of 1.8-V, the divider free-running frequencies are 1.36GHz and 2.3GHz, and at the incident power of 0dBm, the locking range is about 1.75GHz from the incident frequency 1.9GHz to 3.65GHz at low band and 2.55GHz from 2.95GHz to 5.5GHz at high band.     

Wide locking range divide-by-4 LC-tank injection-locked frequency divider using series-mixers

A novel wide locking range divide-by-4 injection-locked frequency divider (ILFD) is proposed in this paper and was implemented in the TSMC 0.18 μm 1P6 M CMOS process. The divide-by-4 ILFD uses a cross-coupled voltage-controlled oscillator with a parallel-tuned LC resonator and two mixers in series to serve as an injection device. At the drain-source bias of 0.8 V and at the incident power of 0 dBm, the locking range of the divide-by-4 is 1.7 GHz, from the incident frequency 10.3–12.0 GHz, and the percentage of locking range is 15.25 %. The core power consumption is 11.98 mW. At drain-source voltage of 0.9 V, the locking range of the divide-by-4 is 2 GHz, from the incident frequency 10.1–12.1 GHz, and the percentage is 18.0 %. At drain-source voltage of 1.0 V, the locking range is 2.2 GHz (20.0 %) from 9.9 to 12.1 GHz. The die area is 0.492 × 0.819 mm².     

基于40 nm CMOS工艺的毫米波注入锁定分频器

设计了一款应用于60 GHz频率综合器的二分频注入锁定分频器。通过优化射频注入和直流偏置网络,降低了注入信号损耗,提高了注入效率;通过优化注入管和交叉管尺寸、减小寄生电容、降低振荡摆幅,提高了注入效率,降低了功耗;电磁仿真毫米波段电感,建立集总等效电路模型,实现了高感值、低串联电阻的差分电感的设计,提高了锁定范围。电路设计采用SMIC 40 nm 1P6M RF CMOS工艺,芯片核心面积为0.016 mm²。仿真结果表明,在0.8 V电源电压下,电路功耗为5.5 mW,工作频率范围为55.2~61.2 GHz,注入锁定范围为6.0 GHz,满足低功耗和宽锁定范围的要求,适用于毫米波段锁相环频率综合器。     

Colpitts Injection-Locked Frequency Divider Implemented With a 3-D Helical Transformer

This letter proposes a wide locking range and low power complementary Colpitts injection-locked frequency divider (ILFD) employing a 3-D helical transformer. The proposed ILFD consists of two single-ended complementary Colpitts oscillators coupled by a 3-D transformer to form a differential oscillator. The aim of using the 3-D transformer is to reduce chip size. The divide-by-2 LC-tank ILFD is implemented by adding an injection nMOS between the differential outputs of the voltage controlled oscillator. The measurement results show that at the supply voltage of 1.8 V, the divider free-running frequency is tunable from 4.24 to 4.8 GHz. At the incident power of 0 dBm, vtune=0.9 V, and V _DD=1.5 V, the locking range is about 2.4 GHz (26.9%), from the incident frequency 7.7 to 10.1 GHz. The core power consumption is 3.9 mW. The die area is 0.548times 0.656 mm².     

0.15 mu m GaAs MESFETs applied to ultrahigh-speed static frequency dividers

0.15 mu m gate-length FETs fabricated by SAINT using photo lithography are applied to ultrahigh-speed static frequency dividers. Short channel effects are suppressed by a buried p-layer and shallow active layers formed by low energy implantations and rapid thermal annealing. The maximum cutoff frequency of the 0.15 mu m gate-length FETs was 80.6 GHz. The maximum toggle frequency of the LSCFL one-quarter frequency divider is 26.8 GHz with a power dissipation of 263 mW.<>     

A CMOS direct injection-locked oscillator topology as high-frequency low-power frequency divider

An injection-locked oscillator topology is presented, based on MOS switches directly coupled to the LC tank of well-known LC oscillators. The direct injection-locking scheme features wide locking ranges, a very low input capacitance, and highest frequency capability. The direct locking and the tradeoff between power consumption and tank quality factor is verified through three test circuits in 0.13-/spl mu/m standard CMOS, aiming at input frequency ranges of 50, 40, and 15 GHz. The 40- and 50-GHz dividers consume 3 mW with locking ranges of 80 MHz and 1.5 GHz. The 15-GHz divider consumes 23 mW and features a locking range of 2.8 GHz.     

A Low Power Injection Locked LC-Tank Oscillator With Current Reused Topology

This letter presents a new current reused LC-tank injection locked oscillator (ILO), which is implemented by using a standard TSMC 0.18-mum CMOS process. The ILO, used as a divide-by-two (divide2) divider, is consisted of two switching transistors stacked in series. The injection locking is performed by adding an injection nMOS between the differential outputs of the divider. The divider can operate with a lower power due to the reuse of dc current. The measurement results show that at the supply voltage of 1.5V, the divider free-running frequency is tunable from 2.11 to 2.42GHz, and at the incident power of 0dBm the locking range of the divider in the divide2 mode is about 0.9GHz (19.8%), from the incident frequency 4.1 to 5GHz. The core power consumption is 0.97mW     

LC-Tank Colpitts Injection-Locked Frequency Divider With Even and Odd Modulo

A new injection-locked frequency divider (ILFD) using a standard 0.18 $mu$m CMOS process is presented. The ILFD is based on a differential Colpitts voltage controlled oscillator (VCO) with a direct injection MOSFET for coupling an external signal to the resonators. The VCO is composed of two single-ended VCOs coupled with two transformers. Measurement results show that at the supply voltage of 1.4 V the divider's free-running frequency is tunable from 4.77 to 5.08 GHz, and the proposed circuit can function as a first harmonic injection-locked oscillator, divide-by-2, -3, and -4 frequency divider. At the incident power of 0 dBm the divide-by-2 operation range is from the incident frequency 7.7 to 11.5 GHz and the divide-by-4 operation range is from the incident frequency 18.9 to 20.2 GHz.      

A wide locking range and low Voltage CMOS direct injection-locked frequency divider

A low voltage and wide locking range injection-locked frequency divider using a standard 0.18-/spl mu/m complementary metal oxide semiconductor (CMOS) process is presented. The wide locking range and the low-voltage operation are performed by adding an injection nMOS between the differential outputs of the divider that contains on-chip transformers which result in positive feedback loops to swing the output signals above the supply and below the ground potential. This dual-swing capability maximizes the carrier power and achieves low-voltage performance. The measurement results show that at the supply voltage of 0.75-V, the divider free-running frequency is 2.02 GHz, and at the incident power of 0 dBm the locking range is about 1.49 GHz (36.88%), from the incident frequency 3.27 to 4.64GHz.     

A Wide Locking Range LC-Tank Injection-Locked Frequency Divider

This letter proposes a wideband injection-locked frequency divider (ILFD) and describes the operation principle of the ILFD. The circuit is made of a differential CMOS LC-tank oscillator and is based on the direct injection topology. The wideband function is obtained by tuning the switch across the tank inductors. The divide-by-two ILFD can provide wide locking range and the measurement results show that at the supply voltage of 1.8 V, the dual-band divider free-running frequencies are from 1.77 to 2.17 GHz for the low-band mode, and from 2.59 to 3.2 GHz for the high-band mode. At the incident power of 0 dBm, the locking range is about 1.7 GHz from the incident frequency 3.31 to 5.01 GHz at low band and 4.06 GHz from 3.94 to 8.0 GHz at high-band mode. The circuit can be used as a single wideband ILFD.