基于ESL的MEPG-4解码SoC软硬件协同设计

随着SoC(System on Chip)系统设计复杂度的不断提高,设计前期在系统级别进行软硬件规划对SoC 性能的影响日趋增加,在复杂视频解码SoC 设计中迫切需要高效的性能分析和验证平台从架构层次上优化性能.将基于电子系统级设计(Electronic System Level , ESL)仿真方法在MPEG-4 视频解码SoC 软硬件协同设计中的应用,利用ARM SoC-Designer ESL 平台分析软件算法的瓶颈,实现软硬划分.通过SystemC 对硬件单元周期精确建模,最终实现了MEPG-4 解码软硬件协同仿真验证.实践证明利用ESL 进行系统设计不仅可以有效提高仿真速度而且设计的视频解码硬件能有效改善系统的性能.     

SystemC2.0的事务级建模

采用SystemC2.0,结合AMBA片上总线，探讨了在事务级的建模方法，并结合JPEG2000中的无损小波提升算法给出建模实例。介绍TsystemC2.O通过指令集模拟器建立事务级处理器模型的一般方法和步骤。     

HMM based soccer video event detection using enhanced mid-level semantic

Highlight detection is a fundamental step in semantics based video retrieval and personalized sports video browsing. In this paper, an effective hidden Markov models (HMMs) based soccer video event detection method based on a hierarchical video analysis framework is proposed. Soccer video shots are classified into four coarse mid-level semantics: global, median, close-up and audience. Global and local motion information is utilized for the refinement of coarse mid-level semantics. Sequential soccer video is segmented into event clips. Both the temporal transitions of the mid-level semantics and the overall features of an event clip are fused using HMMs to determine the type of event. Highlight detection performance of dynamic Bayesian networks (DBN), conditional random fields (CRF) and the proposed HMM based approach are compared. The average F-score of our highlights (including goal, shoot, foul and placed kick) detection approach is 82.92%, which outperforms that of DBN and CRF by 9.85% and 11.12% respectively. The effects of number of hidden states, overall features, and the refinement of mid-level semantics on the event detection performance are also discussed.     

使用SystemC2.0进行SoC设计建模仿真

系统级建模是大规模集成电路设计的一个重要阶段,它实现了设计从文本规范向功能实现的过渡,传统方法中一直使用硬件描述语言(HDL)来完成系统级建模,其弊端在于建模的效率低不适应如今SoC设计的要求。SystemC作为一种基于C 语言的新型硬件设计语言较已有的HDL语言在系统级建模、软硬件协调设计方面更具优势,因此也更适用于SoC的设计建模,该文介绍了SystemC的最新版本SystemC2．0的使用特点以及如何利用其进行SoC顶层设计的方法,并通过对一个短消息平台的建模实例说明如何具体使用SystemC2．0,通过与传统方法的比较可以得出结论,SystemC可以迅速有效地实现SoC系统级的建模。     

集成电路设计的系统级描述语言SystemC

人们提出了软件硬件协同设计的设计方法，以克服传统的将软件和硬件分开的设计方法对于SOC的设计存在的缺陷。SyStenlC是顺应这种发展趋势而产生的系统级描述语言。它是一种通过类对象扩展和基于C／C 的建模平台，支持系统级软硬件协同设计、仿真、验证、软硬件协同设计的系统级描述语言。本文介绍了系统级描述语言SySternC在集成电路设计中的应用，讨论了基于SyStemC的集成电路设计的设计流程、设计优势及其发展趋势。     

基于SystemC的网络处理器体系结构建模方法

随着各种新的网络业务不断出现,网络处理器得到了日益广泛的应用。文章采用基于SystemC的系统设计方法,构建一个用于网络处理器体系结构建模的平台。这个平台由一个可扩展的异构资源库和一个体系结构构造器组成。设计者只需提交配置信息表,体系结构构造器就能自动生成模型实例,得到的模型可以方便地进行细化和性能评价。这种方法能够便捷地完成各种网络处理器的体系结构建模,便于网络处理器的优化设计。     

一种用于数字视频媒体处理的SoC平台设计

提出了一种HDTV解码器片上系统(SoC)平台的设计，可进行多种IP核的集成，如MIPs CPU、HDTV视频解码器、视频处理器、OSD及外围IP设备，这些IP核分别可通过一个独立的接口与平台相连接。通过对总线和存储器访问带宽的估计，可以进行有效的数据通路管理。无需改变平台的系统结构就可灵活地添加新的功能，因此该SoC架构适合广泛地应用于数字视频媒体处理。     

浮点加法的SystemC设计

以IEEE754标准格式中的单精度格式为标准,进行浮点加法器的设计。SystemC作为一种基于C 语言的新型硬件设计语言比较原有的HDL语言在系统级建模、软硬件协调设计方面更具优势,因此也更适用于SoC的设计建模。通过对浮点加法流程的分析,以其算法设计和结构映射为例,对浮点加法步骤加以讨论,得出合适于标准格式的设计,并结合如何应用SystemC进行系统设计,给出浮点加法器部分模块的SystemC描述。     

Rosetta: semantic support for model-centered systems-level design

With the advent of system-on-chip (SoC) technology, the design of small electrical systems has become a systems engineering task. Such tasks require working at high levels of abstraction to build systems by either integrating information from various design domains or modeling different aspects of the same component. Designers of traditional computer-based systems usually rely on component-based techniques that parallel the physical architecture. The model-based approach encompasses the component-centered approach, treating structural decomposition as a single model in the overall hierarchy. Model-centered semantics and languages let designers concentrate on the data, computation, or communication models that describe complex computer-based SoC requirements. Appropriate design semantics specify each system aspect, and the designer assembles those aspects into models to define complete systems and components. The developers of Rosetta, a heterogeneous systems-level modeling language that supports predictive design analysis, have identified mechanisms for defining and composing models that specify multiple domains of interest from many perspectives. Rosetta requirements and domains define test cases and generate abstract vectors for each test scenario. Several analysis tools are under development for transforming Rosetta into existing analysis environments, and the authors describe their authors are also developing native analysis tools for symbolic verification and simulation environments. The authors use Rosetta to provide computation models for customized digital and mixed-signal system-specification environments. Other domains to support, optical and microelectrical mechanical systems specifications are under consideration     

Refinement of actions for real-time concurrent systems with causal ambiguity

Refinement of actions is a core operation in the hierarchical design methodology for concurrent systems. In this paper, we develop an approach of action refinement for concurrent systems with not only the notation of real-time but also with causal ambiguity, which often exists and appears in real application areas. The systems are modeled in terms of a timed extension of bundle event structures with causal ambiguity. Under a certain partial order semantics, the behavior of the refined system can be inferred compositionally from the behavior of the original system and from the behavior of the systems used to refine actions with explicitly represented start points. A variant of a linear-time equivalence termed pomset trace equivalence and a variant of a branching-time equivalence termed history preserving bisimulation equivalence based on the partial order semantics are both congruences under the refinement. The refinement operation behaves thus well and meets the commonly expected properties.     

使用SystemC验证库进行随机验证

SystemC是一种适用于SoC顶层设计的新型硬件设计语言,SystemC验证库是SystemC标准库的一个增补库,用以增强SystemC在SoC顶层验证的能力,本文对SystemC及其验证库进行了简要介绍,重点说明了如何使用SystemC验证库进行随机测试.     

基于SystemC的片上网络系统级建模研究

传统的硬件描述语言不适合复杂的基于片上网络的SoC系统级建模,作为IEEE 标准的SystemC语言,比已有的HDL语言在系统级建模与软硬件协同设计方面具有优势,更适合于SoC系统级建模.文中讨论了片上网络特点,分析了SystemC适应于片上网络建模的优点,并使用SystemC构建了一个片上网络的系统级仿真模型.该片上网络采用环行拓扑,基于存储-转发的路由,由链路和路由器构成.该模型可以方便地完成对片上网络多个参数进行修改,完成性能验证.     

An Efficient VLSI Architecture for Motion Compensation of AVS HDTV Decoder

In the part 2 of advanced Audio Video coding Standard （AVS-P2）, many efficient coding tools are adopted in motion compensation, such as new motion vector prediction, symmetric matching, quarter precision interpolation, etc. However, these new features enormously increase the computational complexity and the memory bandwidth requirement, which make motion compensation a difficult component in the implementation of the AVS HDTV decoder. This paper proposes an efficient motion compensation architecture for AVS-P2 video standard up to the Level 6.2 of the Jizhun Profile. It has a macroblock-level pipelined structure which consists of MV predictor unit, reference fetch unit and pixel interpolation unit. The proposed architecture exploits the parallelism in the AVS motion compensation algorithm to accelerate the speed of operations and uses the dedicated design to optimize the memory access. And it has been integrated in a prototype chip which is fabricated with TSMC 0.18-#m CMOS technology, and the experimental results show that this architecture can achieve the real time AVS-P2 decoding for the HDTV 1080i （1920 - 1088 4 ： 2 ： 0 60field/s） video. The efficient design can work at the frequency of 148.5MHz and the total gate count is about 225K.     

嵌入式系统虚拟原型平台的SystemC实现

提出一个基于SystemC的可配置嵌入式系统快速虚拟原型平台，它具有典型的片上系统结构，支持多层总线架构．作为SystemC事务处理级模型，该平台支持快速仿真和通信细化．将此平台应用于IEEE 802．11媒体访问控制器的设计，目前该系统正处于板级调试过程中．     

软件体系结构求精方法研究

1.引言软件设计在相当大的程度上可与建筑设计相类比,在古今中外建筑设计中,有诸多如欧洲的“歌特式”、“巴洛克式”、“维多利亚式”,中国的“园林式”、“宫廷式”等不同结构风格的建筑。同样在软件设计上,经过多年的理论探索和工程实践,也逐渐形成了一系列不同结构风格的软件体系结构。如UNIX操作系统中的管道一过滤器(pipe-filters)风格、分布式系统中典型的客户机/服务器(client/server)风格以及通信系统中的分层(layer)系统等等。     

基于事件驱动的系统级仿真器的操作语义

SystemC是一系统级描述语言.与传统的编程语言相比,它具有一些新的编程特性:延迟的事件通告、延迟事件通告的重载、延迟事件通告的取消以及delta-cycle.研究它的操作语义可以为进一步的形式化方面的研究提供基础.     

Generating heterogeneous executable specifications in SystemC from UML/MARTE models

Modeling and analysis of real-time embedded system is becoming an important area of research nowadays. In this context, the UML/MARTE profile has been introduced to support the specification, design, and verification stages in the development process. It provides a wide set of facilities to capture the information required in the refinement steps throughout the design flow. To carry out the actions involved in these design steps, MARTE-based tools and methodologies are required. This paper presents a methodology to automatically generate SystemC heterogeneous executable specifications from generic MARTE models. To generate these specifications, the information included in the MARTE models is extracted to discover the system structure and hierarchy. A subset of the concurrency and communication features of the MARTE profile is used for this purpose. Then, automatic generation of the executable specification is possible. The code implementing the corresponding behavior can be easily integrated into the executable model. This design methodology proposes a refinement flow in order to perform the design steps before deciding the final system implementation.     

一种基于PowerPC的安全SoC设计

提出一种基于PowerPC的安全SoC架构,通过硬件隔离的方法防御软件攻击。将软硬件资源隔离成安全和非安全两种,由硬件控制资源访问请求,可以为上层软件提供更好的安全保障。基于这种思想,对基于PowerPC的SoC架构进行了安全扩展,为上层软件提供安全和非安全两种运行环境。任何数据访问请求都会根据运行环境以及所访问的资源的安全状态判定访问是否被允许。另外,针对这种安全架构,采用基于Qemu和SystemC的高层建模方法进行建模,验证了该架构能够有效保护数据安全。     

基于DVB的视频关键帧浏览系统的实现

随着计算机技术和电视技术的发展 ,数字视频节目日益增多 .为了迅速了解视频节目的内容 ,提出了建立基于数字视频广播 (DVB)的视频关键帧浏览系统的方案 .该系统首先利用 MPEG压缩视频提供的压缩参数 ,直接将视频序列划分成以镜头为单位的视频片段 ;然后提取每个镜头中的第一个 I帧作为关键帧 ,重构其 DC图象 ;最后 ,根据 DVB标准 ,通过扩展 SI表实现对这些视频关键帧进行封装的数据结构 ,从而实现电视台对视频关键帧的发送和接收 .文中给出了前端系统结构示意图和基于关键帧 DC图象的快速浏览实例 .由于该系统直接利用了压缩参数 ,从而减少了解压缩的开销 ,具有计算代价小 ,浏览速度快的特点 .     

条件接收系统中解扰器的设计与实现

介绍数字视频广播（Digital Video Broadcasting，DVB）条件接收系统的系统结构，详细分析了条件接收系统的工作原理，并给出条件接收系统的解扰器工作流程及实现方案。