小型化R波段限幅低噪声放大器设计

设计了一种小型化限幅低噪声放大器。采用Lange桥平衡结构,在实现低噪声的同时,得到较小的输入输出电压驻波比。采用集总参数和分布参数元件,实现了各级匹配。该小型化限幅低噪声放大器工作在R波段(2.1~2.5GHz),噪声系数低于1dB,输入输出驻波系数小于1.4,增益大于31dB,带内增益波动只有±0.2dB。通过SP2D开关实现两路输出,输出隔离度大于42dB。     

小型化R波段限幅低噪声放大器设计

设计了一种小型化限幅低噪声放大器。采用Lange桥平衡结构,在实现低噪声的同时,得到较小的输入输出电压驻波比。采用集总参数和分布参数元件,实现了各级匹配。该小型化限幅低噪声放大器工作在R波段(2.1~2.5 GHz),噪声系数低于1 dB,输入输出驻波系数小于1.4,增益大于31 dB,带内增益波动只有±0.2 dB。通过SP2D开关实现两路输出,输出隔离度大于42 dB。     

宽带限幅放大器的研制

从双极型晶体管Gummel-Poon模型出发,综合考虑晶体管的器件结构、工作状态和参数提取条件等完成参数提取,运用优化算法对提取参数进行局部和全局优化,给出了得到的GP模型参数值.以此为基础采用差分放大电路形式,完成限幅放大器电路结构设计并对其进行分析,运用ADS仿真软件对限幅放大器进行仿真优化并进行了流片.结果表明,设计完成的限幅放大器在10～300 MHz工作频率内的小信号电压增益最大值大于25 dB,带内平坦度小于±1 dB,限幅输出电压约为1.2 V.     

6-18GHz高增益宽带限幅放大器

本文介绍了一种具有高输出信噪比和温度补偿功能的高增益宽带限幅放大器的设计方法。该放大器由多片PHEMT工艺制作的单片集成电路构成,其主要特点是可在6～18GHz频率范围内、满足高输出信噪比的要求下实现对-60～-7dBm输入信号的限幅功能,并在-40～70℃的温度范围内提供稳定的增益输出,输出功率为13～17dBm,噪声系数小于4dB。     

2～18GHz微波宽带限幅放大器

采用 CAD技术 ,应用 Ga As HEMT管芯及良好的微组装工艺 ,研制出 2～ 1 8GHz微波宽带限幅放大器。基片为氧化铝材料 ,尺寸 0 .2 5 mm× 2 mm× 1 0 mm,自制超微带阻容元件 ,一并装在很小的铜载体上。经试验调试得到以下结果 :f:2～ 1 8GHz,Pout:3 0～ 5 0 m W,Gp≥ 60 d B,Fn≤ 5 d B,VSWR1≤ 2 .5 ,VSWR2≤ 2 .5。     

一种5.5 GHz 30-dB低成本CMOS宽带限幅放大器

采用0.18 μm CMOS工艺,设计了一种多级级联的差分架构宽带高增益限幅放大器.该限幅放大器是为5 Gb/s同步光纤网络(SONET OC-96)设计的.采用反比例级联结构和低电压降有源电感负载来提高系统带宽,达到了设计目标.仿真结果显示,该限幅放大器获得了约30 dB的增益和5.5 GHz 3 dB带宽,电路功耗为30 m W.     

基于标准CMOS工艺的一款宽带限幅放大器芯片设计

采用SMIC 0．35μm CMOS混合信号工艺来设计开发一款适用于SDH STM-16的光接收机前端限幅放大器芯片。该限幅放大器的设计采用了电容中和技术来实现带宽的扩展,可满足2．5Gbps速率要求,芯片电路拥有信号丢失检测和自动静噪功能。芯片版图的参数提取仿真表明：芯片最小输入动态范围可达2mV,50Ω负载上的双端输出摆幅约为1400mVpp在3．3V供电下静态功耗仅为66mW,动态功耗为105mW,有实际推广价值。     

低功耗CMOS限幅放大器设计

利用0.18μm CMOS工艺设计了应用于光接收机中的10Gb/s限幅放大器.此限幅放大器由输入缓冲,4级放大单元,一级用于驱动50Ω传输线的输出缓冲和失调电压补偿回路构成.输入动态范围为38dB(10mV～800mV),负载上的输出限幅在400mV,在3.3V电源电压下,功耗仅为99mW.整个芯片面积为0.8×1.3mm2.     

IC Voltage to Current Transducers with Very Small Transconductance

This paper deals with the design of very small ac transconductance voltage to current transducers intended for the design of low frequency continuous-time filters, very large resistors and other applications. The first type of Operational Transconductance Amplifiers (OTA) is based on a triode biased transistor and a current division technique. The second one uses partial positive feedback which allows to reduce transistor dimensions but the sensitivity to transistor mismatches increases. The proposed techniques can be used for the design of high-order low frequency IC filters, ladder or based on biquads, with moderated transistor dimensions while the dynamic range-cutoff frequency performance is comparable to previously reported structures. A 10 Hz third order lowpass ladder filter has been designed with these techniques, and it shows a dynamic range of 62 dB. Besides, a novel biasing technique for capacitive sources coupled preamplifiers is proposed. Experimental results for a prototype, fabricated in a 1.2 m 1 level below 15 _RMS and dynamic range of 63 dB. The power consumption is only 10 watts and the supply voltages are ± 1.5 volts.     

A new diode-based curve-fitting predistortion lineariser for GaN power amplifier

In this article, a new strategy is presented for selecting the breakpoints on a typical characteristic of a lineariser for a saturating nonlinear amplifier. As a proof of concept, using this strategy, a new Schottky-diode based curve-fitting predistortion lineariser for a 1.65?GHz centre frequency, 50?MHz bandwidth, 30?W GaN power amplifier is developed. The proposed lineariser is tested using the two-tone test and the Quadrature Phase-Shift Keying (QPSK) modulated signal. The results show that a 3?dB improvement in the overall gain of the linearised amplifier is achieved. Moreover, for output power levels up to 36?dBm, the linearised power amplifier provides better rejection of the third-order intermodulation. Because of the hard nonlinearity of the GaN power amplifier at the high end, this improvement in intermodulation rejection vanishes for output power levels around 41?dBm.     

Very Low Voltage Rail-to-Rail Programmable-Gain CMOS Amplifier

A novel design technique for operating closed-loop amplifier circuits at very low supply voltages is proposed. It is based on the use of quasi-floating gate transistors, avoiding issues encountered in true floating-gate structures such as the initial floating-gate charge, offset drift with temperature, and the gain-bandwidth product degradation. A programmable-gain differential amplifier is designed and implemented following this method. Measurement results of an experimental prototype fabricated in a 0.5-m CMOS technology validate on silicon the proposed technique.     

Low-Voltage Current Feedback Operational Amplifiers

A number of current feedback operational amplifier topologies suitable for operation in a low-voltage environment are introduced in this paper. Their realization is based on the corresponding low-voltage second generation current conveyor topologies. Important performance factors such as accuracy, bandwidth, and linearity have been considered, and the obtained simulation results have been compared in order to evaluate the behavior of the proposed topologies.     

A Study of Equilibrium Points and Stability in a Nonlinear Model of a Phase-Compensated Operational Amplifier

A nonlinear model is derived for a phase-compensated operational amplifier. Instead of well-known s-domain small-signal analysis, which linearizes the system equations with respect to an operating point, we locate all equilibrium points and study the stability of important ones. Two important conclusions incorporating novel, yet simple, design equations to improve stability and linearity are stated.     

Megahertz operation of flexible low-voltage organic thin-film transistors

Bottom-gate, top-contact (inverted staggered) organic thin-film transistors with a channel length of 1 μm have been fabricated on flexible plastic substrates using the vacuum-deposited small-molecule semiconductor 2,9-didecyl-dinaphtho[2,3-b:2′,3′-f]thieno[3,2-b]thiophene (C₁₀-DNTT). The transistors have an effective field-effect mobility of 1.2 cm²/V s, an on/off ratio of 10⁷, a width-normalized transconductance of 1.2 S/m (with a standard deviation of 6%), and a signal propagation delay (measured in 11-stage ring oscillators) of 420 ns per stage at a supply voltage of 3 V. To our knowledge, this is the first time that megahertz operation has been achieved in flexible organic transistors at supply voltages of less than 10 V.     

Below-one-volt organic thin-film transistors with large on/off current ratios

In many of the applications envisioned for organic thin-film transistors (TFTs), the electrical power will be supplied by small batteries or energy harvesters, which implies that it will be beneficial if the TFTs can be operated with voltages of 1 V or even below 1 V. At the same time, the TFTs should have large on/off current ratios, especially for applications in digital circuits and active matrices. Here we demonstrate p-channel and n-channel organic TFTs fabricated on a flexible plastic substrate that have a turn-on voltage of exactly 0 V, a subthreshold slope of 100 mV/decade, and an on/off current ratio of 2 × 10⁵ when operated with gate-source voltages between 0 and 0.7 V. Complementary inverters fabricated using these TFTs have a small-signal gain of 90 and a minimum noise margin of 79% at a supply voltage of 0.7 V. Complementary ring oscillators can be operated with supply voltages as small as 0.4 V.     

Design tradeoffs for sub-mW CMOS biomedical limiting amplifiers

This paper presents design considerations on CMOS limiting amplifiers to be used as basic building blocks for power-efficient logarithmic amplifiers. The impact of mismatches and device-level properties on sensitivity and gain-bandwidth product is discussed. To this end, a comparison of several types of low-voltage gain cell topologies is presented. Based on statistical (Monte Carlo) results, a high-sensitivity eight-stage limiting amplifier tolerant of process spreads and devices mismatches was designed in 0.35 μm CMOS technology to operate over dc to 20 MHz bandwidth and experimentally evaluated. The proposed limiting amplifier draws 280 μA from a 2-V supply and achieves a voltage gain of 72 dB.     

A power efficient and simple scheme for dynamically biasing cascode amplifiers and telescopic op-amps

A simple dynamic biasing scheme to extend the input/output range of cascode amplifiers is introduced. It requires minimum extra hardware and no additional power consumption. A dynamic biased telescopic op-amp is discussed as an application example. Experimental results of a fabricated test chip in 0.5 μm CMOS technology are presented that verify the proposed technique.