Electrical Compensation of OLED Luminance Degradation

This letter presents a stable compensation scheme for active-matrix organic light-emitting-diode (AMOLED) displays based on the observed strong interdependence between the luminance degradation of organic light-emitting diodes (OLEDs) and its current drop under bias stress. This feedback-based compensation provides 30% improvement in luminance stability under 1600 h of accelerative stress. To employ this scheme in AMOLED displays, a new pixel circuit is presented that provides on-pixel electrical access to the OLED current without compromising the aperture ratio.     

Electrical Stress Degradation of Small-Grain Polysilicon Thin-Film Transistors

This paper is focused on the stability of n-channel laser-crystallized polysilicon thin-film transistors (TFTs) submitted to a hydrogenation process during the fabrication and with small grains dimension. With the aid of numerical simulations, we investigate the effects of static stress using two types of procedures: the on stress and the hot carrier stress. Results show that the variations of trap state density into the whole polysilicon layer and not only near the drain junction are responsible for the degradation of TFTs performances in both the two types of stress and that the interface trap states play a negligible role compared to the bulk trap states     

绝缘层/有源层界面修饰及对有机薄膜晶体管性能的影响

制备了具有修饰层的有机薄膜场效应晶体管,采用高掺杂Si作为栅极,传统的无机绝缘材料SiO2作为栅绝缘层,有机绝缘材料PMMA或OTS作为修饰层,CuPc作为有源层,Au作为源、漏极.测试结果表明,采用经过修饰的栅绝缘层SiO2/OTS和SiO2/PMMA的两种器件的开关电流比最高可达8×104,迁移率最高为1.22×10-3cm2/(V·s),而漏电流仅为10-10A,总体性能优于单层SiO2器件.     

绝缘层/有源层界面修饰及对有机薄膜晶体管性能的影响

制备了具有修饰层的有机薄膜场效应晶体管,采用高掺杂Si作为栅极,传统的无机绝缘材料SiO2作为栅绝缘层,有机绝缘材料PMMA或OTS作为修饰层,CuPc作为有源层,Au作为源、漏极.测试结果表明,采用经过修饰的栅绝缘层SiO2/OTS和SiO2/PMMA的两种器件的开关电流比最高可达8×104,迁移率最高为1.22×10-3cm2/(V·s),而漏电流仅为10-10A,总体性能优于单层SiO2器件.     

Trapping Time Characteristics of Carriers in a-InGaZnO Thin-Film Transistors Fabricated at Low Temperatures for Next-Generation Displays

The effect of low-temperature annealing treatment for various durations on the stability of amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors was investigated. By this treatment, IGZO TFTs showed enhanced electrical characteristics and better stability under positive gate bias stress with increasing annealing time up to 18,000 s. For all V _G stresses at different annealing times, the experimentally measured threshold voltage shift (ΔV _th) as a function of stress time was precisely modeled with a stretched-exponential function. ΔV _th was generated by carrier trapping, not by defect creation. It was verified that the decrease of interface trap state density (N _it) and free carriers resulted in the decrease of ΔV _th with increasing annealing time. However, the characteristic trapping time of the carriers increased up to 5.3 × 10³ s with increasing annealing time to 7,200 s and then decreased, implying that the interface quality between active layer/insulator was deteriorated with further annealing. In this study, successful fabrication of IGZO TFTs by post treatment with optimized duration is demonstrated for flexible display applications.     

OLED点阵驱动电路设计及OLED驱动特性研究

设计了一种方便测试OLED显示屏特性的驱动电路。用此驱动电路研究了与驱动方式相关的(OLED显示屏特性即“串扰”、老化、击穿等，观测到与OLED“形成过程”相对应的“恢复过程”。实验结果表明．通过对驱动电路采取适当的措施，能够减轻“串扰”和击穿对显示屏造成的影响，并延长显示屏的使用寿命。     

Electrical Instability of RF Sputter Amorphous In-Ga-Zn-O Thin-Film Transistors

Bias-temperature-stress (BTS) induced electrical instability of the RF sputter amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) was investigated. Both positive and negative BTS were applied and found to primarily cause a positive and negative voltage shift in transfer $(I _{rm DS} -V _{rm GS})$ characteristics, respectively. The time evolution of bulk-state density $(N _{rm BS})$ and characteristic temperature of the conduction-band-tail-states $(T _{G})$ are extracted. Since both values showed only minor changes after BTS, the results imply that observed shift in TFT $I _{rm DS} -V _{rm GS}$ curves were primarily due to channel charge injection/trapping rather than defect states creation. We also demonstrated the validity of using stretch-exponential equation to model both positive and negative BTS induced threshold voltage shift $(Delta V _{rm th})$ of the a-IGZO TFTs. Stress voltage and temperature dependence of $Delta V _{rm th}$ evolution are described.      

AMOLED Pixel Circuit With Electronic Compensation of Luminance Degradation

A new voltage-programmed pixel circuit using hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) for active-matrix organic light-emitting diodes (AMOLEDs) is presented. In addition to compensating for the shift in threshold voltage of TFTs, the circuit is capable of compensating for OLED luminance degradation by employing the shift in OLED voltage as a feedback of OLED degradation     

Characteristics of Gate-All-Around Twin Poly-Si Nanowire Thin-Film Transistors

We have investigated the characteristics of gate-all-around (GAA) twin polycrystalline-silicon nanowire (NW) thin-film transistors (TFTs). The NW channel and surrounding gate imparted the GAA twin NW TFT with superior channel controllability. Moreover, the combination of the high surface-to-volume ratio of the NW and the split channel structure led to highly efficient $hbox{NH}_{3}$ plasma treatment, which reduced the effective grain-boundary trap-state density. The GAA twin NW TFT exhibited greatly improved electrical performance, including a lower threshold voltage, a steeper subthreshold swing (114 mV/dec), a higher on/off current ratio $(≫! hbox{10}^{8})$, and a virtual absence of drain-induced barrier lowering (13 mV/V).      

Thermal Degradation Under Pulse Operation in Low-Temperature p-Channel Poly-Si Thin-Film Transistors

We analyzed the heat generation of a low-temperature polycrystalline thin-film transistor in pulse operation and proposed a technique for accurately measuring its thermal temperature in high-frequency operation. From this measurement, we were able to calculate the time constants for heating and radiation for the first time. At a low frequency, the temperature difference between when the pulse was on and off was remarkable. As the frequency was increased, the maximum and minimum temperatures approached each other and became equal at a frequency of approximately 1 kHz. We also measured the degradation in pulse operation and discussed the relationship between the thermal temperature and the degradation in the pulse operation     

The Electrical Properties of Unidirectional Metal-Induced Lateral Crystallized Polycrystalline-Silicon Thin-Film Transistors

It has been known that adjacent Pd enhances the crystallization rate in Ni metal-induced lateral crystallization (Ni-MILC) and this knowledge has been used to fabricate the unidirectional MILC thin-film transistors (TFTs), which eliminate the boundary formed at the center of TFT channel in a normal MILC TFTs. It is discovered that the MILC/MILC boundary (MMB) is responsible for the high leakage current and low field- effect mobility. The electrical properties of unidirectional MILC TFTs (Width/Length = 10/10 mum) improved considerably comparing to those of MILC TFTs containing the MMB. The leakage current and field-effect mobility, which have been regarded as obstacles for industrialization of the MILC process, measure to be 2.1 X 10-11 A and 83 cm²/ V ldr s, respectively.     

Advanced Amorphous Silicon Thin-Film Transistors for AM-OLEDs: Electrical Performance and Stability

We fabricated and characterized the advanced amorphous silicon thin-film transistors with a bilayer structure for both the active and gate dielectric films. The electrical field across the gate insulator has a significant influence on the device threshold voltage electrical stability. We show that high thin-film transistor stability can be achieved even under the presence of a high channel current. Its electrical and high-temperature stability improves up to a factor of five when the TFT biasing condition changes from the linear to the saturation region of operation.     

A Novel LTPS-TFT Pixel Circuit Compensating for TFT Threshold-Voltage Shift and OLED Degradation for AMOLED

This letter presents a novel pixel circuit that uses low-temperature polycrystalline-silicon thin-film transistors (LTPS-TFTs) composed of one driving and four switching TFTs for active-matrix organic light-emitting diodes (AMOLEDs) with a voltage-source method. The proposed circuit effectively enables threshold-voltage-shift correction of the drive TFT and compensates for degradation of the OLED using a feedback structure     

Investigation of the Device Degradation Mechanism in Pentacene-Based Thin-Film Transistors Using Low-Frequency-Noise Spectroscopy

The degradation process in pentacene-based organic thin-film transistors (OTFTs) is investigated. Pentacene-based OTFTs were fabricated with and without octadecyl trichlorosilane (OTS) treatment, and their device characteristics during lifetime test are evaluated using low-frequency-noise (LFN) spectroscopy. It is found that the devices exhibited the $hbox{1}/f$ type of noise behavior with generation and recombination noise superimposed. The drain-current noise was found to vary proportionally with drain current according to Hooge's empirical relation of flicker noise. Devices without any treatment show obvious interface traps and deep-level traps, while devices with OTS treatment show nonexistence of interface traps and suppression of deep-level traps. The LFN intensity is found to decrease during the device lifetime test initially, while upon the device failure, the noise level is observed to increase again. The viability of using LFN as a diagnostic tool in the organic transistor is demonstrated.      

A Fast and Compact Analog Buffer Design for Active Matrix Liquid Crystal Displays Using Polysilicon Thin-Film Transistors

This paper presents a new source-follower type analog buffer for active-matrix liquid crystal displays applications, which exhibits high immunity to the threshold voltage variations of the polysilicon (poly-Si) thin-film transistors (TFTs). The functionality of the buffer was verified through simulations. In order for the simulations to be realistic, parameters extraction from fabricated poly-Si TFTs were used.     

有机电致发光产品的研发现状

有机电致发光器件(OLED)具有驱动电压低、主动发光等优势,在平板显示领域引起了广泛的关注。本文介绍了近年来有机电致发光产品的研发状况,并展望了OLED的商业前景。     

VT Compensation Circuit for AM OLED Displays Composed of Two TFTs and One Capacitor

In this paper, we propose the threshold-voltage compensation pixel circuit that is composed of two thin-film transistors (TFTs) and one capacitor (2T1C). It not only compensates the deviation of the threshold voltage of the driver TFT but also actualizes the large aperture ratio for organic light-emitting diode (OLED) devices as well as the traditional 2T1C circuit. We show the result of SPICE simulation for the pixel circuit; it indicates that the circuit can allocate the relatively large aperture ratio for OLED devices     

Stress Power Dependent Self-Heating Degradation of Metal-Induced Laterally Crystallized n-Type Polycrystalline Silicon Thin-Film Transistors

Using a fluorinated high-k/metal gate stack combined with a stress relieved preoxide (SRPO) pretreatment before high-k deposition, we show significant device reliability and performance improvements. This is a critical result since threshold voltage instability may be a fundamental problem, and performance degradation for high-fc is a concern. The novel fluorinated Ta_infinC_y/HfZrO_infin/SRPO gate stack device exceeds the positive-bias-temperature-instability and negative-bias-temperature-instability targets with sufficient margin and has electron mobility at 1 MV/cm comparable to the industrial high-quality polySi/SiON device on bulk silicon.     

Critical Voltage for Electrical Degradation of GaN High-Electron Mobility Transistors

We have found that there is a critical drain-to-gate voltage beyond which GaN high-electron mobility transistors start to degrade in electrical-stress experiments. The critical voltage depends on the detailed voltage biasing of the device during electrical stress. It is higher in the OFF state and high-power state than at V_DS = 0. In addition, as |V_GS| increases, the critical voltage decreases. We have also found that the stress current does not affect the critical voltage although soft degradation at low voltages takes place at high stress currents. All of our findings are consistent with a degradation mechanism based on crystallographic-defect formation due to the inverse piezoelectric effect. Hot-electron-based mechanisms seem to be in contradiction with our experimental results.