基于NAND闪存的固态盘技术研究

基于NAND闪存的固态盘具有非易失、访问速度快、体积小、抗震性好以及功耗低等诸多优点,能较好缓解I/O性能瓶颈问题,已经成为学术界和产业界关注的一个研究热点.对基于NAND闪存固态盘的主要热点问题予以研究,介绍了基于闪存固态盘的技术特性,分析了其内部结构,对其关键实现技术着重进行了研究分析.     

OAFTL:一种面向企业级应用的高效闪存转换层处理策略

基于NAND闪存的存储设备通过引入闪存转换层来对闪存芯片进行封装,使得闪存存储设备像普通块设备一样使用.闪存转换层算法的性能很大程度上决定了闪存设备的存储性能,已有方法尽管可以在嵌入式环境下正常工作,但当应用到随机访问频繁的企业级应用环境中时存在访问性能低的问题.提出了一种面向企业级应用的闪存转换层算法OAFTL,该算法基于页级地址映射,根据访问操作的类型来组织映射项信息,通过为映射页保留日志信息来缓冲频繁修改的映射信息,以提高闪存读、写性能.实验结果表明,提出的OAFTL算法能够有效地适应企业级工作负载,同已有方法相比,综合读写性能提升了20%以上.     

一种基于分类策略的聚簇页级闪存转换层算法

提出一种基于分类策略的聚簇页级闪存转换层算法——CPFTL.1)CPFTL将地址映射缓存分为热映射表缓存、冷映射表缓存和连续映射表缓存,分别用来缓存访问频繁的请求的映射项、访问不频繁的请求的映射项和高空间本地性的连续请求的映射项,有效提升各类请求的处理能力;2)为利用连续请求的空间本地性,CPFTL的连续映射表缓存预取多个连续的映射项,提高它对连续请求的响应性能;3)为减少页级映射算法的转换页读写开销,CPFTL的冷映射表缓存采用聚簇策略,即将属于同一转换页中的映射项进行聚簇,按簇进行LRU管理,当冷映射表缓存满时,根据簇的映射项个数和LRU选取合适的簇剔除到闪存.实验结果显示,相比经典的页级DFTL算法和最新的SDFTL算法,CPFTL的缓存命中率、平均响应时间、地址转换页操作次数和闪存块擦除次数都有显著提升.     

基于缓存映射项重用距离的闪存地址映射方法

经典的闪存转换层(flash translation layer, FTL)地址映射方法DFTL(demand-based FTL)将全局映射信息放在闪存中,仅缓存最近最常使用的映射信息,解决了页级映射策略中映射信息较大和缓存容量有限的矛盾.但是,DFTL没有充分利用负载的空间局部性特点提高缓存命中率;在缓存失效时频繁的脏映射项换出也会导致大量的映射页写操作;此外,它未能优化垃圾回收过程中有效页迁移导致的写放大问题.针对上述不足,提出一种基于缓存映射项重用距离的地址映射方法IRR-FTL(inter-reference recency-based FTL),通过设置映射页缓存槽,充分挖掘负载空间局部性;基于缓存映射项重用距离实现负载自适应的写缓存映射表冷热分区,并分别采取不同的管理策略,减少映射页写操作;此外,实现基于重用距离的冷热数据分离存储,提高垃圾回收效率.通过采用多种负载对该方法进行验证实验,实验结果表明IRR-FTL相比DFTL缓存命中率提高29.1%,平均响应时间降低了27.3%,擦除次数降低了10.7%.     

闪存固态硬盘系统结构与技术

闪存固态硬盘凭借其高性能、低功耗、非易失等特点已经被广泛应用于个人电脑、数据中心和云存储服务等.近10年来,随着制程工艺和微电子技术的发展,闪存固态硬盘的特性发生了显著的变化.首先介绍了闪存存储单元的基本结构和存储原理.然后讨论了闪存固态硬盘的多项控制器关键技术,包括缓存设备、地址转换层、垃圾回收、数据分配、磨损均衡以及纠错码等.这些关键技术将支撑闪存固态硬盘的正常运作.此外,探讨了闪存固态硬盘的并行结构,并分析了闪存固态硬盘并行性利用的限制条件以及最新的并行性优化工作.接着,分析了3D闪存固态硬盘的发展和堆叠式结构,并针对3D固态硬盘的性能和寿命优化工作进行了归纳和分析,提出了现有3D固态硬盘性能和寿命优化工作的不足.最后,总结了当前闪存固态硬盘的现状,并提出可能的未来研究方向.     

一种优化的闪存地址映射方法

近年来,NAND闪存广泛应用于各类嵌入式系统.由于“异地更新”的限制,闪存中需要地址映射方法将来自文件系统的逻辑地址转换为闪存中的物理地址.随着闪存存储空间的日益增长,如何使地址映射表占用较小的内存而又不损失较多性能,成为一个重要的问题.基于需求的页级地址映射方法能够有效地解决这个问题,然而该方法会产生地址转换页操作的额外开销,影响系统性能.从基于需求的地址映射方法出发,从两方面进行优化：首先,为了减少转换页的频繁更新,提出了页级地址映射缓存技术以统一在闪存和内存中的地址映射信息的粒度;其次,设计了基于地址转换页的数据聚集技术.通过该技术,每个数据块在垃圾回收时产生的地址转换页的更新开销被降至最低.实验用一系列基准数据集并与之前代表性的工作进行比较,结果表明,优化的地址映射方法能够大量减少额外地址转换页的开销,并提高闪存存储系统的性能.     

一种混合映射闪存转换层的设计与实现

使用NAND Flash作为存储媒介的存储设备常需要闪存转换层(FTL)对NAND进行管理。页映射是一种常见的映射方式,但需要很大的内存存放页映射表,在嵌入式环境下这一条件往往无法满足。针对该问题,提出一种基于超级块的混合映射FTL,包括坏块管理、地址翻译、垃圾回收、上电恢复,使用的SRAM空间不到128 KB,远小于页映射,同时不需要存储映射表,程序在固态硬盘开发板上成功运行,实现固态硬盘基本读写功能。测试结果表明,该混合映射FTL方案具有较好的顺序读写性能。     

提升固态存储设备读取性能的方法

针对不带大容量缓存的固态存储设备随机读取性能差的问题,提出预取和压缩用户热数据映射表的算法,来提升热数据的访问速度.该算法包括把顺序写入的数据和随机写入的数据分开存储、压缩连续物理地址映射、后台预取热数据映射表等方法,这些方法提升了热数据的映射命中率,减少了闪存的访问次数,达到了改善系统读取性能的目的.实验结果表明,该...     

WAPFTL:支持预测机制的负载自适应闪存转换层算法

基于NAND Flash的固态盘凭借其低延迟、低功耗、高可靠性等优点,已经开始应用于企业级服务器和高性能计算领域。针对固态盘相对较差的写性能及使用寿命有限等不足,提出了一种闪存转换层中基于页映射机制的自适应地址映射算法WAPFTL。该算法能够在地址转换过程中预测负载读写特性并自适应地调整地址映射信息缓存的策略。实验结果表明,WAPFTL能够高效协同利用负载的时间局部性和空间局部性,提高地址映射命中率,减少因地址映射而引起的额外写操作次数;同时,有效减少了垃圾回收次数,提高了SSD整体性能。     

Reducing SSD access latency via NAND flash program and erase suspension

In NAND flash memory, once a page program or block erase (P/E) command is issued to a NAND flash chip, the subsequent read requests have to wait until the time-consuming P/E operation to complete. Preliminary results show that the lengthy P/E operations increase the read latency by 2× on average. This increased read latency caused by the contention may significantly degrade the overall system performance. Inspired by the internal mechanism of NAND flash P/E algorithms, we propose in this paper a low-overhead P/E suspension scheme, which suspends the on-going P/E to service pending reads and resumes the suspended P/E afterwards. Having reads enjoy the highest priority, we further extend our approach by making writes be able to preempt the erase operations in order to improve the write latency performance. In our experiments, we simulate a realistic SSD model that adopts multi-chip/channel and evaluate both SLC and MLC NAND flash as storage materials of diverse performance. Experimental results show the proposed technique achieves a near-optimal performance on servicing read requests. The write latency is significantly reduced as well. Specifically, the read latency is reduced on average by 46.5% compared to RPS (Read Priority Scheduling) and when using write–suspend–erase the write latency is reduced by 13.6% relative to FIFO.     

负载自适应的存储池数据重构策略

大数据时代各应用领域对计算机存储系统的性能和可靠性需求与日俱增.新型存储介质为计算机存储系统的性能提升提供了良好的机遇,基于固态盘的存储阵列(RAIS)已在各种存储系统中广泛使用.传统RA IS系统中当一块固态盘出现故障时,通过数据重构操作恢复故障盘的数据,重构时间长,且影响对上层应用提供I/O访问服务的能力.针对该问...     

Virtual duplication and mapping prefetching for emerging storage primitives in NAND flash memory storage systems

NAND flash memory has become the mainstream storage medium for both enterprise high performance computers and embedded systems. However, over the past several decades, the storage primitives that access secondary storage have remained unchanged, forcing NAND flash memory to serve merely as a block device like hard disk drive. Recently, several emerging storage primitives have been presented to explore the potential value of non-volatile memory devices. Although these primitives can significantly boost the access performance by providing virtual to logical address mappings, they still suffer from large RAM footprint to maintain the address mapping table and require further support for update operations.This paper presents ESP to optimize E merging S torage P rimitives with virtualization for flash memory storage systems. We propose two optimization strategies, virtual duplication and mapping prefetching to solve the critical issues in existing emerging storage primitives. The objective is to reduce unnecessary flash memory accesses and keep RAM footprint of address mapping table well under control. We have evaluated ESP on an embedded development platform. Experimental results show that ESP can significantly improve the write/read performance and reduce over 30% of garbage collection operations.     

Buffer flush and address mapping scheme for flash memory solid-state disk

The flash memory solid-state disk (SSD) is emerging as a killer application for NAND flash memory due to its high performance and low power consumption. To attain high write performance, recent SSDs use an internal SDRAM write buffer and parallel architecture that uses interleaving techniques. In such architecture, coarse-grained address mapping called superblock mapping is inevitably used to exploit the parallel architecture. However, superblock mapping shows poor performance for random write requests. In this paper, we propose a novel victim block selection policy for the write buffer considering the parallel architecture of SSD. We also propose a multi-level address mapping scheme that supports small-sized write requests while utilizing the parallel architecture. Experimental results show that the proposed scheme improves the I/O performance of SSD by up to 64% compared to the existing technique.     

固态硬盘概述

固态硬盘是利用半导体存储片来存储数据的装置。相较传统硬盘,固态硬盘在某些方面具有较大的优势。本文分别就固态硬盘的定义、分类、特点、结构和工作原理进行了系统的介绍,并且讨论了它的热点技术及发展趋势。固态硬盘应用领域愈加广泛,有望取代传统硬盘。     

An address mapping approach for test data generation of dynamic linked structures

Software testing is an important technique to assure the correctness of the software. One of the essential prerequisite tasks of software testing is test data generation. This paper proposes an approach to generate test data specifically for dynamic pointer structures. In our context, a pointer is considered and handled as a location in memory, represented by a dynamic linear array that expands and shrinks during execution. As such, pointer test data can be directly generated from this linear array. The proposed technique can also support any dynamic structures, as well as homogeneous and heterogeneous recursive structures.     

英特尔~固态硬盘910系列

正新闻焦点●基于PCIe接口的400GB和800GB容量英特尔固态硬盘910系列拥有提供了卓越的性能、耐用性和可靠性,可全面满足数据中心的苛刻要求。     

大容量NAND Flash文件系统转换层优化设计

针对基于NAND Flash转换层(NFTL)架构的Flash文件系统在大容量NAND Flash设备上存在的性能不足,本文分析了NFTL的存储管理机制,基于vxworks嵌入式系统平台提出了对NFTL模块的优化设计方法并进行了具体实现。实验表明,优化后的NFTL模块有效提高了文件系统的读写性能,缩短了加载时间。     

Towards a set of agrosystem-specific cropland mapping methods to address the global cropland diversity

Accurate cropland information is of paramount importance for crop monitoring. This study compares five existing cropland mapping methodologies over five contrasting Joint Experiment for Crop Assessment and Monitoring (JECAM) sites of medium to large average field size using the time series of 7-day 250 m Moderate Resolution Imaging Spectroradiometer (MODIS) mean composites (red and near-infrared channels). Different strategies were devised to assess the accuracy of the classification methods: confusion matrices and derived accuracy indicators with and without equalizing class proportions, assessing the pairwise difference error rates and accounting for the spatial resolution bias. The robustness of the accuracy with respect to a reduction of the quantity of calibration data available was also assessed by a bootstrap approach in which the amount of training data was systematically reduced. Methods reached overall accuracies ranging from 85% to 95%, which demonstrates the ability of 250 m imagery to resolve fields down to 20 ha. Despite significantly different error rates, the site effect was found to persistently dominate the method effect. This was confirmed even after removing the share of the classification due to the spatial resolution of the satellite data (from 10% to 30%). This underlines the effect of other agrosystems characteristics such as cloudiness, crop diversity, and calendar on the ability to perform accurately. All methods have potential for large area cropland mapping as they provided accurate results with 20% of the calibration data, e.g. 2% of the study area in Ukraine. To better address the global cropland diversity, results advocate movement towards a set of cropland classification methods that could be applied regionally according to their respective performance in specific landscapes.