Optimization of SIMOX for VLSI by electrical characterization

A comprehensive electrical characterization study which was conducted to optimize the fabrication of SIMOX substrates for VLSI is discussed. The oxygen implantation was carried out using medium-current and high-current implanters. The wafers were annealed at 1275°C and 1300°C to produce high-quality, precipitate-free material. The effect of dose, the effect of multiple implantation (by sequentially implanting and annealing), and the effect of the anneal ambient gas and the capping layer during annealing were studied. MOSFETs of various geometries with a gate oxide of ~20 nm were fabricated by a CMOS process incorporating the addition of a thin epitaxial Si layer. A general evaluation of each transistor was conducted by studying its static characteristics. The interface states, bulk traps, and carrier generation phenomena were studied. Good-quality interfaces were obtained. Better implantation control reduced contamination and suppressed deep traps below the detection limit. Multiple implantation resulted in superior material quality. as evidenced by very long generation lifetime values (> 100 μs)     

Characterization of Distribution of Trap States in Silicon-on-Insulator Layers by Front-Gate Characteristics in n-Channel SOI MOSFETs

We characterized the distribution of trap states in silicon-on-insulator (SOI) layers in epitaxial layer transfer (ELTRAN) wafers and in low-dose separation by implanted oxygen (SIMOX) wafers. We measured the front- and back-gate characteristics of MOSFETs with SOI layers of different thicknesses. We used the current-Terman method to estimate the trap states at the gate oxide (GOX)/SOI interface and at the SOI/buried oxide (BOX) interface separately. As a result, we concluded that the high-density trap states in the SOI layers in SIMOX wafers cause a gate-voltage shift, which is attributed to the charged trap states only in the inversion layer. We also found that the trap states are distributed within about 30 nm from the SOI/BOX interface in the SOI layer in SIMOX wafers, which indicates that the distribution of trap states originates from the oxygen implantation that is peculiar to the SIMOX process.     

Advanced SOI p-MOSFETs with strained-Si channel onSiGe-on-insulator substrate fabricated by SIMOX technology

We have newly developed an advanced SOI p-MOSFET with strained-Si channel on insulator (strained-SOI) structure fabricated by SIMOX (separation-by-implanted-oxygen) technology. The characteristics of this strained-SOI substrate and electrical properties of strained-SOI MOSFETs have been experimentally studied. Using strained-Si/relaxed-SiGe epitaxy technology and usual SIMOX process, we have successfully formed the layered structure of fully-strained-Si (20 nm)/fully-relaxed-SiGe film (290 nm) on uniform buried oxide layer (85 nm) inside SiGe layer. Good drain current characteristics have been obtained in strained-SOI MOSFETs. It is found that the hole mobility is enhanced in strained-SOI p-MOSFETs, compared to the universal hole mobility in an inversion layer and the mobility of control SOI p-MOSFETs. The enhancement of the drive current has been kept constant down to 0.3 μm of the effective channel length     

Electric-field-shielding layers formed by oxygen implantation into silicon

The electric-field-shielding effect was found in a layer consisting of a mixture of polycrystalline silicon and silicon oxide formed by oxygen ion implanatation. The layer was formed between the buried SiO2 and the upper Si layer, which improved characteristics for MOSFETs fabricated using SIMOX (separation by implanted oxygen) technology. By forming this layer, the threshold voltages for the MOSFETs were almost independent of substrate bias. Drain-to-source breakdown voltages for the p-MOSFETs and n-MOSFETs were raised to 250 V and 180 V, respectively.     

强流氧离子注入机注入均匀性分析及提高

对强流氧离子注入机的注入靶室进行分析探讨,对影响均匀性指标的靶盘结构、束的形状和束扫描注入方式进行研究,结合主体硬件,增加晶片自旋装置和采用新的扫描方式,来提高注入均匀性指标。     

强流氧离子注入机装卸片控制系统

介绍了一种用于强流氧离子注入机的装卸片控制系统,控制系统采用多轴运动控制器实现了多个电机的协同运动,解决了晶圆在传送过程中的中心偏差校正和角度校正的问题,并最终实现了晶圆的全自动传送。     

SIMOX Research,development, and manufacturing

Ibis Technology Corporation, 32A Cherry Hill Dr., Danvers, MA 01923 Research and development on SIMOX silicon-on-insulator material is rapidly increasing due to exciting applications for low power, low voltage, and advanced, high performance circuitry. Consistency in wafer uniformity and interface smoothness, reduction of metallic contamination, and a drive toward lower substrate cost have all contributed to the use of SIMOX as a starting substrate for production devices and circuits. Considerations for new implanter development, product material improvement, and worldwide market expansion are discussed.     

A complementary pair of planar-power MOSFET's

A complementary pair of planar-power MOSFETs has been developed, each of which has drain breakdown voltage as high as 250 V and 12-A current capability. These devices have field plates on the ion-implanted gate offset region to realize high-breakdown voltages and large current capabilities. The field distribution behavior of a field-plated high-voltage MOSFET and a non-field-plated device are compared. In this procedure, the first-order theory of pinchoff voltage of the offset region, the most important parameter for a planar-power MOSFET, is derived for high-voltage and high-current capability design. Experimental results to support the usefulness of a field plate for improving breakdown voltage and current capabilities are obtained and discussed. Finally, future possible developments of these devices, such as high-voltage and high-current approaches, are described and a new type of device structure is proposed.     

A simple technique to measure generation lifetime in partiallydepleted SOI MOSFETs

This work presents a new, simple method of measuring the generation lifetime in silicon-on-insulator (SOI) MOSFETs. Lifetime is extracted from the transient characteristics of MOSFET subthreshold current. Using this technique, generation lifetime was mapped across finished SIMOX (Separation by IMplantation of OXygen) wafers and BESOI (Bonded and Etchedback SOI) wafers. BESOI material evaluated in this study had about seven times longer effective generation lifetime than SIMOX material and both the SIMOX and the BESOI are shown to have a lifetime variation of ±10% across four inch wafers     

Monitoring hot-electron-induced degradation of floating-body SOIMOSFETs

A simple model relating the hot-electron-controlled device lifetime of floating-body SOI MOSFETs to the body voltage is discussed. The model is derived from the familiar relationship between the device lifetime and the substrate current of bulk MOSFETs, a relationship that cannot be measured directly in floating-body MOSFETs. The model, which allows quick estimation of the device lifetime from body-voltage measurements, is supported by measurements of hot-electron-induced degradation of floating-body SOI MOSFETs fabricated using SIMOX substrates     

A CV technique for measuring thin SOI film thickness

A technique is developed to measure silicon-on-insulator (SOI) silicon device film thickness using a MOSFET. The method is based on CV measurements between gate and source/drain at two different back-gate voltages. The SOI devices used in this study were n⁺ polysilicon gate n-channel MOSFETs fabricated with modified submicrometer CMOS technology on SIMOX (separation by implanted oxygen) wafers. The SIMOX wafers were implanted with a high dose of oxygen ions (10¹⁸ cm^-2) at 200 keV and subsequently annealed at 1230°C. The NMOS threshold boron implant dose is 2×10¹² cm^-2. This method is simple, nondestructive, and no special test structure is needed. Using this technique, SOI film thickness mapping was made on a finished wafer and a thickness variation of ±150 Å was found     

Radiation sensitivity of buried oxides

Capacitance-voltage (C-V) techniques have been used to examine the 10-keV x-ray radiation sensitivity of buried oxides that are created by the implantation of oxygen into silicon. Buried oxide to substrate interfaces have been studied by using samples implanted with different oxygen implant doses from a 100 mA-class implanter. Fiatband voltage (Vfb) shift for the buried oxide to the substrate interface has been used to monitor charge buildup as a function of radiation dose and applied electrical bias. The Vfb shift of the buried oxides indicate a oxide trapping behavior that is different than that of thermal oxides.     

Characterization of carrier generation in enhancement-mode SOIMOSFET's

The carrier generation in enhancement-mode SOI MOSFETs is studied by applying a suitable bias step on one gate, which drives it from depletion of accumulation to stronger accumulation and creates a deep-depletion condition under the other gate. An accurate analysis of this technique is made through a critical reexamination of the physical mechanisms and assumptions involved. By carefully considering all the essential events taking place in the device as it relaxes back to steady state, a Zerbst-type expression is obtained for the resulting current transients, which leads to a straightforward evaluation of the generation lifetime and surface generation velocity. The method is used to study SIMOX transistors, and it is shown that a very long lifetime can be achieved by multiple oxygen implants     

N沟MOSFET／SIMOX的γ射线辐照特性

对用多次注入与退火技术制成的ＳＩＭＯＸ材料制备的Ｎ沟ＭＯＳＦＥＴ进行了＾６０Ｃｏγ射线累积剂量辐照试验，并同通常的体硅ＮＭＯＳ的辐照效应作了比较，分析了引起阈值电压漂移的两个因素：氧化层电荷和界面态电荷，提出了提高ＮＭＯＳ／ＳＩＭＯＸ抗辐照性能的几点措施。     

Comparison of hole mobility in LOCOS-isolated thin-film SOIp-channel MOSFET's fabricated on various SOI substrates

The hole mobility of LOCOS-isolated thin-film silicon-on-insulator (SOI) p-channel MOSFET's fabricated on SOI substrates with different buried oxide thickness has been investigated. Two types of SOI wafers are used as a substrate: (1) SIMOX wafer with 100-nm buried oxide and (2) bonded SOI wafer with 100-nm buried oxide. Thin-film SOI p-MOSFET's fabricated on SIMOX wafer have hole mobility that is about 10% higher than that on bonded SOI wafer. This is caused by the difference in the stress under which the silicon film is after gate oxidation process. This increased hole mobility leads to the improved propagation delay time by about 10%     

Quality of gate oxides grown on state-of-the-art SIMOX and ZMR SOIsubstrates

The quality of 25-nm gate oxides formed on state-of-the-art SIMOX and ZMR silicon-on-insulator (SOI) substrates was studied using NMOSFETs. Circular, edgeless, and conventional island isolated devices were used. Devices fabricated on bulk silicon wafers were studied for comparison. I-V characteristics, breakdown voltages, charge trapping, and charge to breakdown were characterized. The results clearly demonstrated that the quality of SIMOX and ZMR wafers and especially of the top Si surface was as good as that of bulk silicon. The quality of the gate oxides formed on island isolated devices was poor due to defective oxide formed on the sidewalls. A comparison of circular, edgeless MOSFETs and island isolated MOSFETs can be used to optimize island etching, sidewall cleaning, and gate oxidation processes     

Research on the Reverse Conduction of Synchronous Rectifiers

Research on the reverse current phenomenon in synchronous rectifiers (SRs) is presented in this paper. For loss reduction, the SRs composed of metal-oxide-semiconductor field-effect transistors (MOSFETs) have recently been employed to replace the conventional rectifiers with diodes in low-voltage and high-current applications. Because the MOSFETs in the SRs are used as bidirectional switches, reverse current flow will probably occur. The reverse current phenomenon will cause undesired power loss. To clarify the effects of the reverse current on the forward converter with an SR, both the experiment and the analysis are performed. Furthermore, the concepts and methods for dealing with this phenomenon are clearly described in this paper.     

Threshold voltage instability at low temperatures in partiallydepleted thin-film SOI MOSFETs

A threshold voltage instability phenomenon at low temperatures in partially depleted thin-film silicon-on-insulator (SOI) SIMOX (separation by implantation of oxygen) MOSFETs is reported. This phenomenon was investigated under normal MOSFET operating conditions for temperatures ranging from 300 K down to 10 K, with both the magnitude and duration of the instability observed to be strongly dependent on temperature. Threshold voltage shifts as small as 0 V at room temperature and as large as 0.29 V at 10 K are reported. The duration of the instability ranged in the tens of minutes and was observed to increase as the temperature was decreased     

The effect of 1300-1380°C anneal temperatures and materialcontamination on the characteristics of CMOS/SIMOX devices

The characteristics of CMOS transistors fabrication on silicon implanted with oxygen (SIMOX) materials were measured as a function of the silicon superficial layer contamination levels. In addition, postimplant anneal temperatures of 1300°C, 1350°C, and 1380°C were examined. It is found that the transistor leakage currents as well as the integrity of the gate oxide and implanted SIMOX oxide are functions of the carbon content in the starting material. Leakage currents below 1.0×10^-12 A/μm of channel width have been measured when the carbon concentration is reduced to 2×10¹⁸/cm². In addition, the integrity of the transistor gate dielectric, SIMOX implanted oxide, and oxygen precipitate density are seen to be a function of the postimplant anneal temperature. A gate dielectric breakdown field of 10 MV/cm has been achieved when the postimplant temperature is increased to 1380°C     

Fabrication of ultrathin SOI by SIMOX water bonding (SWB)

Ultrathin silicon-on-insulator (SOI) layers of separation by implantation of oxygen (SIMOX) wafers have been transferred onto thermally oxidized silicon wafers by wafer bonding technology. Due to the technical availability and the complementary nature of SIMOX and wafer bonding approaches, SIMOX wafer bonding (SWB) solves some of the respective major difficulties faced by both SIMOX and wafer bonding for device quality ultrathin SOI mass production: the preparation of adequate buried oxide (including its interfaces) in SIMOX and the uniformly thinning one of the bonded wafers to less than 0.1 μm in wafer bonding. The effect of positive charges in the oxide on bondability of ultrathin SOI films and possible applications of SWB will also be outlined.