n-channel inversion-mode InP m.i.s.f.e.t.

Capacitance/voltage and m.i.s.f.e.t. inversion-mode f.e.t. data are reported for p-type InP. It is shown that the surface of this material appears to be inverted at zero gate bias and that good inversion-mode (normally-off) device behaviour is possible.     

n-channel m.i.s.f.e.t.s in epitaxial HgCdTe/CdTe

M.I.S.F.E.T.s have been fabricated in HgCdTe epitaxially grown on CdTe substrates. These planar n-channel f.e.t.s use ZnS as the insulator and Be ion implantation for the source and drain regions. Surface mobilities of 7×103 cm3/Vs at 77 K are reported.     

New structure of enhancement-mode GaAs microwave m.o.s.f.e.t.

This letter proposes a new feasible device structure of an enhancement-mode GaAs deep-depletion m.o.s.f.e.t. as an attractive alternative to the junction-gate f.e.t.s and describes its microwave properties. The device has been fabricated on a high-resistance epitaxial n?-layer by simple readily available technology without requiring the sophisticated control of the channel thickness needed for the conventional junction-gate f.e.t.s. The 'normally-off nature of the device can be explained on the basis of the substrate space-charge region extending over then?-layer. The microwave performance of the device can be favourably compared with that of currently achievable junction-gate normally-off f.e.t.s. Unilateral gain drops to zero at a frequency slightly above 7 GHz.     

Depletion-type m.o.s.f.e.t.s for low-temperature operation

Taking carrier freeze-out into account|a novel structure for depletion-type m.o.s.f.e.t.s suitable for low-temperature operation is proposed. Its channel consists of two regions; a relatively wide, low-impurity-density region and a relatively narrow, high-impurity-density region. It is estimated that the proposed structure has more square-law-like load character istics and higher current density than conventional ones.     

Microwave gain from an n-channel enhancement-mode InP m.i.s.f.e.t.

A power gain of 14 dB at 1 GHz has been demonstrated in an enhancement-mode m.i.s.f.e.t. constructed on an Fe-doped semi-insulating InP substrate. The same device also exhibits well behaved gain characteristics at low frequencies.     

Implanted Si m.o.s.f.e.t.s for high-speed applications

Si m.o.s.f.e.t.s with a channel length of 0.8 ?m have been fabricated using boron implantation to adjust the threshold voltage. With microwave design appropriate to keeping the parasitics small, fmax values between 10 and 12 GHz are realised also with ion implantation. Large-signal switching times of 48 ps, small-signal switching times of 44 ps and delay times of 50 ps have been achieved.     

Leak-compensated analog memory with pair m.o.s.f.e.t.s

A fast, simple, and relatively stable analog memory element is proposed, composed of two condensers and a pair of complementary m.o.s.f.e.t.s. The memory element was made sufficiently stable by the use of complementary m.o.s.f.e.t.s to enable a learning machine to complete the learning process within a comparatively short time.     

n-channel formation on semi-insulating InP surface by m.i.s.f.e.t.

InP m.i.s.f.e.t.s using Fe-doped semi-insulating material surface have been fabricated. The devices, composed of sulphur-diffused n-type source and drain and c.v.d. Al2O3 gate insulator, exhibited n-channel normally-off behaviour and a source drain capacitance two orders of magnitude smaller than that of p-InP m.i.s.f.e.t.s with the same dimensions.     

Power m.o.s.f.e.t. linear h.f. amplifiers

N-channel silicon m.o.s. transistors for h.f. power applications have been fabricated which are optimised for linear amplification. These devices exhibit 2 W output power and 11 dB power gain at 630 MHz in class-A operation. The intercept point for third-order intermodulation distortion is 48dBm, which is considerably more than the same data obtainable with bipolar transistors.     

GaAs m.a.o.s.f.e.t. memory transistor

A new non-volatile memory device is reported. This device is a GaAs m.o.s.f.e.t. with charge storage in the gate in which is a double oxide structure of aluminium oxide and GaAs native oxide, both oxides are grown anodically. The fabrication of the device is described and the results of initial measurements on the charging and charge retention properties are presented.     

Etched Schottky-barrier m.o.s.f.e.t.s using a single mask

A simplified method for fabricating silicon m.o.s. transistors using a single photographic mask is described. The source and drain regions are etched; underetching the oxide results in autoregistration of the gate. The characteristics of both Schottky-barrier and p?n junction source and drain devices are presented.     

Silicon-on-sapphire m.o.s.f.e.t.s fabricated by back-surface laser-anneal technology

Self-aligned aluminium-gate silicon-on sapphire (s.o.s.) m.o.s.f.e.t.s have been fabricated by applying laser-anneal technology from the back surface for activation of the ion-implanted channel layer. The threshold voltage and surface electron mobility were similar to the conventional silicon-gate m.o.s.f.e.t.s, but the low resistivity of gate and interconnection electrodes using aluminium is advantageous for high switching speed m.o.s. l.s.i.     

Test of the thermal-noise hypothesis in m.o.s.f.e.t.s

Evidence is given that, for m.o.s.f.e.t.s, another source o noise besides thermal noise must be operating in the conducting channel.     

n- and p-channel m.o.s.f.e.t.s as Rayleigh-surface-wave detectors

We have studied the piezoresistance effect in an m.o.s.f.e.t. structure used as a Rayleigh-surface-wave transducer. The investigation was carried out over a large frequency range about a central value of 100 MHz. Results for silicon?m.o.s.f.e.t. n- and p- channel inversion layers are given.     

Four-quadrant multiplier using m.o.s.f.e.t. differential amplifiers

This letter describes an arrangement of two current-biased and one voltage-biased m.o.s.f.e.t. differential amplifiers. The circuit is suitable for a 4-quadrant multiplier of quite good linearity in a wide output-current range.     

Low-noise GaAs m.e.s.f.e.t.s

GaAs m.e.s.f.e.t.s with optimum noise figures of 1.6 dB at 6 GHz have been fabricated by projection photolithography. An equation has been developed for the calculation of optimum noise figure which gives good agreement between calculated and measured values.     

Offset-voltage temperature-coefficient in dual m.o.s.f.e.t. source followers

A technique is given for predicting the approximate temperature coefficient of offset voltage of a differential m.o.s.f.e.t. source-follower arrangement incorporated in a unity-gain buffer amplifier set up for zero offset at room temperature. The prediction is dependent on only one measurement, using a bridge-circuit technique, and takes account of possible power-law differences in the nominally matched dual m.o.s.f.e.t.s.     

Electron dynamics in P-Si m.o.s.f.e.t. inversion channels

An attempt is presented in modelling at room temperature the carrier dynamics in the inversion layer using a Monte Carlo simulation. The interaction of inversion carriers with the surface is regarded successively as perfectly specular and perfectly diffuse. A comparison of the results with the experimental data of Coen and Muller gives reasonable agreement in a wide range of electric field.     

Current-kink noise of n-channel enhancement e.s.f.i.-m.o.s. s.o.s. transistors

An experimental study of the low-frequency-noise properties of n-channel epitaxial silicon films on insulator m.o.s. s.o.s. transistors has been performed. The measurements show an excessive noise contribution at drain voltages corresponding to the current-kink effect for temperatures ranging from 4.2 to 300 K.     

High-speed 1 ?m GaAs m.e.s.f.e.t.

By minimising parasitic series resistances, a GaAs m.e.s.f.e.t. with 1 ?m gate length was fabricated, possessing the highest known r.f. power gain, measured up to 18 GHz, for GaAs m.e.s.f.e.t.s.