Effect of hydrogen annealing on hot-carrier instability of X-Ray irradiated CMOS devices

In the very large scale integration (VLSI) technology, the need for high density and high performance integrated circuit (IC) chip demands advanced processing techniques that often result in the generation of high energy particles and photons. Frequently, the radiation damage are introduced by these energetic particles and photons during device processing. The radiation damage created by x-ray irradiation, which can often occur during metal sputtering process, has been shown to potentially enhance hot-carrier instability if the neutral traps which act as electron or hole traps in the silicon dioxide is not annealed out. In this paper, we investigate the effects of annealing using different hydrogen contents and temperatures on the device characteristics and hot carrier instability of 0.5 μm CMOS devices after 1500 mJ/cm² synchrotron x-ray irradiation. Three different annealing conditions were employed; 400° C H₂, 450° C H₂, and 400° C H₂ + N₂. It is found that for all three different hydrogen anneals the normal characteristics of irradiated CMOS devices can be effectively recovered. The hot-carrier instability of bothp- andn-channel MOSFETs are significantly enhanced after x-ray irradiation due to the creation of neutral traps and positively charged oxide traps. After high H₂ (100%) concentration anneals at 450° C, the hot-carrier instability in irradiatedn-channel devices is greatly reduced and comparable to the non-irradiated devices. Although the hot-carrier instability inp-channel devices is also significantly reduced after annealing, the threshold voltage shifts are still enhanced as compared to the devices without exposure to x-ray irradiation during maximum gate current stress. For those non-irradiated, but hydrogen-annealedp-channel devices, the hot-carrier instability was observed to be worse than the non-irradiated device without hydrogen annealing.     

Radiation damage and its effect on hot-carrier induced instability of 0.5 μm CMOS devices patterned using synchrotron x-ray lithography

The device characteristics and the radiation damgae ofn-channel andp-channel MOSFETs patterned using synchrotron x-ray lithography are examined. The effect of radiation damage caused by x-ray lithography on the device reliability during hot electron injection is investigated. In addition to neutral traps, large amounts of positive oxide charge and interface states, particularly acceptor-like interface states, which cause degradation of MOSFET characteristics are found to be created by x-ray irradiation during the lithography process. Although several annealing steps are performed throughout the entire fabrication process, the radiation damage, particularly neutral traps, is not completely annealed out. The hot-electron induced instability inp-channel MOSFETs is significantly increased due to the enhanced electron trapping in the oxide by residual traps. The effect of radiation damage on hot electron induced instability is found to be more severe inn ⁺-poly buried-channelp-MOSFETs than inp ⁺-poly surface-channel p-MOSFETs. However, the degradation inn-channel MOSFETs due to channel hot carriers is not significantly increased by x-ray lithography. These results suggest that the major degradation mechanism due to hot-carrier inp-channel MOSFETs is electron trapping and inn-channel MOSFETs is interface state generation. It also suggests thatp-channel MOSFETs, in addition ton-channel MOSFETs, needs to be carefully examined in terms of hot carrier induced instability in CMOS VLSI circuits patterned using x-ray lithography.     

X-ray lithography induced radiation damage in CMOS and bipolar devices

Radiation effects from a synchroton x-ray lithography source on the performance degradation and long term reliability of high performance self-aligned bipolar devices and deep sub-micron CMOS devices are studied. The hot-carrier properties of the x-ray induced damage in CMOS devices, such as interface states, positive oxide charges and neutral traps have been examined. The effect of these radiation induced defects and their impact on the DRAM circuits in terms of the performance and reliability are discussed. In the self-aligned, double polysilicon bipolar transistor structure interface states and trapped charges can be generated by the radiation source in the sidewall oxide near the emitter-base junction such damage can increase the emitter-base leakage current. This increase of base current can substantially degrade the device current gain at low bias.     

Heavy ion induced electrical property degradation in sub-100 nm bulk silicon MOS devices

The radiation response of 90 nm bulk silicon MOS devices after heavy ion irradiation is experimentally investigated. Due to the random strike of the incident particle, different degradation behaviors of bulk silicon MOS devices are observed. The drain current and maximum transconductance degrade as a result of the displacement damage in the channel induced by heavy ion strike. The off-state leakage current degradation and threshold voltage shift are also observed after heavy ion irradiation. The results suggest that the radiation induced damage of sub-100 nm MOS devices caused by heavy ion irradiation should be paid attention.     

A re-examination of practical performance limits of scaled n-channel and ϱ-channel MOS devices for VLSI

The device performance of scaled n-channel and p-channel MOS devices is theoretically examined in detail down to 0.2 μm gate length including all of the major effects such as source/drain series resistance, mobility degradation due to both parallel and perpendicular fields, and inversion layer capacitance under three different power supply scenarios. From the degradation factor of triode gain and drain saturation current, the relative contribution of each parasitic effect on device performance degradation has been examined. Based on these calculations, some modifications to straight-forward scaling are considered.     

Hole trapping in E-beam irradiated SiO2 films

Low energy (25 kV) electron beam irradiation of MOS capacitors is shown to produce neutral hole traps in thin ‘radiation hardened’ SiO₂ films. These traps are found in an uncharged state after irradiation and are populated by passing a small hole current, generated by avalanche breakdown of then-type silicon substrate, through the oxide. From the time dependence of the observed trapping, a capture cross-section between 1 × 10∼⁻¹³ and 1 × 10⁻¹⁴ cm² is deduced. The trap density is found to depend on the annealing conditions and incident electron beam dosage. The density of traps increases with incident electron beam exposure. Once introduced into the oxide by the radiation the traps can be removed by thermal anneals at temperatures above 500° C. Parallels between electron and hole trapping on these neutral centers are strong evidence for an amphoteric uncharged trap generated by ionizing radiation.     

Damages of Ge devices by 2-MeV electrons and their recovery

The degradation and recovery behavior of the device performance of Ge diodes and p-Ge MOSFETs irradiated by 2-MeV electrons are studied. For diodes, it is noted that both the reverse and forward current increase after irradiation. However, an interesting observation is that the forward current decreases after irradiation for a forward voltage larger than ∼0.7 V. This reduction can be explained by an increased resistivity of the n-well in the germanium substrate. For the transistors, after irradiation, a slight negative shift of the threshold voltage and a decrease of the drain current input and output characteristics have been observed together with a decrease of the hole mobility. This is mainly due to the increase of the absolute value of the threshold voltage induced by positive charges in the gate oxide. The degradation recovers by thermal annealing after irradiation. For 1 × 10¹⁷ e/cm², the diode performance almost completely recovers to the initial condition after a 250 °C annealing and the anneal process is characterized by an activation energy of 0.59 eV. For transistor irradiated to 5 × 10¹⁷ e/cm², the device performance also recovers but with an activation energy of 0.33 eV.     

平衡材料对双极器件电离总剂量效应的影响

本文选择贴片式NPN双极器件作为研究对象,采用在器件辐照试验时设置平衡材料的方法,通过对器件辐照敏感电参数的测量,研究平衡材料对双极器件电离总剂量效应的影响程度.结果表明：在器件辐照试验时设置平衡材料,器件的敏感电参数电流增益较未设置平衡材料退化更明显,仅设置前平衡材料比仅设置后平衡材料影响更大.在器件前后均设置平衡材料、仅设置前平衡材料和仅设置后平衡材料三种不同条件下,器件电流增益退化差异在50krad（Si）剂量点时分别为22.55%、13.38%和12.58,当辐照总剂量达到300krad（Si）时降低至11.65%、7.31%和4.14%.因此在评估器件的抗辐照性能过程中,很有必要在器件进行辐照试验时根据器件的结构尺寸,设置一定厚度的平衡材料,使器件敏感区满足次级电子平衡条件,从而保证器件敏感区实际吸收剂量达到标称辐照剂量.     

Spatial Localization of Carrier Traps in 4H-SiC MOSFET Devices Using Thermally Stimulated Current

Carrier traps in 4H-SiC metal–oxide–semiconductor (MOS) capacitor and transistor devices were studied using the thermally stimulated current (TSC) method. TSC spectra from p-type MOS capacitors and n-channel MOS field-effect transistors (MOSFETs) indicated the presence of oxide traps with peak emission around 55 K. An additional peak near 80 K was observed due to acceptor activation and hole traps near the interface. The physical location of the traps in the devices was deduced using a localized electric field approach. The density of hole traps contributing to the 80-K peak was separated from the acceptor trap density using a gamma-ray irradiation method. As a result, hole trap density of N _t,hole = 2.08 × 10¹⁵ cm⁻³ at 2 MV/cm gate field and N _t,hole = 2.5 × 10¹⁶ cm⁻³ at 4.5 MV/cm gate field was extracted from the 80-K TSC spectra. Measurements of the source-body n ⁺–p junction suggested the presence of implantation damage in the space-charge region, as well as defect states near the n ⁺ SiC substrate.     

双极运算放大器辐射损伤的时间相关性

通过一系列辐照实验对双极运放辐射损伤的时间相关性进行了研究.结果表明,双极运放的辐射损伤与时间有着密切的关系,通过调整辐照剂量率、退火温度及时间等参数进行循环辐照-退火实验,可以测评出器件的低剂量率辐射损伤情况,并从界面态角度对这种损伤机理进行了分析.     

Impact of Gamma Irradiation Effects on IGBT and Design Parameter Considerations

The primary dose effects on an insulated gate bipolar transistor (IGBT) irradiated with a ⁶⁰Co gamma‐ray source are found in both of the components of the threshold shifting due to oxide charge trapping in the MOS and the reduction of current gain in the bipolar transistor. In this letter, the IGBT macro‐model incorporating irradiation is implemented, and the electrical characteristics are analyzed by SPICE simulation and experiments. In addition, the collector current characteristics as a function of gate emitter voltage, V_GE, are compared with the model considering the radiation damage of different doses under positive biases.     

The Physics of Failure of MIS Devices Under Radiation

Unlike the solar cell and the NPN transistor, the MOS device does not sustain a degradation as the principal effect of exposure to nuclear radiation. Instead, the MOS device undergoes a change of operating region, the change being in the nature of a parallel shift of the characteristic curve of the device, produced by the trapping of radiation-excited holes within the 2000-? insulator and the consequent buildup of a fixed bulk space charge in the insulator. Less significant changes under radiation are variations in the shape of the characteristic curve and increased leakage current. These are genuine degradation effects and are closely analogous to the strong effects of ionizing radiation in planar-passivated junction devices such as bipolar transistors, SCRs, diodes, etc. In the latter cases, the devices are acting as MIS devices and hole trapping in the oxide is again responsible for their degradation. A consideration of the case of simple MIS devices under radiation is thus found helpful in elucidating some other important types of failure under radiation of silicon junction devices.     

Annealing characteristics of hot carrier induced damage in n-channel MOSFETs

The recovery process of hot carrier induced degraded device parameters in n-channel MOSFETs has been analysed by both isothermal and isochronal annealing. A wide distribution of activation energies of hot carrier induced damage, with a peak at around 0·9eV is observed. It can be seen that isochronal annealing has advantages over isothermal annealing in recovering the degraded device characteristics in comparatively less time. Bias annealing of the device reveals that initially the annealing of trapped oxide charges increases the interface state density, after reaching the peak value interface states anneal as a logarithmic function of time. The energy distribution of hot carrier induced interface states is similar to radiation induced interface states after a few hours of annealing at room temperature.     

A high-temperature radiation-resistant rectifier based on p<Superscript>+</Superscript>-n junctions in 4H-SiC ion-implanted with aluminum

A combination of a high-dose (5 s- 10¹⁶ cm^-2) implantation of Al ions into epitaxial n-type 4H SiC layers grown by chemical deposition from th e vapor phase and rapid (15 s) thermal annealing at 1700–1750°C has been used to form layers with a rectangular impurity profile according to the mechanism of solid-phase epitaxial crystallization. The combined effects of enhanced diffusion of radiation defects after implantation and gettering of defects during annealing bring about an improvement in the quality of the initial material, which ensures an increase in the diffusion length of the minority charge carriers by several times. Metastable states annealed within different temperature ranges are formed in SiC under the effect of irradiation with various particles. Low-temperature annealing of radiation defects increases the radiation and temporal lifetime of devices under irradiation. High-temperature annealing of radiation defects makes it possible to vary the lifetime of nonequilibrium charge carriers, i.e, vary the frequency range of devices. The radiation resistance of SiC-based devices increases as the operation temperature is increased to 500°C.     

Effects of gamma irradiation on the insulated-gate bipolar transistor

The effects of gamma irradiation on the International Rectifier IRGBC20 insulated-gate bipolar transistor (IGBT) was investigated. These devices were found to be sensitive to gamma irradiation due to their metal-oxide-semiconductor field-effect-transistor (MOSFET) input drive. Total doses as small as 50 Krads(Si) increased the saturated collector current (I_c) by an order of magnitude when the irradiation was performed with zero gate bias. For a constant (V_g − V_th) of 0.5 V, I_c decreased to about half its pre-irradiation value after irradiation to 40 Krads(Si). The threshold voltage of the MOSFET shifted in the negative direction with the largest and smallest shifts occurring for a positive and negative gate bias applied during the irradiation, respectively. The shift in threshold voltage saturated at the cut-in voltage of the P-i-N diode portion of the device, indicating that gamma irradiation does not affect the P-i-N diode. The reverse blocking leakage current of the device is not very sensitive to radiation below a total dose of 400 Krads(Si), but increases sharply for larger doses. All of these radiation-degraded characteristics of the IGBT are primarily the result of increasing interface-state and oxide-trapped charge densities with total radiation dose, which decreases the carrier channel mobility by increased carrier scattering. Both room temperature and 150°C annealing were observed to partially recover all of the device characteristics by reducing the radiation-induced oxide-trapped charges.     

Radiation damage of Ge-on-Si devices

The radiation damage induced by 2-MeV electrons and 70-MeV protons in p⁺n diodes and p-channel MOS transistors, fabricated in epitaxial Ge-on-Si substrates is reported for the first time. For irradiation above 5×10¹⁵ e/cm², it is noted that both the reverse and forward current increase, and that the forward current is lower after irradiation for a forward voltage larger than about 0.5 V. The reason for this might be an increased resistivity of the Ge-on-Si substrate. For p-MOSFETs, for a 1×10¹⁶ e/cm² dose, a slight negative shift of the threshold voltage and a decrease of the drain current for input and output characteristics have been observed. In addition, g_m decreases after irradiation. The degradation of the transistor performance is thought to be due to irradiation-induced positive charges in the high-κ gate dielectric. The induced lattice defects are also mainly responsible for the leakage current increase of the irradiated diodes.     

Low temperature processed mosfet's using laser recrystallized polycrystalline silicon films

An n-channel MOS transistor was fabricated on a laser recrystallized polycrystalline silicon film at temperatures below 630°C. The gate oxide was sputter deposited at 200°C. Lasers were used for substrate recrystallization, implantation damage annealing and dopant drive-in. An electron field effect mobility higher than 100 cm²/V · sec. was observed on the finished transistors. With 10 V applied to the gate of the transistors for 2 hr, less than a 20 mV shift in threshold voltage was observed.     

A study of x-ray damage effects on the short channel behavior of IGFET’s

Ionizing particles and radiation may play an important, albeit undesirable role in the processing of VLSI and ULSI circuits in that they can generate bulk charge in the gate insulator of IGFETs. In this regard, there is conflicting information in the literature on the effects of ionizing radiation on short channel phenomena in IGFETs. For example, Peckeraret al. in 1983 claimed that the effective channel length increases when positive coulombic charge is introduced during irradiation, resulting in a decrease in the short channel effect. Schrankleret al. in 1985 claimed in an experimental study, on the other hand, using 28.0 nm thick gate oxides and 0.9–10 μm channel lengths, that the effect is increased,i.e., the short channel effect begins at longer channel lengths. Wilson and Blue in 1982, in a theoretical study concluded that other than a uniform downward shift in theV _T -channel length curve due to the presence of insulator net fixed positive charge, no effect should be observed. Because of these conflicting reports, it was decided to evaluate this behavior using two different background doping levels inn-channel structures, with physical channel lengths ranging between 1.5 and 10 μm, in 0.1 and 0.5 gWcm (100) Si. To further explore the situation, gate oxide (grown at 1000° C in O₂ containing 4.5% HC1) thicknesses were varied from 17.0–35.0 nm, and the absorbed radiation dose using Al-K_α (1.5 keV) x-rays was varied between 2.4 × 10⁶ rad (SiO₂) and 2.4 × 10⁷ rad (SiO₂). For all conditions studied above, a uniform downward shift in the V_T-Channel length curve was observed, essentially corroborating the theoretical conclusions of Wilson and Blue. In addition to the above, the effects of intentionally doping the gate insulator with boron (1.2 × 10¹² B⁺ cm⁻²) implanted at 8 and 10 keV into 25.0 nm and 31.4 nm oxides, respectively, on short channel effects were evaluated for devices grown onp-type 0.5 Ω.cm substrates. Unlike the devices which did not have excess boron intentionally implanted into the gate insulator, it was found that higher concentrations of boron (2.0 × 10¹⁷ cm⁻³ in the insulator via implantation as compared to 4.2 × 10¹⁶ cm⁻³ incorporated in oxides during the oxide growth on 0.5 Ω.cm type (100) Silicon) leads to smaller short channel effects in unirradiated devices. On the other hand, these heavily doped oxides show a distinct worsening of the short channel effect after exposure to 2.4 × 10⁷ rad (SiO₂) using Al-K_α radiation. Thus, while normal devices exhibit little if any short channel improvement, or degradation following irradiation, intentionally doped insulators show an improvement in short channel characteristics prior to irradiation, and a worsening of the short channel effect following irradiation.     

1/f noise and radiation effects in MOS devices

An extensive comparison of the 1/f noise and radiation response of MOS devices is presented. Variations in the room-temperature 1/f noise of unirradiated transistors in the linear regime of device operation correlate strongly with variations in postirradiation threshold-voltage shifts due to oxide trap charge. A simple number fluctuation model has been developed to semi-quantitatively account for this correlation. The 1/f noise of irradiated n-channel MOS transistors increases during irradiation with increasing oxide-trap charge and decreases during postirradiation positive-bias annealing with decreasing oxide-trap charge. No such correlation is found between low-frequency 1/f noise and interface-trap charge. The noise of irradiated p-channel MOS transistors also increases during irradiation, but in contrast to the n-channel response, the p-channel transistor noise magnitude increases during positive-bias annealing with decreasing oxide-trap charge. A qualitative model involving the electrostatic charging and discharging of border traps, as well as accompanying changes in trap energy, is developed to account for this difference in n- and p-channel postirradiation annealing response. The correlation between the low-frequency 1/f noise of unirradiated devices and their postirradiation oxide-trap charge suggests noise measurements can be used as a nondestructive screen of oxide trap charge related failures in discrete MOS devices and for small scale circuits in which critical transistors can be isolated. It also suggests that process techniques developed to reduce radiation-induced-hole trapping in MOS devices can be applied to reduce the low-frequency 1/f noise of MOS circuits and devices. In particular, reducing the number of oxygen vacancies and vacancy complexes in the SiO ₂ can significantly reduce the 1/f noise of MOS devices both in and outside a radiation environment     

Damage constant and deep-level transient spectroscopy in neutron irradiated GaAsP alloys

Damage produced in VPE GaAs_{1− x P x} . alloys by fast neutron irradiation at room temperature was studied, in light emitting diodes, through the evolution of device carrier lifetime, photoluminescence, electroluminescence and transient capacitance spectroscopy characteristics. Neutron fluxes were in the 10¹³−10¹⁴ neutrons/cm² range so as not to heavily damage the devices. Damage constants are 10⁻⁵ to 10⁻⁶ cm²/s for 0.3 ≤x ≤ 1. The carrier removal rate was ≈; 10 cm⁻¹. Deep-level transient spectroscopy in n-type layers revealed that fast neutrons created a broad center atE _c − 0.7 eV, and at a ≈;1 cm⁻¹ generation rate. For thex ≥ 0.4 composition range studied, trap characteristics and introduction rates were rather independent ofx. From photocapacitance quenching measurements it is suggested that the neutron generated centers are EL2-related.