A low power automatic gain control loop for a receiver

This paper proposes a new structure to lower the power consumption of a variable gain amplifier(VGA) and keep the linearity of the VGA unchanged.The structure is used in a high rate amplitude-shift keying(ASK) based IF-stage.It includes an automatic gain control(AGC) loop and ASK demodulator.The AGC mainly consists of sixstage VGAs.The IF-stage is realized in 0.18μm CMOS technology.The measurement results show that the power consumption of the whole system is very low.The system consumes 730μA while oper...     

A high-performance low-power CMOS AGC for GPS application

In this paper, a wide tuning range, low power CMOS automatic gain control (AGC) with a simple architecture is proposed. The proposed AGC is composed of variable gain amplifier (VGA), comparator and charge pump, and the dB-linear gain is controlled by charge pump. The AGC was implemented in a 0.18um CMOS technology. The dynamic range of the VGA is more than 55dB, the bandwidth is 30MHz and the gain error lower than ±1.5dB over the full temperature and gain ranges. It is designed for GPS application and is fed from a single 1.8V power supply. The AGC power consumption is less than 5mW and area of the AGC is 700*450um2.     

A novel reconfigurable variable gain amplifier for a multi-mode multi-band receiver

This paper presents a novel approach for designing a reconfigurable variable gain amplifier(VGA) for the multi-mode multi-band receiver system RF front-end applications.The configuration,which is comprised of gain circuits,control circuit,DC offset cancellation circuit and mode switch circuit is proposed to save die area and power consumption with the function of multi-mode and multi-band through reusing.The VGA is realized in 0.18μm CMOS technology with 1.8 V power supply voltage providing a gain tuning...     

Distributed Power Control for Energy Conservation in Hybrid Cellular Network with Device-to-Device Communication

Device-to-Device （D2D） com- munication has been proposed as a promising implementation of green communication to benefit the existed cellular network. In order to limit cross-tier interference while explore the gain of short-range communication, we devise a series of distributed power control （DPC） schemes for energy conservation （EC） and enhancement of radio resource utilization in the hybrid system. Firstly, a constrained opportunistic power control model is built up to take advantage of the interference avoidance methodology in the presence of service requirement and power constraint. Then, biasing scheme and admission control are added to evade ineffective power consumption and maintain the feasibility of the system. Upon feasibility, a non-cooperative game is further formulated to exploit the profit in EC with minor influence on spectral efficiency （SE）. The convergence of the DPC schemes is validated and their performance is confirmed via simulation results.     

一种应用两级VGA具有-10~50dB线性调节范围全差分自动增益控制电路

A differential automatic gain control(AGC) circuit is presented.The AGC architecture contains twostage variable gain amplifiers(VGAs) which are implemented with a Gilbert cell,a peak detector(PD),a low pass filter,an operational amplifier,and two voltage to current(V-I) convenors.One stage VGA achieves 30 dB gain due to the use of active load.The AGC circuit is implemented in UMC 0.18-μm single-poly six-metal CMOS process technology.Measurement results show that the final differential output swing of the 2nd stage VGA is about 0.9-Vpp;the total gain of the two VGAs can be varied linearly from -10 to 50 dB when the control voltage varies from 0.3 to 0.9 V.The final circuit(containing output buffers and a band-gap reference) consumes 37 mA from single 1.8 V voltage supply.For a 50 mV amplitude 60%modulation depth input AM signal it needs 100μs to stabilize the output.The frequency response of the circuit has almost a constant -3 dB bandwidth of 2.2 MHz. Its OIP3 result is at 19 dBm.     

一种用于数字助听器SoC的高性能低功耗、可配置自动增益控制环路

A low-power,configurable auto-gain control loop for a digital hearing aid system on a chip(SoC) is presented.By adopting a mixed-signal feedback control structure and peak detection and judgment,it can work in automatic gain or variable gain control modes through a digital signal processing unit.A noise-reduction and dynamic range(DR) improvement technique is also used to ensure the DR of the circuit in a low-voltage supply.The circuit is implemented in an SMIC 0.13 μm 1P8M CMOS process.The measurement results show that in a 1 V power supply,1.6 kHz input frequency and 200 mVp-p,the SFDR is 74.3 dB,the THD is 66.1 dB,and the total power is 89 μW,meeting the application requirements of hearing aid SoCs.     

一种新型指数增益控制60dB可变增益放大器

A CMOS variable gain amplifier（VGA） that adopts a novel exponential gain approximation is presented.No additional exponential gain control circuit is required in the proposed VGA used in a direct conversion receiver.A wide gain control voltage from 0.4 to 1.8 V and a high linearity performance are achieved.The three-stage VGA with automatic gain control（AGC） and DC offset cancellation（DCOC） is fabricated in a 0.18-μm CMOS technology and shows a linear gain range of more than 58-dB with a linearity error less than ±1 dB.The 3-dB bandwidth is over 8 MHz at all gain settings.The measured input-referred third intercept point（IIP3） of the proposed VGA varies from-18.1 to 13.5 dBm,and the measured noise figure varies from 27 to 65 dB at a frequency of 1 MHz.The dynamic range of the closed-loop AGC exceeds 56 dB,where the output signal-to-noise-and-distortion ratio（SNDR） reaches 20 dB.The whole circuit,occupying 0.3 mm^2 of chip area,dissipates less than 3.7 mA from a 1.8-V supply.     

Design of a low noise distributed amplifier with adjustable gain control in 0.15μm GaAs PHEMT

正A low noise distributed amplifier consisting of 9 gain cells is presented.The chip is fabricated with 0.15-μm GaAs pseudomorphic high electron mobility transistor(PHEMT) technology from Win Semiconductor of Taiwan.A special optional gate bias technique is introduced to allow an adjustable gain control range of 10 dB.A novel cascode structure is adopted to extend the output voltage and bandwidth.The measurement results show that the amplifier gives an average gain of 15 dB with a gain flatness of±1 dB in the 2-20 GHz band.The noise figure is between 2 and 4.1 dB during the band from 2 to 20 GHz.The amplifier also provides 13.8 dBm of output power at a 1 dB gain compression point and 10.5 dBm of input third order intercept point(IIP3),which demonstrates the excellent performance of linearity.The power consumption is 300 mW with a supply of 5 V,and the chip area is 2.36×1.01 mm~2.     

1-V电源65nm GP CMOS工艺下一款十位80MS/s 1.6mW逐次逼近型模数转换器

This paper presents a 10-bit 80-MS/s successive approximation register(SAR) analog-to-digital converter (ADC) suitable for integration in a system on a chip(SoC).By using the top-plate-sample switching scheme and a split capacitive array structure,the total capacitance is dramatically reduced which leads to low power and high speed.Since the split structure makes the capacitive array highly sensitive to parasitic capacitance,a three-row layout method is applied to the layout design.To overcome the charge leakage in the nanometer process,a special input stage is proposed in the comparator.As 80 MS/s sampling rate for a 10-bit SAR ADC results in around 1 GHz logic control clock,and a tunable clock generator is implemented.The prototype was fabricated in 65 nm 1P9M (one-poly-nine-metal) GP(general purpose) CMOS technology.Measurement results show a peak signal-to-noise and distortion ratio(SINAD) of 48.3 dB and 1.6 mW total power consumption with a figure of merit(FOM) of 94.8 fJ/conversion-step.     

An RF front-end with an automatic gain control technique for a U/V band CMMB receiver

This paper presents a fully integrated RF front-end with an automatic gain control(AGC) scheme and a digitally controlled radio frequency varied gain amplifier(RFVGA) for a U/V band China Mobile Multimedia Broadcasting(CMMB) direct conversion receiver.The RFVGA provides a gain range of 50 dB with a 1.6 dB step. The adopted AGC strategy could improve immunity to adjacent channel signal,which is of importance for CMMB application.The front-end,composed of a low noise amplifier(LNA),an RFVGA,a mixer and AGC,achieves an input referred 3rd order intercept point(IIP3) of 4.9 dBm with the LNA in low gain mode and the RFVGA in medium gain mode,and a less than 4 dB double side band noise figure with both the LNA and the RFVGA in high gain mode.The proposed RF front-end is fabricated in a 0.35μm SiGe BiCMOS technology and consumes 25.6 mA from a 3.0 V power supply.     

多个定波长抽运宽带光纤拉曼放大器的设计

提出了一种新的光纤拉曼增益谱的测量方法,通过光纤的受激拉曼谱和自发辐射谱的解调而获得拉曼增益谱图,同时利用该方法用于3个波长为1428nm,1445nm,1467nm抽运的宽带光纤拉曼放大器的设计,得到最大开关增益13dB,1dB带宽34nm的拉曼放大,与小信号增益法测量结果一致.实际证明:该方法快速简单、实时性强,具有实际应用价值.     

链路系统的色亮增益不公式的建立和讨论

以泰克公司对色亮增益相对失真提出的色亮增益不的定义为依据，根据视频电路的传输理论建立了链路系统的色亮增益不的计算公式，并对CCIR和GB确认的统计性公式作了一些讨论。，This paper is based on the definition of imparity of color-luminance gain put forward by Tektronix Co． Ltd． a formula for calclating the imparity of color-luminance gain in a transmission link system is derived with video transmission theory． The statistical formula established by CCIR and GB is discussed．     

一款采用有源电感的增益可调且平坦的超宽带低噪声放大器

采用有源电感,设计了一款增益可调且平坦的超宽带低噪声放大器(FTG UWB-LNA)。在输入级,采用具有新型偏置电路和RLC反馈的共基-共射放大器来实现良好的宽带输入阻抗匹配;在放大级,采用由新型有源电感与达林顿结构构成的组合电路,来实现增益的可调性、平坦化和幅度提升。在输出级,采用电阻并联和电流镜偏置的共集放大器,来实现良好的输出阻抗匹配。基于WIN 0.2μm GaAs HBT工艺库,对FTG UWB-LNA进行验证,结果表明：在1-6GHz频带内,增益(S21)可以在21.16dB-23.9dB之间调谐,最佳增益平坦度达到±0.65dB;输入回波损耗(S11)小于-10dB;输出回波损耗(S22)小于-12dB;噪声系数(NF)小于4.08dB;在4V的工作电压下,静态功耗小于33mW。     

链路系统的色亮增益不等公式的建立和讨论

以泰克公司对色亮增益相对失真提出的色亮增益不等的定义为依据,根据视频电路的传输理论建立了链路系统的色亮增益不等的计算公式,并对ＣＣＩＲ和ＧＢ确认的统计性公式作了一些讨论。     

光纤单程小信号增益的单光束测量技术

探讨了将ＡＳＥ测增益技术应用到激活光纤的增益测量。根据建立的理论模型，用计算机算得了光纤中的相对增益。     

TCM网格编码调制技术编码增益分析

TCM编码调制技术是一种将编码与调制有机结合起来的编码调制技术,它既不增加频带宽度,又不降低信息传输速率,可使系统的频带利用率和功率资源同时得到有效利用。给出了TCM网格编码调制技术的渐进编码增益(ACG)概念及计算公式,该公式简单可行,但是利用该公式计算的结果不能达到十分精确的效果。针对此问题,又通过推导分析渐进增益编码计算公式,得出计算公式偏大的重要结论,并通过比较仿真结果和计算结果验证了该结论。     

低副瓣气象雷达天线增益测量及误差分析

简述了低副瓣S波段8.54 m气象雷达天线的基本特性,提出利用方向图积分法计算天线方向性增益,扣除方向图有限积分区域引起的增益损失、漏失损失、交叉极化损失、失配损失和馈源网络插入损耗,从而确定天线增益的方法。给出了各种增益损失因子的计算公式,分析了方向图积分法测量天线增益误差,其均方根误差≤"0.224 dB。最后给出了S波段8.54 m气象雷达天线增益的实测结果,测量结果同理论结果吻合很好。     

Ku波段LNA仿真优化设计

本文论述了应用Ansoft公司的Serenade8．7微波仿真软件设计Ku波段LNA的过程，通过优化仿真和最后测量的结果比较，采用该软件设计出的产品技术指标较好。     

基于信道系数的认知网络节点选择算法

为改善认知网络通信性能,根据机会协作通信技术思想,提出了基于信道系数的认知网络节点选择算法,并对算法性能进行了研究。结果表明,该算法能够有效提高频谱资源利用效率、提升次网络吞吐量。     

CMOS可变增益放大器设计概述

可变增益放大器是模拟单元电路之一,起着变化增益、调整信号动态范围、稳定信号功率的作用.文章综述了CMOS集成可变增益放大器的研究情况;给出了可变增益放大器的定义、应用、分类和主要指标,描述了多种开环和闭环放大器的结构,分析了相应的增益控制方法及其优缺点;说明了在CMOS工艺下实现放大器增益按指数变化的几种途径.最后,介绍了用于无线数字通信,具有宽带、高线性、低电源电压等高性能可变增益放大器的设计实例.