Characterization of reduced pressure chemical vapor deposited Si0.8Ge0.2/Si multi-layers

We have investigated the Si_0.8Ge_0.2/Si multi-layer grown directly onto the Si (001) substrates using reduced pressure chemical vapor deposition. The thicknesses of the Si_0.8Ge_0.2/Si multi-layer were determined using transmission electron microscopy. From the results of energy-dispersive X-ray spectroscopy and X-ray diffraction analyses on the Si_0.8Ge_0.2/Si multi-layer, Ge composition in the Si_1?xGe_x layers was determined as ～20% and the value of residual strain ε of the Si_0.8Ge_0.2 layer is calculated to be 0.012. Three peaks are observed in Raman spectrum, which are located at approximately 514, 404, and 303 cm^?1, corresponding to the vibration of Si–Si, Si–Ge, and Ge–Ge phonons, respectively. The photoluminescence spectrum originates from the radiative recombinations both from the Si substrate and the Si_0.8Ge_0.2/Si multi-layer. For the Si_0.8Ge_0.2/Si multi-layer, the transition peaks related to the quantum well region observed in the photocurrent spectrum were preliminarily assigned to e–hh and e–lh fundamental excitonic transitions.     

(001)、(101)、(111) 双轴应变Si、应变SiGe空穴散射机制

本文基于费米黄金法则和波尔兹曼碰撞项近似理论,对Si基应变材料各空穴散射机率与应力强度、晶向的关系进行了深入的研究。结果表明：1）在应力的作用下,Si基应变材料总散射几率明显降低;2）当Ge组分为0.2时,总散射几率量化排序为应变Si/(111)Si1-xGex>应变Si/(101)Si1-xGex>应变Si1-xGex/(111)Si>应变Si1-xGex/(101)Si>应变Si/(001)Si1-xGex>应变Si1-xGex/(001)Si;3）应力作用下空穴声学声子散射几率的降低是引起Si基应变材料总散射几率降低的主要原因。本文量化结论可为Si基应变及其他应变材料的相关研究提供重要理论参考。     

DC and RF Characteristics of Si0.8Ge0.2 pMOSFETs: Enhanced Operation Speed and Low 1/f Noise

This paper reports on our investigation of DC and RF characteristics of p‐channel metal oxide semiconductor field effect transistors (pMOSFETs) with a compressively strained Si_0.8Ge_0.2 channel. Because of enhanced hole mobility in the Si_0.8Ge_0.2 buried layer, the Si_0.8Ge_0.2 pMOSFET showed improved DC and RF characteristics. We demonstrate that the 1/f noise in the Si_0.8Ge_0.2 pMOSFET was much lower than that in the all‐Si counterpart, regardless of gate‐oxide degradation by electrical stress. These results suggest that the Si_0.8Ge_0.2 pMOSFET is suitable for RF applications that require high speed and low 1/f noise.     

Fabrication of high-Ge-fraction strained Si1−xGex/Si hole resonant tunneling diode using low-temperature Si2H6 reaction for nanometer-order ultrathin Si barriers

Low-temperature Si barrier growth with atomically flat heterointerfaces was investigated in order to improve negative differential conductance (NDC) characteristics of high-Ge-fraction strained Si_1−xGe_x/Si hole resonant tunneling diode with nanometer-order thick strained Si_1−xGe_x and unstrained Si layers. Especially to suppress the roughness generation at heterointerfaces for higher Ge fraction, Si barriers were deposited using Si₂H₆ reaction at a lower temperature of 400 °C instead of SiH₄ reaction at 500 °C after the Si_0.42Ge_0.58 growth. NDC characteristics show that difference between peak and valley currents is effectively enhanced at 11-295 K by using Si₂H₆ at 400 °C, compared with that using SiH₄ at 500 °C. Non-thermal leakage current at lower temperatures below 100 K tends to increase with decrease of Si barrier thickness. Additionally, thermionic-emission dominant characteristics at higher temperatures above 100 K suggests a possibility that introduction of larger barrier height (i.e. larger band discontinuity) enhances the NDC at room temperature by suppression of thermionic-emission current.     

Strained‐SiGe Complementary MOSFETs Adopting Different Thicknesses of Silicon Cap Layers for Low Power and High Performance Applications

We introduce a strained‐SiGe technology adopting different thicknesses of Si cap layers towards low power and high performance CMOS applications. By simply adopting 3 and 7 nm thick Si‐cap layers in n‐channel and p‐channel MOSFETs, respectively, the transconductances and driving currents of both devices were enhanced by 7 to 37% and 6 to 72%. These improvements seemed responsible for the formation of a lightly doped retrograde high‐electron‐mobility Si surface channel in nMOSFETs and a compressively strained high‐hole‐mobility Si_0.8Ge_0.2 buried channel in pMOSFETs. In addition, the nMOSFET exhibited greatly reduced subthreshold swing values (that is, reduced standby power consumption), and the pMOSFET revealed greatly suppressed 1/f noise and gate‐leakage levels. Unlike the conventional strained‐Si CMOS employing a relatively thick (typically > 2 µm) Si_xGe_1‐x relaxed buffer layer, the strained‐SiGe CMOS with a very thin (20 nm) Si_0.8Ge_0.2 layer in this study showed a negligible self‐heating problem. Consequently, the proposed strained‐SiGe CMOS design structure should be a good candidate for low power and high performance digital/analog applications.     

High mobility compressive strained Si0.5Ge0.5 quantum well p-MOSFETs with higher-k/metal-gate

Strained SiGe quantum well p-MOSFETs with LaLuO₃ higher-k dielectric were fabricated and characterized. The strained Si/strained Si_0.5Ge_0.5/strained SOI heterostructure transistors showed good output and transfer characteristics with an I_on/I_off ratio of 10⁵. The extracted hole mobility shows an enhancement of about 2.5 times over Si universal hole mobility and no degradation compared to HfO₂ or even SiO₂ gate dielectric devices.     

A GeSi-buffer structure for growth of high-quality GaAs epitaxial layers on a Si substrate

A SiGe-buffer structure for growth of high-quality GaAs layers on a Si (100) substrate is proposed. For the growth of this SiGe-buffer structure, a 0.8-μm Si_0.1 Ge_0.9 layer was first grown. Because of the large mismatch between this layer and the Si substrate, many dislocations formed near the interface and in the low part of the Si_0.1Ge_0.9 layer. A 0.8-μm Si_0.05Ge_0.95 layer and a 1-μm top Ge layer were subsequently grown. The strained Si_0.05Ge_0.95/Si_0.1Ge_0.9 and Ge/Si_0.05Ge_0.95 interfaces formed can bend and terminate the upward-propagated dislocations very effectively. An in-situ annealing process is also performed for each individual layer. Finally, a 1–3-μm GaAs film was grown by metal-organic chemical vapor deposition (MOCVD) at 600°C. The experimental results show that the dislocation density in the top Ge and GaAs layers can be greatly reduced, and the surface was kept very smooth after growth, while the total thickness of the structure was only 5.1 μm (2.6-μm SiGe-buffer structure +2.5-μm GaAs layer).     

Fully strained Si0.75Ge0.25 epitaxial films with HfSiO gate dielectrics for high mobility channel metal-oxide semiconductor devices

The authors report on fully strained Si_0.75Ge_0.25 metal-oxide-semiconductor capacitors with HfSiO₂ high-k gate dielectric and TaN metal gate fabricated on Si substrates. Fully strained Si_0.75Ge_0.25 films are directly grown on Si substrates below the critical thickness. HfSiO₂ high-k gate dielectrics exhibit an equivalent oxide thickness of 13-18 Å with a permittivity of 17.7 and gate leakage current density lower than SiO₂ gate oxides by >100×. Interfacial oxide of the HfSiO₂/Si_0.75Ge_0.25 stack consists primarily of SiO₂ with a small amount of Ge and Hf. High performance SiGe field effect transistors are highly manufacturable with excellent electrical characteristics afforded by the fully strained HfSiO₂/SiGe gate stack.     

Simulation of electronic structure of Si–Si bond traps in oxide/nitride/oxide structure

Numerical simulation using MINDO/3 was performed to study the electronic structure of Si–Si bond traps in the silicon oxide/nitride/oxide structure. Results show that the neutral diamagnetic Si–Si bond in Si₃N₄ can capture both electrons and holes. Simulation results also suggest that the creation of charged diamagnetic defect pairs is unfavorable in Si₃N₄. Electron and hole trapping models are also proposed for the Si–Si bond.     

Special features of the photoluminescence of self-assembled Ge(Si)/Si(001) islands grown on a strained Si1−x Gex layer

The effect of the predeposition of strained Si_{1 ? x} Ge_x layers (x ≤ 20%) on photoluminescence (PL) of self-assembled Ge(Si)/Si(001) islands is studied. A shift of the PL peak related to dome-shaped islands (domes) to lower energies, with respect to the PL peak related to pyramidal islands is observed; this shift is related to a much larger height of the domes compared to that of pyramids. It is found that, as the Ge content in the Si_{1 ? x} Ge_x layer (x) becomes higher than 0.1, two separate peaks appear in the broad PL band related to the islands; these peaks are attributed to the zero-phonon and phonon-assisted optical transitions in the islands. The appearance of these transitions is caused by a change of the TO-phonon type involved in radiative recombination: a TO_Ge-Ge phonon is replaced by a TO_Si-Ge phonon with a shorter wavelength.     

Voltage-tunable dual-band infrared photodetectors with Si/SiGe metal-semiconductor-metal heterostructure

A simple and low-cost structure of voltage-tunable dual-band near-infrared photodetector (PD) has been proposed, in which the PDs were developed by using Si_0.8Ge_0.2/Si metal-semiconductor-metal (MSM) heterostructure. The Si_0.8Ge_0.2/Si layers were deposited by ultrahigh-vacuum chemical vapor deposition system and a transparent layer of indium-tin oxide (ITO) was used as a metal layer to enhance the entrance of photons. In this study, we found that only one band was detected with a peak wavelength located at 950 nm at zero applied bias. When bias was increased to 1 V, in contrast a dual-band was achieved, where two peak wavelengths were centered at 950- and 1150-nm. It is suggested that the two bands are the absorption of top-Si and bottom-Si_0.8Ge_0.2 layers, respectively. The spectra of Si bulk and Si_0.8Ge_0.2 layer were also measured to verify our results and relating mechanisms are explained here.     

Strain relaxation and dopant distribution in the rapid thermal annealing of Co with Si/Si1−xGex/Si heterostructure

The reaction of cobalt with the Si-sacrificial cap in the strained Si/Si_1−xGe_x/Si MBE grown heterostructure was studied. The Si-cap is added to prevent the relaxation of the SiGe and to guarantee uniform and reliable silicidation reaction. The Si_1−xGe_x epilayer, with Ge content between 18 and 28 at%, was highly B doped, while the Si-cap was undoped or B doped either during growth or by ion implantation. Cobalt evaporation was followed by rapid thermal annealing at 450–700°C for 30 sec in N₂ or Ar+10%H₂. When the silicide penetrated the Si-cap/Si_1−xGe_x interface, noticeable out-diffusion of Ge and B to the surface was observed. In spite of the presence of the Si-cap significant strain relaxation was observed in three cases: (1) in the implanted samples, although the implantation was confined to the Si-cap, (2) when the Co layer was too thick, such that the silicide penetrated the SiGe layer and (3) when the Ge content in the SiGe layer was relatively high (27.5%).     

High mobility strained Si0.5Ge0.5/SSOI short channel field effect transistors with TiN/GdScO3 gate stack

Short channel p-type metal-oxide-semiconductor field effect transistors (MOSFETs) with GdScO₃ gate dielectric were fabricated on a quantum well strained Si/strained Si_0.5Ge_0.5/strained Si heterostructure on insulator. Amorphous GdScO₃ layers with a dielectric constant of 24 show small hysteresis and low density of interface states. All devices show good performance with a threshold voltage of 0.585 V, commonly used for the present technology nodes, and high I_on/I_off current ratios. We confirm experimentally the theoretical predictions that the drive current and the transconductance of the biaxially strained (1 0 0) devices are weakly dependent on the channel orientation. The transistor’s hole mobility, extracted using split C-V method on long channel devices, indicates an enhancement of 90% (compared to SiO₂/SOI transistors) at low effective field, with a peak value of 265 cm²/V s. The enhancement is however, only 40% at high electrical fields. We demonstrate that the combination of GdScO₃ dielectric and strained SiGe layer is a promising solution for gate-first high mobility short channel p-MOSFETs.     

Si/Si1−x Gex epitaxial layers and superlattices. Growth and structural characteristics

Si, Ge, and Si_1−x Ge_x epitaxial layers and Si/Si_1−x Ge_x superlattices have been obtained on (100) and (111) silicon substrates by molecular-beam epitaxy. The growth processes and the structural characteristics and chemical composition of the structures were studied by x-ray diffraction and Auger spectroscopy. It is shown that under the experimental conditions for obtaining Si/Si_1−x Ge_x superlattices structurally perfect, strained superlattices with satellites up to ±5 orders can be obtained. Fiz. Tekh. Poluprovodn. 31, 922–925 (August 1997)     

Electronic properties of Si/Si-Ge Alloy/Si(100) heterostructures formed by ECR Ar plasma CVD without substrate heating

By using our low-energy Ar plasma enhanced chemical vapor deposition (CVD) at a substrate temperature below 100 °C during plasma exposure without substrate heating, modulation of valence band structures and infrared photoluminescence can be observed by change of strain in a Si/strained Si_0.4Ge_0.6/Si(100) heterostructure. For the strained Si_0.5Ge_0.5 film, Hall mobility at room temperature was confirmed to be as high as 660 cm² V⁻¹ s⁻¹ with a carrier concentration of 1.3×10¹⁸ cm⁻³ for n-type carrier, although the carrier origin was unclear. Moreover, good rectifying characteristics were obtained for a p⁺Si/nSi_0.5Ge_0.5 heterojunction diode. This indicates that the strained Si-Ge alloy and Si films and their heterostructures epitaxially grown by our low-energy Ar plasma enhanced CVD without substrate heating can be applicable effectively for various semiconductor devices utilizing high carrier mobility, built-in potential by doping and band engineering.     

Investigation of Coulomb scattering on sSi/Si0.5Ge0.5/sSOI quantum-well p-MOSFETs

sSi/Si_0.5Ge_0.5/sSOI quantum-well (QW) p-MOSFETs with HfO₂/TiN gate stack were fabricated and characterized. According to the low temperature experimental results, carrier mobility of the strained Si_0.5Ge_0.5 QW p-MOSFET was mainly governed by phonon scattering from 300 to 150 K and Coulomb scattering below 150 K, respectively. Coulomb scattering was intensified by the accumulated inversion charges in the Si cap layer of this Si/SiGe heterostructure, which led to a degradation of carrier mobility in the SiGe channel, especially at low temperature.     

The band structure and photoluminescence in a Ge0.8Si0.2/Ge0.1Si0.9 superlattice with vertically correlated quantum dots

The energy band diagram of the multilayered Ge_0.8Si_0.2/Ge_0.1Si_0.9 heterostructures with vertically correlated quantum dots is analyzed theoretically. With regard to fluctuations of the thickness layer in the columns of quantum dots and to the exciton-phonon coupling, it is shown that the electron states constitute a miniband. The hole wave functions remain localized in the quantum dots. The spectrum of optical transitions calculated for a 20-layered structure at room temperature is in good agreement with the experimental photoluminescence spectrum that involves an intense band at about 1.6 μm. From theoretical considerations and experimental measurements, specific evidence for the miniband in the superlattice is deduced; it is found that the overlap integrals of the wave functions of electrons and holes and the integrated intensity of the photoluminescence band of the Ge quantum dots are described by quadratic functions of the number of the structure periods.     

Role of a Si0.95Ge0.05 epilayer cap on boron diffusion in silicon under inert and dry oxidizing ambient annealing

Silicon (Si) and Si with a 60 nm Si_0.95Ge_0.05 epilayer cap (Si_0.95Ge_0.05/Si) were implanted with 60 keV, 1×10¹³ cm⁻² boron (B) followed by annealing in nitrogen (N₂) or dry oxygen (O₂) in two different anneal conditions. B⁺implantation energy and dose were set such that the B peak is placed inside Si in Si_0.95Ge_0.05/Si samples and concentration independent B diffusion is achieved upon annealing. For samples annealed above 1075 °C, Ge diffusing from the Si_0.95Ge_0.05 epilayer cap in Si_0.95Ge_0.05/Si samples reached the B layer inside Si and resulted in retarded B diffusion compared to the Si samples. For annealing done at lower temperatures, diffusion of Ge from Si_0.95Ge_0.05 epilayer cap does not reach the B layer inside Si. Thus B diffusion profiles in the Si and Si_0.95Ge_0.05/Si samples appear to be similar. B diffusion in dry oxidizing ambient annealing of Si_0.95Ge_0.05/Si samples further depends on the nature of Si_0.95Ge_0.05 oxidation which is set by the duration and the thermal budget of the oxidizing anneal.     

Solid phase reaction of Ti with Si−Ge layers prepared by Ge-implantation

Titanium germanosilicide films from thin Ti films (∼27.5 nm) are formed by solid phase reaction of Ti/Si_0.62Ge_0.38 bilayer at different annealing temperatures ranging from 600°C to 800°C. The effect of crystallographic state of Si−Ge alloy film on the reaction, phase formations, and polymorphic phase transformations, stability of germanosilicides have been investigated by x-ray diffraction, atomic force microscope, and sheet resistance measurements. Both amorphous and relaxed epitaxial Si_0.62Ge_0.38 films are prepared by Ge-multiple implantations into Si wafers with appropriate dose and energy followed by different post-implantation RTA schemes comprising alternative implantation and annealing in on case, and single final annealing in another one. XRD results indicate that the reaction sequence in both cases is found to be Ti/Si like with the formation of C49-Ti(Si−Ge)₂ as a precursor to the low resistivity C54-Ti(Si−Ge)₂. The films formed on amorphous alloy layer exhibit lower polymorphic transition temperature (∼750°C), smoother surface, lower sheet resistance and less agglomeration as compared to those on c:Si−Ge films. These characteristics are due to enhanced nucleation of C54 phase as a result of greater number of nucleation sites in the reaction with amorphous films. The formation of Ti(Si−Ge)₂ films is, however, accompanied by the decrease of Ge content in Ti(Si−Ge)₂ films formed on both amorphous and crystalline alloy films and indicates possible segregation/diffusion effects during the germanosilicidation.     

The influence of defects on device performance of MBE-grown Si homojunction and strained Si1-xGex/Si heterostructures

Different Si homojunction and strained Si_1-xGe_x/Si heterojunction diodes and bipolar transistors have been fabricated by Si-MBE. The effect of annealing on Si homojunction diodes and transistors are studied. It is found that annealing generally improves the Si device performance, such as the ideality factor and breakdown characteristics. The influence of⁶⁰Co γ irradiation on the Si_1-xGe_x/Si diode performances are investigated by studying the temperature dependence of their electrical characteristics, and the results are correlated with the quality of the MBE-films. γ irradiation causes a drop in material conductivity due to the generation of atom-displacement defects in the whole volume of the wafers and increases the defect density at hetero-interfaces. The forward I-V curves of Si_1-xGe_x/Si devices may shift towards lower or higher voltages, depending on the film quality and the irradiation dose. The increase of defect density in strained Si_1-xGe_x/Si films appears to occur easier for the films with lower quality. Electrical measurements and calculations show that the defect-associated tunneling process is important in current transport for these MBE grown Si homojunction and strained Si_1-xGe_x/Si heterojunction devices, which have initially medium film quality or have been treated by irradiation.