具有近似线性相位特性的多相波数字滤波器的设计

不考虑相位失真,而要求满足比较苛刻的振幅特性的时候,和FIR滤波器比较起来,采用 IIR 滤波器,计算量要小很多.但对某些IIR滤波器,采取适当的方法,也可以使其相位失真变得很小.本文提出一种新的设计方法,用来设计振幅响应完全满足设计要求,而相位特性用Chebyshev 近似来实现的多相波数字滤波器.这种方法的关键在于确定通带中的若干衰减零点.文中对需要的最小衰减零点数作了估计.实例表明,用这种方法设计的滤波器,时延小,相位特性非常接近线性.     

An approach to the hardware implementation of wave digital filters

An approach to implement wave digital filter is presented. The implementation method is applicable to wave digital filters containing only 3-ports adaptors, connected with reflection-free ports. All arithmetic operations are performed in a special arithmetic unit. Main features are the fact that the arithmetic units are effectively utilized, and that only a few memories of standard type are needed.     

An efficient implementation architecture for wide-band digital downconversion

The wide-band digital receiving systems require digital downconversion(DDC) with high data rate and short tuning time in order to intercept the narrow-band signals within broad tuning bandwidth. But these requirements can not be met by the commercial DDC. In this paper an efficient implementation architecture is presented. It combines the flexibility of DFT tuning with the efficiency of the polyphase filter bank decomposition. By first decimating the data prior to filtering and mixing, this architecture gives a better solution to the mismatch between the lower hardware speed and high data rate. The computer simulations show the feasibility of this processing architecture.     

基于椭圆球面波函数的数字带通滤波器设计

为设计频谱性能优良的有限冲激响应( FIR)数字带通滤波器,从窗函数的性质及选择指标出发,分析了椭圆球面波函数( PSWF)作为窗函数的优势;在此基础上根据数字滤波器设计的原理和要求,选择0阶基带椭圆球面波函数作为窗函数设计数字带通滤波器,并利用微分方程状态转移矩阵逼近的PSWF求解算法,给出了基于PSWF的FIR数字带通滤波器设计方法。理论分析和仿真结果表明：PSWF数字带通滤波器具有较低的设计复杂度,与Kaiser滤波器和Blackman滤波器相比,其旁瓣衰减有超过7 dB的优势,且具有与两种滤波器相当的通带波纹波动和过渡带宽。     

Design of linear phase FIR filters using fractional derivative constraints

In this paper, the designs of linear phase FIR filters using fractional derivative constraints are investigated. First, the definition of fractional derivative is reviewed briefly. Then, the linear phase FIR filters are designed by minimizing integral squares error under the constraint that the ideal response and actual response have several same fractional derivatives at the prescribed frequency point. Next, the fractional maximally flat FIR filters are designed by letting the number of fractional derivative constraints be equal to the number of filter coefficients. Finally, numerical examples are demonstrated to show that the proposed method has larger design flexibility than the conventional integer derivative constrained methods.     

Design of nonrecursive digital filters with linear phase

A new class of selective nonrecursive digital filters with independently prescribed equiripple passband and stopband attenuation and linear phase is obtained by numerical solution of a set of nonlinear equations. Some examples are given, and a comparison is made of the new solutions and those previously known.     

COMPUTER-AIDED ANALYSIS OF WAVE DIGITAL FILTER TRANSFER CHARACTERISTIC

An approach for finding the wave digital filter transfer characteristic is developed with ageneral computer program.The program can be used to analyse the quantification effect of differentmultiplier coefficient wordlengths for the wave digital filter transfer characteristic,thus it is possible to make areasonable choice of coefficient word-length in order to take account of economization as well as technicalspecifications when the wave digital filter is in hardware implementation.     

Lowpass digital filters with linear phase

A method of synthetising lowpass recursive digital filters is given in the letter. The method relies on the properties of orthogonal functions on the z plane and the impulse response of an ideal lowpass linear phase filter. Considerable saving in computation and storage appears to have been achieved by this method compared with the nonrecursive (with window functions) truncation method.     

多相滤波数字信道化的FPGA实现

以多相滤波为基础,结合均匀滤波器组,采用50％重叠的子信道划分,提出了一种数字信道化实现方法,解决了高速实时处理与FPGA处理速度之间的矛盾,克服了信道化接收机的接收盲区.基于FPGA,提出了短波宽带数字信道化的设计思路和实现方法.仿真结果表明,该设计有较强的实用性和通用性.     

High-performance active polyphase filter design for digital TV tuner

This paper presents the polyphase filter design for the tuner of DTV front-end system. The polyphase filter is designed with an active circuit to improve the chip performance. Most of passive capacitor and resistor components are replaced with MOS transistors. The proposed method not only can reduce the chip area but also gain the signal level. For the prototyping implementation, the current channel bands in Taiwan are referred, which the frequency range is from 530 to 602 MHz for DTV programs. In experiments, the polyphase filter can achieve 85 dB for the image rejection in the center frequency. The main signal can be gained about 2-5 dB without using extra amplifier. The chip size is about 0.09 mm², and the average power dissipation is about 15 mW, when the chip technology employed TSMC 0.35 μm CMOS process. The proposed chip outperforms with less area and higher gain.     

Design techniques for high-speed multirate multistage FIR digital filters

This paper presents architecture design techniques for implementing both single-rate and multirate high-speed finite impulse response (FIR) digital filters, with emphasis on the multirate multistage interpolated FIR (IFIR) digital filters. Well-known techniques to achieve high-speed and low-power applications for the single-rate digital FIR architecture are summarized, followed by the introduction of variable filter order selection, optimal filter decomposition, memory-saving and mirror symmetric filter pairs techniques which offer further gains in both performance and complexity reduction for the multirate multistage digital FIR architecture. A filter design example with TSMC 0.25?µm standard cell for 64-QAM baseband demodulator shows that the area is reduced by 39% for low-complexity application. Moreover, for high-speed application, the chip can operate at 714?MHz. Finally, a designed decimator which is used in the CDMA cellular shows that the area is reduced by 70% as compared with conventional approach.     

Design of recursive variable digital filters with theoretically guaranteed stability

Stability is one of the most concerned issues in designing a recursive variable digital filter (VDF). This is because the coefficients of a recursive VDF constantly vary in the tuning process, and updating the coefficients may incur instability. Thus, an appropriate measure needs to be taken for ensuring its stability. This paper presents a new coefficient transformation (CT) method for transforming the coefficients of a recursive transfer-function denominator into a set of new coefficients. From the viewpoint of conventional constant-coefficient filter (constant filter) design, the new coefficients can take arbitrary values without incurring instability. For designing a stable VDF, we apply this CT to the variable case and approximate each transformed coefficient as a distinct polynomial in the tuning parameter. Thus, we can change the filter coefficients by changing the value of the tuning parameter, and thus tune the magnitude response. Thanks to the proposed CT, updating the filter coefficients will never incur instability. This is the core part of the CT-based design approach. In this paper, we utilise a weighting function to ignore the transition-band errors and thus enhance the design accuracy of important frequency bands (passband and stopband). Moreover, the polynomials use different degrees so as to reduce the VDF complexity. Two design examples (lowpass VDF and bandpass VDF) are provided for verifying the design accuracy and checking the stability.     

SIMPLIFIED LATTICE REALIZAT ION OF FIR DIGITAL FILTERS

This paper suggests a simplified lattice structure for implementing FIR digital filters,which halvesthe hardware requirements of a conventional lattice realization.The conversion algorithms between directrealizations and the simplified lattice forms are given.Furthermore,the algorithms for linear phase FIR fil-ters are simplified.The principal results are illustrated by a practical example.     

用FPGA实现数字下变频

在接收信号的数字化、软化的实现中,数字下变频起着重要的作用。本文首先介绍了数字下变频的组成结构,然后详细分析了数字下变频的工作原理,描述了在实现数字下变频时,设计方案所采用的高效滤波器——CIC滤波器和多相抽取滤波器的结构和原理。最后,用通过Simulink对数字下变频的性能进行了仿真。在仿真的基础上使用Insigllt公司的FPGA开发系统,用测试电路实测了数字下变频的性能。     

Systolic implementation of digital filters

A systematic method for the mapping of digital filter algorithms onto systolic hardware is presented. The method is based on thez-domain characterization of the required filter. It yields filter structures that are modular, pipelined, and hierarchical, and can be used to obtain multidimensional structures. All the structures discussed have a latency of one sampling period and some have maximum concurrency. The paper also deals with the problems of line and frame wrap-around that are inherent in raster-scanned images and ways are suggested for their elimination.     

基于幅值等分的数字化正弦信号生成的设计

提出了一种基于正弦波幅值等分的数字化正弦调制信号的设计方法。该方法基于正弦调制信号的精度问题,通过采用将正弦波等分成与转换精度匹配的份数,得出数字化正弦信号。阐述了这种方法的基本原理及其FPGA模块原理图,并对其进行了误差分析。最后,给出了利用此方法产生正弦调制信号后通过DAC后波形,验证了方法的可行性。     

A new procedure for the design of high order minimum phase FIR digital or CCD filters

The approximation problem for high-order minimum phase FIR filter is solved without requiring any polynomial factorization. A modified Parks-McClellan program is used to compute the amplitude function; the minimum phase function is then derived by a method using the FFT algorithm. The procedure is illustrated by the design of various high order filters; short computation time with no numerical troubles is achieved.     

宽带数字下变频的一种高效实现结构

宽带数字接收系统要以大的调谐带宽截获窄带信号,要求数字下变频器具有高的数据率和快的调谐时间,现有的商用数字下变频器不能满足这些要求。本文提出一种高效实现结构,综合利用DFT滤波器的灵活性和多相滤波的高效性,按照先抽取数据,再低通滤波、混频的顺序,较好地解决了硬件速度和高速数据流不匹配的问题。计算机模拟结果证明了处理结构的有效性。     

Design of nonrecursive digital filters with minimum phase

A method is described of transforming nonrecursive filters with equal-ripple attenuation in the passband, stopband and linear phase into those with minimum phase and half the degree, but again with equal-ripple attenuation in the passband and stopband.     

Design of separable-denominator 2-D digital filters using the reduced-dimensional decomposition model

A separable-denominator 2-D digital filter (SD-2DDF) can be decomposed into the cascade form of a pair of 1-D digital filters (1DDFs) with different delay elements. Based on this reduced-dimensional decomposition, in this paper, we propose a new technique for designing SD-2DDFs in the spatial domain. The technique determines the coefficient matrices of 1DDFs by nonlinear optimization techniques first, and then a SD-2DDF can be easily synthesized. In addition, since the existent 1-D linear system realization techniques can be used to choose a good starting point for the optimization, extremely accurate design results can be easily achieved.