Growth of CdS Nanoneedles by Pulsed Laser Deposition

CdS nanoneedles have been grown on Ni-coated Si (100) substrates by pulsed laser deposition. Substrate temperature and Ni-catalyst layer thickness were found to have great effects on the density and morphology of the as-grown CdS nanoneedles. Crystalline CdS nanoneedles with middle diameter and length of about 40?nm to 100?nm and 400?nm to 1000?nm, respectively, could be obtained at 350°C to 450°C on Ni-coated silicon (100) substrates, and nanoneedles with good shapes were obtained at 400°C substrate temperature. From the cross-section morphologies, it was found that the CdS nanoneedles grew out of the base CdS crystallite layer with thickness of about 500?nm. Based on the experimental results, vapor?Csolid and vapor?Cliquid?Csolid growth modes describe the CdS nanoneedle growth.     

Vertically-tapered silicon nanowire arrays prepared by plasma enhanced chemical vapor deposition: Synthesis,structural characterization and photoluminescence

Vertically aligned silicon nanowires (SiNWs) have been successfully synthesized using pure silane gas as a precursor by very high frequency plasma enhanced chemical vapor deposition (VHF-PECVD) method. The effect of the growth temperature on the morphology, structure and photoluminescence properties of SiNWs has been studied. The SiNWs were needle-liked materials with the length of a few microns having the diameters of tens of nanometers near the bottom and a few nanometers at the top. Thinner nanowires have been obtained at the higher growth temperature process. High resolution transmission electron microscopy confirms that the nanowires are composed of a crystalline silicon core with an oxide shell. The PL spectrum of the Si nanoneedles have shown two emission bands around 450 nm and ~750, which originate from the defects related to oxygen fault in the oxide shell and interfaces between the crystalline Si core and the oxide shell, respectively.     

Optical and photocatalytic properties of indium phosphide nanoneedles and nanotubes

Large scale indium phosphide (InP) nanoneedles and nanotubes were synthesized through a facile solvothermal reaction. The morphology and microstructure of the samples were analyzed by employing scanning electron microscopy (SEM), transmission electron microscopy (TEM), Raman spectroscopy, and Ultraviolet-visible (UV–vis) spectroscopy. The room temperature photoluminescence (PL) measurements showed that the InP nanoneedles and nanotubes possessed a pronounced blue shift in contrast to the bulk counterpart, which was ascribed to the crystalline defects effect. Moreover, the InP nanotubes exhibited an enhanced photocatalytic performance as compared to the InP nanoneedles and nanoparticles.     

Beta-si3n4 nanoneedles in polyhydridomethylsilazane-derived ceramic products by polymeric precursor pyrolysis

A polymeric precursor, polyhydridomethylsilazane, was pyrolysed in an active ammonia atmosphere at 873 K with subsequent pyrolysis in an inert nitrogen atmosphere at 1873 K, and the polymer-derived ceramic products were studied using a field emission scanning electron microscope, X-ray diffractometer and high-resolution transmission electron microscope. No nanoneedles were observed in the 873 K pyrolysed products, while beta-Si₃N₄ nanoneedles were obtained after pyrolysis at 1873 K. The as-received nanoneedles were about 100-200 nm in diameter, and the maximum length reached about 10 m. There were no bulbs or droplets on the tips of the nanoneedles, and no catalysts were used during the pyrolysis of the polymeric precursor.     

Formation,crystal structure,and properties of silicon with buried iron disilicide nanocrystallites on Si (100) substrates

Methods of low-energy electron diffraction, measurements of the Hall effect in situ, atomic-force microscopy, and high-resolution transmission electron microscopy were used to study the formation of iron silicide islands on the Si(100)–(2×1) surface and overgrowth of these islands with silicon; the electrical properties and structure of silicon with buried iron silicide nanocrystallites were studied. The best crystal quality of the continuous single-crystal silicon layer and the minimum roughness of its surface were observed at the silicon growth temperature of 700°C and the layer thickness of 100 nm. A model of growth of silicon over the ironsilicide nanocrystals is suggested. Two types of formed nanocrysrallites were found: small nanocrystallites (5–6 nm) of β-FeSi₂ and large nanocrystallites (30–50 nm) of γ-FeSi₂. The good agreement between the electrical parameters of silicon with buried iron disilicide nanocrystallites and those of atomic-clean silicon confirmed that there is minimum scattering of charge carriers at nanocrystallites in the temperature range of 300–540 K.     

A comparison of the critical thickness for MBE grown Lt-GaAs determined by In-Situ ellipsometry and transmission electron microscopy

The growth of low temperature (LT) GaAs by molecular beam epitaxy has been studied using ellipsometry. Different regimes of growth were observed in the data, depending on film thickness. Epitaxial growth of pseudomorphic LT-GaAs occurred immediately above the substrate, followed by a layer with changing dielectric properties. This upper layer can be modeled as a two-phase region consisting of epitaxial LT-GaAs and small grained, polycrystalline GaAs, which increases in volume fraction with increasing layer thickness. For sufficiently thick LT layers, cross-sectional transmission electron microscopy analysis showed pyramidal defects that were composed primarily of highly twinned regions. The ellipsometry data showed a deviation from the homogeneous growth model at a thickness less than the thickness at which the pyramidal defects nucleated in all samples.     

Excellent Field‐Emission Performances of Neodymium Hexaboride (NdB6) Nanoneedles with Ultra‐Low Work Functions

High‐quality NdB₆ nanostructures with a low work function are successfully synthesized via an one‐step catalyst‐free chemical vapor deposition process. Field emission properties of these nanostructures (curve nanowires, short‐straight nanorods, long‐straight nanowires, and nanoneedles) are systematically investigated and found to be strongly affected by the tip morphologies and temperatures. The nanoneedles with sharp tips demonstrate the lowest turn‐on (2.71 V/μm) and threshold (3.60 V/μm) electric fields, as well as a high current density (5.37 mA/cm²) at a field of 4.32 V/μm in comparision with other nanostructures. Furthermore, with an increase in temperature from room temperature to 623 K, the turn‐on field of the nanoneedles decreases from 2.71 to 1.76 V/μm, and the threshold field decreases from 3.60 to 2.57 V/μm. Such excellent performances make NdB₆ nanomaterials promising candidates for application in flat panel displays and nanoelectronics building blocks.     

Characterisation of TiN films prepared by electron shower,arc ion-plating and sputtering methods

It has been found that TiN films with high wear resistance and high adhesion can be prepared by electron shower deposition and arc ion plating on glass and austenitic stainless steel (SUS 316) substrates. The high wear resistance is principally explained by the grain size and surface morphology. Fine {100}-faceted crystals (10–150 nm) grew on the surface. The typical morphology of the crystals was triangular pyramidal. The crystallite size was changed by the bias voltage. Faceted crystals produced by arc ion plating were rounded and smoothed by a change in bias, but were unaltered in samples prepared by the electron shower process. The fine faceted surfaces had higher wear resistance than the granularly rounded ones. When TiO₂ was formed at the interface of the glass substrate, the adhesion was lowered. The high-adhesion film prepared by electron shower deposition contained a small amount of TiO₂ at the interface.     

ZnO-Ni壳核丝状阴极场发射特性研究

采用水热法在Ni丝上制备锥状ZnO,形成ZnO-Ni壳核丝状阴极。采用X射线衍射分析仪进行物相分析,表明该ZnO具有沿002面生长的取向。用扫描电子显微镜(SEM)观察其表面形貌,表明Ni的表面生长有一层分布均匀的锥状ZnO。通过场发射性能测试,结果表明ZnO-Ni壳核丝状阴极具有比平面结构中的ZnO纳米锥阴极更优良的场发射性能,并对该结果进行讨论。     

Neutron irradiation of insulated gate field effect transistors

Insulated gate field effect transistors and polysilicon-gated capacitors were irradiated with fast (10 keV <E < 2 MeV) neutrons. As expected, damage to the bulk silicon was detected as a degradation in the minority carrier lifetime. Optically assisted electron injection was employed for the first time to examine neutral electron trap and fixed positive charge generation in the gate insulator of the devices. While fixed positive charge densities of ≤6 x 10¹⁰ cm⁻² were detected, little or no neutral electron trap generation was observed. The small density of coulombic defects observed in the insulator could be accounted for fully by the known flux of gamma rays associated with the neutron irradiation process. This indicates that fast neutrons passing through a thin gate oxide do not produce significant amounts of damage in the oxide. Somewhat surprisingly, it was found that 1.5 keV X-rays created similar lifetime degradation effects in the bulk silicon, as did fast neutrons, even though this photon energy is not believed to be capable of producing bulk damage in the form of atom displacement in either the semiconductor or the insulator. The minority carrier lifetime of the silicon could be restored to initial values following either neutron or x-ray exposure by annealing in H₂ for 30 min at 400° C.     

Plasmonic Nanoneedle Arrays with Enhanced Hot Electron Photodetection for Near-IR Imaging

Hot electron photodetection based on metallic nanostructures is attracting significant attention due to its potential to overcome the limitation of the traditional semiconductor bandgap. To enable efficient hot electron photodetection for practical applications, it is necessary to achieve broadband and perfect light absorption within extremely thin plasmonic nanostructures using cost-effective fabrication techniques. In this study, an ultrahigh optical absorption (up to 97.3% in average across the spectral range of 1200−2400 nm) is demonstrated in the ultrathin plasmonic nanoneedle arrays (NNs) with thickness of 10 nm, based on an all-wet metal-assisted chemical etching process. The efficient hot electron generation, transport, and injection at the nanoscale apex of the nanoneedles facilitate the photodetector to achieve a record low noise equivalent power (NEP) of 4.4 × 10⁻¹² W Hz^−0.5 at the wavelength of 1300 nm. The hot-electron generation and injection process are elucidated through a transport model based on a Monte Carlo approach, which quantitatively matches the experimental data. The photodetector is further integrated into a light imaging system, as a demonstration of the exceptional imaging capabilities at the near-IR regime. The study presents a lithography-free, scalable, and cost-effective approach to enhance hot electron photodetection, with promising prospects for future imaging systems.     

Ultrathin IrO2 Nanoneedles for Electrochemical Water Oxidation

Electrochemical water splitting is promising for utilizing intermittent renewable energy. The sluggish kinetics of the oxygen evolution reaction (OER), however, is a bottleneck in obtaining high efficiency. Only a few OER electrocatalysts have been developed for the use in acidic media despite the importance of a proton exchange membrane (PEM) water electrolyzer. IrO₂ is the only material that is both active and stable for the OER in highly corrosive acidic conditions. Herein, a facile and scalable synthesis of ultrathin IrO₂ nanoneedles is reported with a diameter of 2 nm using a modified molten salt method. The activity and durability for the OER are significantly enhanced on the ultrathin IrO₂ nanoneedles, compared to conventional nanoparticles. The ultrathin nanoneedles are successfully introduced to a PEM electrolyzer single cell with the enhanced cell performance.     

New positive charge trapping dynamics in SiO2 gate oxide, based on bulk impact ionization processes under Fowler–Nordheim stress

A new charge trapping dynamics is proposed to analyze theoretically the gate oxide degradation in metal oxide silicon structures under Fowler–Nordheim (F–N) stress (6–10 MV/cm) at a low injected electron fluence. Devices studied were MOS capacitors with 22-, 27-, and 33-nm-thick, thermally grown silicon dioxide (SiO₂) on (100) n-Si. Our model includes tunneling electron initiated band-to-band impact ionization and trap-to-band ionization, as the possible mechanisms for the generation of hole and positive charge in the bulk of the oxide, respectively. The results from our model are in good agreement with the experimental results of gate voltage shift with injected electron fluence under constant current stress. Based on the developed coupled dynamics, we have compared the degradation under F–N stress at a constant current and gate voltage.     

Germanium islands embedded in strained silicon quantum wells grown on patterned substrates

Germanium islands were embedded in strained silicon quantum wells in order to provide an improved electron confinement in vicinity of the islands. Growth was performed on relaxed SiGe layers. Patterned substrates were used, favouring lattice relaxation as well permitting the fabrication of small Ge islands at deposition temperatures above 500 °C. Photoluminescence analysis reveals a strongly reduced dislocation related signal. The low temperature spectra are dominated by intense signals from the germanium islands. The origin of these signals were investigated by removing the islands by etching, analysing reference samples without a silicon quantum well, varying the germanium deposition and the growth temperature.     

背面多孔硅对SIMOX中铜杂质的吸除作用

在SIMOX材料的背面成功地制备了多孔硅层,再在正面故意注入1×1015cm-2剂量的铜杂质。经900℃退火,二次离子质谱（SIMS）测试表明钢杂质能穿过理层SiO2并在背面多孔硅处富集。用剖面投射电子显微镜（XTEM）分析了埋层SiO2和背面多孔硅层的微观结构,背面多孔硅层及其多孔硅层同硅衬底之间“树技状”的过渡区被认为是铜杂质有效的吸除中心。     

Utilization of geometric light trapping in thin film silicon solar cells: simulations and experiments

In this study, we present a new light absorption enhancement method for p‐i‐n thin film silicon solar cells using pyramidal surface structures, larger than the wavelength of visible light. Calculations show a maximum possible current enhancement of 45% compared with cells on a flat substrate. We deposited amorphous silicon (a‐Si) thin film solar cells directly onto periodically pyramidal‐structured polycarbonate (PC) substrates, which show a significant increase (30%) in short‐circuit current over reference cells deposited on flat glass substrates. The current of the cells on our pyramidal structures on PC is only slightly lower than that of cells on Asahi U‐type TCO glass (Asahi Glass Co., Tokyo, Japan), but suffer from a somewhat lower open circuit voltage and fill factor. Because the used substrates have a locally flat surface area due to the fabrication process, we believe that the current enhancement in the cells on structured PC can be increased using larger or more closely spaced pyramids, which can have a smaller flat surface area. Copyright © 2012 John Wiley & Sons, Ltd.     

光伏法研究高能电子辐照单晶硅的性能

采用光伏方法测量了１ＭｅＶ高能电子辐照（辐照剂量为１０＾１３～１０＾１６ｃｍ＾－２）前后硅单晶少子扩散长度的变化；结合红外光吸收谱的测量结果，分析了高能电子辐照对硅单晶性能的影响。实验结果表明：高阻硅比低阻硅具有更强的抗辐射能力，大剂量的电子辐照可以改变ｎ型硅的导电类型。文中还计算了电子辐照在硅中所产生的陷浓度等一些重要参数。     

Characteristics of Self-Aligned Gate-First Ge p- and n-Channel MOSFETs Using CVD HfO2 Gate Dielectric and Si Surface Passivation

The electrical properties of p- and n-MOS devices fabricated on germanium with metal-organic chemical-vapor-deposition HfO₂ as gate dielectric and silicon passivation (SP) as surface treatment are extensively investigated. Surface treatment prior to high-K deposition is critical to achieve small gate leakage currents as well as small equivalent oxide thicknesses. The SP provides improved interface quality compared to the treatment of surface nitridation, particularly for the gate stacks on p-type substrate. Both Ge p- and n-MOSFETs with HfO₂ gate dielectrics are demonstrated with SP. The measured hole mobility is 82% higher than that of the universal SiO₂/Si system at high electric field (~0.6 MV/cm), and about 61% improvement in peak electron mobility of Ge n-channel MOSFET over the CVD HfO₂ /Si system was achieved. Finally, bias temperature-instability (BTI) degradation of Ge MOSFETs is characterized in comparison with the silicon control devices. Less negative BTI degradation is observed in the Ge SP p-MOSFET than the silicon control devices due to the larger valence-band offset, while larger positive BTI degradation in the Ge SP n-MOSFET than the silicon control is characterized probably due to the low-processing temperature during the device fabrication     

Comparison of electronic structure of as grown and solar grade silicon samples

A comparison of the electronic structure of two different types of silicon materials viz., (i) as grown silicon and (ii) solar silicon has been carried out utilizing maximum entropy method and pair distribution function using powder X-ray data sets. The precise electron density maps have been elucidated for the two samples. The covalent nature of the bonding between atoms in both the samples is found to be well pronounced and clearly seen from the electron density maps. The electron densities at the middle of the Si-Si bond are found to be 0.47 and 0.45 e/ų for as grown silicon and solar silicon respectively. In this work, the local structural information has also been obtained by analyzing the atomic pair distribution functions of these two samples.     

Comparison of GaAs grown on standard Si (511) and compliant SOI (511)

Gallium arsenide (GaAs) films were grown by molecular beam epitaxy (MBE) on a (511) silicon substrate and a compliant (511) silicon-on-insulator (SOI) substrate. The top silicon layer of the compliant (511) SOI was thinned to ～1000 Å. The five inch diameter SOI wafer was created by wafer bonding. The GaAs (004) x-ray diffraction (XRD) reflection showed a 25% reduction in the full width half maximum (FWHM) for GaAs on a compliant (511) SOI as compared to GaAs on a silicon substrate. Cross section transmission electron microscopy (XTEM) clearly indicates a different dislocation structure for the two substrates. The threading dislocation density is reduced by at least an order of magnitude in the compliant (511) SOI as compared to the (511) silicon. XTEM found dislocations and damage was generated in the top silicon layer of the compliant SOI substrate after GaAs growth.