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1.
Parameter extraction for bipolar transistors   总被引:1,自引:0,他引:1  
Different methods of extracting the DC Gummel-Poon bipolar transistor model parameters are reviewed. First the shortcomings of the classical extraction schemes for the intrinsic model are presented together with some improved procedures. Finally the extraction of the series resistances is addressed.  相似文献   

2.
Each of the optimization algorithms already applied to MOSFET parameter extraction suffers from its specific drawback, either slightly lacking in efficiency or not being stable enough. This paper presents a method combining the modified Gauss method and simplex methods. The optimizer is implemented on VAX-11/ 780. Robustness and efficiency of the optimizer have been verified.  相似文献   

3.
A shift-and-ratio method for extracting MOSFET channel length is presented. In this method, channel mobility can be any function of gate voltage, and high source-drain resistance does not affect extraction results. It is shown to yield more accurate and consistent channel lengths for deep-submicrometer CMOS devices at room and low temperatures. It is also found that, for both nFET and pFET, the source-drain resistance is essentially independent of temperature from 300 to 77 K  相似文献   

4.
Dynamic NBTI of p-MOS transistors and its impact on MOSFET scaling   总被引:1,自引:0,他引:1  
For the first time, a dynamic negative bias temperature instability (DNBTI) effect in p-MOSFETs with ultrathin gate oxide (1.3 nm) has been studied. The interface traps generated under NBTI stressing corresponding to p-MOSFET operating condition of the "high" output state in a CMOS inverter, are subsequently passivated when the gate to drain voltage switches to positive corresponding to the p-MOSFET operating condition of the "low" output state in the CMOS inverter. Consequently, this DNBTI effect significantly prolongs the lifetime of p-MOSFETs operating in a digital circuit, and the conventional static NBTI (SNBTI) measurement underestimates the p-MOSFET lifetime. A physical model is presented to explain the DNBTI. This finding has significant impact on future scaling of CMOS devices.  相似文献   

5.
基于混合遗传算法的SOI MOSFET模型参数提取   总被引:2,自引:0,他引:2  
通过将遗传算法和模拟退火算法相结合得到了改进的遗传算法,这种改进的遗传算法可用于提取SOI MOSFET模型参数.用这种方法提取了基于中国科学院微电子研究所开发的标准的1.2μm CMOS/SOI工艺的SOI MOSFET模型参数,用此模型模拟的数据与测试数据吻合很好,与商业软件相比精度得到了明显的提高.这种方法与商业软件使用的传统的方法相比,不需要对SOI MOSFET模型有非常深入的了解,也不需要复杂的计算.更深入的验证表明,该模型适用的器件尺寸范围很广.  相似文献   

6.
通过将遗传算法和模拟退火算法相结合得到了改进的遗传算法,这种改进的遗传算法可用于提取SOI MOSFET模型参数.用这种方法提取了基于中国科学院微电子研究所开发的标准的1.2μm CMOS/SOI工艺的SOI MOSFET模型参数,用此模型模拟的数据与测试数据吻合很好,与商业软件相比精度得到了明显的提高.这种方法与商业软件使用的传统的方法相比,不需要对SOI MOSFET模型有非常深入的了解,也不需要复杂的计算.更深入的验证表明,该模型适用的器件尺寸范围很广.  相似文献   

7.
This letter presents a novel test structure to accurately extract the substrate network parameters for RF MOSFET modeling from two-port measurements. The test structure used in the common-gate configuration isolates the gate network to make the substrate network distinctly accessible to measurements. A methodology is developed to directly extract the substrate network from the measured data. The method is further verified and validated by the excellent match obtained between measured and simulated two-port parameters.  相似文献   

8.
In this paper, an accurate and simple small signal model of RF MOSFETs accounting for the distributed gate effect, the substrate parasitics and charge conservation is proposed. Meanwhile, a direct and accurate extraction method using linear regression approach for the components of the equivalent circuit of the MOSFET with S-parameters analysis is also proposed. The proposed model and extraction method are verified with the experimental data and an excellent agreement is obtained up to 10 GHz. The extraction results from the measured data for various bias conditions are presented. Also, the extracted parameters, such as transconductance gm, match well with those obtained from DC measurements. Besides, it is shown that a significant error in circuit performances would be found if the charge conservation is not properly considered.  相似文献   

9.
For pt. see ibid., vol. 50, no. 10, p. 2135 (2003). Based on the physical double-gate MOSFET model described in Part I, we present a systematic parameter extraction methodology that avoids parameter interdependence between different physical effects whenever possible. Several extraction schemes are compared for precise modeling of small-signal and large-signal characteristics. The physical model and the extraction methodology are verified through the reproduction of the simulated drain current, incremental drain resistance, and transconductance per unit current, which are parameters of particular interest to mixed-signal circuit designs.  相似文献   

10.
A buried-channel depletion MOS transistor has an implanted neutral conducting channel between the source and drain due to which the device works in a variety of modes such as accumulation, accumulation-depletion, depletion, inversion-depletion, inversion, etc., and presents a more complex structure than an enhancement-mode device. For precise circuit simulation, accurate and on-line extraction of model parameters has assumed significant importance. It is found that representing the implanted buried channel by an equivalent box with average doping and junction depth gives a convenient trade-off between simplicity in modeling and accuracy in device characterization. The present work proposes a method of deriving the necessary model parameters through the measurement of a single device parameter, namely drain conductance under different operating conditions. The on-line measurements carried on a boron-implanted relatively long buried-channel MOSFET have been used to predict the best box for the profile and give other model parameters necessary for circuit simulation. It is shown that the method is most insensitive to measurement conditions compared to other techniques.  相似文献   

11.
Using the Shockley-Read-Hall (SRH) theory, a simple analytic charge pumping current model has been developed and its accuracy verified by exact numerical analysis. It is shown that the derived analytic charge pumping current model with constant capture cross sections for electrons and holes does not correctly simulate the rising (falling) edges of the experimental charge pumping current. According to the slopes of the logarithmic charge pumping current, effective capture-cross-section models for elections and holes are proposed and are incorporated into the developed analytic charge pumping current model. It is shown that the experimental charge pumping current can be simulated very well by using the modified analytic model  相似文献   

12.
We propose a new parameter extraction method for advanced polysilicon emitter bipolar transistors. This method is based on the predetermination of equivalent circuit parameters using the analytical expressions of de-embedded Z-parameters of these devices. These parameter values are used as initial values for the parameter extraction process using optimization. The entire device equivalent circuit, containing RF probe pad and interconnection circuit parameters extracted by test structures, is optimized to fit measured S-parameters for eliminating de-embedding errors due to the imperfection of pad and interconnection test structures. The equivalent circuit determined by this method shows excellent agreement with the measured S-parameters from 0.1 to 26.5 GHz  相似文献   

13.
提出了将全局并行遗传算法应用于模型参数提取,并应用于标准的1.2μm CMOS/SOI工艺的SOI MOSFET器件,一次性提取BSIMSOI3模型主要的42个直流参数.实验结果表明,该方法不依赖参数初始值、精度高、效率高,降低了SOI模型参数提取工作的难度,具有很强的通用性,易于移植优化及数据拟合.  相似文献   

14.
A new test structure has been designed to evaluate fluctuations of transistor properties, both within a chip and across a 300-mm wafer. The evaluation system was established with a conventional parametric tester and dc power supplies suitable for application on production lines. It was observed that threshold voltage (V/sub th/) variations increased with the reduction of the channel area. A difference was also observed in the standard deviation (/spl sigma//sub vt/) between NMOS and PMOS. From statistical evaluations, controlling CDs and improving rolloff characteristics were found to be important to reduce V/sub th/ variations.  相似文献   

15.
16.
An ultralow specific on-resistance, vertical channel, power MOSFET structure, based on current conduction via an accumulation layer formed on the surface of a trench (UMOS) gate structure, is described. Two-dimensional numerical simulations and experimental results have been obtained, demonstrating that a specific on-resistance approaching 100 μΩ-cm2 can be obtained for a silicon device capable of blocking 25 V  相似文献   

17.
A method is presented for directly obtaining the temperature rise in MOSFETs due to channel current self-heating. The technique is based on small signal measurements, and also provides thermal time-constant data. No special layout structures are needed, making it suitable for bulk and SOI technologies. Experimental results are compared with data obtained using thermal noise measurements with a special SOI MOSFET, and the two figures show good agreement.<>  相似文献   

18.
邓旭光 《激光与红外》2013,43(9):1051-1054
器件模型作为工艺与设计之间的接口,对保证集成电路设计成功具有决定意义.本文介绍了BSIM3模型的原理,并完成了低温下(77K) BSIM3模型的参数提取.同时探讨了使用参数提取软件的具体工作步骤.  相似文献   

19.
The ability of recurrent neural networks (RNN) to handle time-varying input/output through its own temporal operation is discussed. A new class of continuous-time (CT) RNN is proposed and it is proved that any finite time trajectory of a given n-dimensional dynamical CT system with input can be approximated by the internal state of the output units of an RNN. The proposed RNNs are extended for temporal processing.  相似文献   

20.
一种利用曲线拟合设计内插滤波器的新方法   总被引:7,自引:0,他引:7  
与传统的从频域来设计内插滤波器的方法不同,本文从滤波器脉冲响应的方向入手,提出了一种利用曲线拟合设计性能较高的内插滤波器的新方法,从而克服了传统方法利用穷搜索寻找最佳系数花费时间过长的缺点。这种方法尤其适用于内插滤波器系数较多或者需要的精度较高的情况。  相似文献   

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