Aluminum nitride for heatspreading in RF IC’s

To reduce the electrothermal instabilities in silicon-on-glass high-frequency bipolar devices, the integration of thin-film aluminum nitride as a heatspreader is studied. The AlN is deposited by reactive sputtering and this material is shown to fulfill all the requirements for actively draining heat from RF IC’s, i.e., it has good process compatibility, sufficiently high thermal conductivity and good electrical isolation also at high frequencies. The residual stress and the piezoelectric character of the material, both of which can be detrimental for the present application, are minimized by a suitable choice of deposition conditions including variable biasing of the substrate in a multistep deposition cycle. Films of AlN as thick as 4 μm are successfully integrated in RF silicon-on-glass bipolar junction transistors that display a reduction of more than 70% in the value of the thermal resistance.     

Silicon Labs CMOS产品抢占RF IC市场

Silicon Laboratories是目前业界唯一用CMOS工艺量产RFIC的厂商,GSM/GPRS手机IC的市场份额两年内增长了20%。公司最近发布了业界第一颗利用标准数字CMOS工艺生产的GSM功率放大器。与多芯片和分立器件组成的典型功率放大器模块相比,Si4300为单芯片PA,前者至少需要1个HV-CMOS内核、2个GaAsHBT内核,以及5个分立器件,基底面积约为70mm2, 后者为单一的标准CMOS芯核,不需要分立器件,基底面积为25mm2。Si4300集成了收发器到天线开关模块间的所有功能,包括完整的功率控制电路、过热和负载不匹配保护功能、谐波滤除以及输入和输出…     

基于CMOS的RF IC的发展现状

目前，射频电路存在广阔的市场，成为无线通信领域内研究的热点之一。文章主要介绍了基于CMOS工艺的射频电路的研完现状。     

A CMOS VCO Architecture Suitable for Sub-1 Volt High-Frequency (8.7–10 GHz) RF Applications

This paper proposes an LC-based oscillator structure which enables operation from a supply voltage as low as 0.85 V, while being suitable for high-frequency RF applications. Two VCO prototypes were fabricated in a standard 0.18 m CMOS process. The 8.7 GHz VCO operates from a supply voltage of 0.85 V, consumes 6 mW, and exhibits –100 dBc/Hz phase noise at 600 kHz offset. The 10 GHz prototype operates from a supply voltage of 1 V, consumes 9 mW, and has –98 dBc/Hz phase noise at 600 kHz offset. A tuning range of 400–450 MHz is achieved without using varactors.     

STMs’ new RF switch integrates with CMOS

STMicroelectronics has released details of a technology that uses MEMS techniques to integrate high performance RF switches into circuits, fabricated using standard CMOS technology.This is a short news story only. Visit www.three-fives.com for the latest advanced semiconductor industry news.     

Noise considerations for mixed‐signal RF IC transceivers

This paper discusses design tradeoffs for mixedsignal radio frequency integrated circuit (RF IC) transceivers for wireless applications in terms of noise, signal power, receiver linearity, and gain. During air wave transmission, the signal is corrupted by channel noise, adjacent interfering users, image signals, and multipath fading. Furthermore, the receiver corrupts the incoming signal due to RF circuit nonlinearity (intermodulation), electronic device noise, and digital switching noise. This tutorial paper gives an overview of the design tradeoffs needed to minimize RF noise in an integrated wireless transceiver. Fundamental device noise and the coupling of switching noise from digital circuits to sensitive analog sections and their impact on RF circuits such as frequency synthesizers are examined. Methods to minimize mixedsignal noise coupling and to model substrate noise effects are presented.     

Design of multilevel pyramidically wound symmetric inductor for CMOS RFIC’s

This paper presents the design of a multilevel pyramidically wound symmetric (MPS) inductor structure. Being multilevel, the MPS inductor achieves high inductance to area ratio and hence occupies smaller silicon area. The symmetric inductor is realized by winding the metal trace of the spiral coil down and up in a pyramidal manner exploiting the multilevel VLSI interconnects technology. Closed form expressions are also developed to estimate the self resonating frequency (f _res ) of the MPS inductor and results are compared to two layer conventional symmetric and asymmetric stack. The estimation is also validated with full wave electromagnetic simulation. The performance of various MPS inductors of different metal width, metal offsets and outer diameter is demonstrated. For an inductance of 8 nH, the MPS inductor reduces the area by 65–95% over conventional planar symmetric inductors and 71–94% over its equivalent pair of asymmetric planar inductors. The performance is also compared to other symmetric inductors reported in literature. With MPS inductor, the cost and size of RF IC’s will be reduced significantly.     

设计RF CMOS蓝牙收发器

使用CMOS RFIC设计2.4GHz蓝牙收发器需要在设计过程中的所有阶段对关键性能进行仔细的验证。这可以通过EDA软件的几个功能来实现,如提供晶片厂模型库,带有蓝牙测试信号的系统兼容性测试模板,还可以和测试仪器的链接,验证仿真数据和实际测量结果是否一致。     

RF—CMOS电路简介

1.引言 近年来,无线通信技术的飞速发展使得不受地域限制的个人通信成为现实。然而,由于这种通信除了声音之外还希望提供数据及动画等各种多媒体信息服务,因此,实现高频、低功耗、低噪声、低失真、小型化及低价格的收发信/调制解调器所必需的微波/模拟电路技术变得日益重要起来。目前还没有满足所有这些条件单一结构的半导体器件,不过,随着元件微细化及制造工艺技术的不断进步,各类器件的电气特性得到了大幅度的改善。其中,从实现采用廉价硅基板的数字LSI的主导器     

RF IC收发器的建模

便携通信产品(如寻呼机、双向无线收发机、无绳电话、蜂窝电话、个人全球定位系统(GPS)接收机,无线Internet浏览器和便携可视电话等)的全球市场正在日益增长.这些小型无线手机可传送语音、数据、图像和视频,这将导致人们通信和存取信息方法的革命.这些高性能通信系统的制造商必须在产品的功耗、成本、尺寸、重量和性能诸方面进行激烈的竞争.RF收发器是关键的硬件,它决定一种便携手持通信产品的性能、成本、大小及电池寿命.然而,没有适当的工具实现RF收发器的设计和验证是困难的或者是不可能的.     

RF CMOS蓝牙收发器的设计

使用CMOS RFIC设计2.4GHz蓝牙收发器需要在设计过程中的所有阶段对关键性能进行仔细的验证。这可以通过EDA软件的几个功能来实现,如提供晶片厂模型库、带有蓝牙测试信号的系统兼容性测     

三维互连集成CMOS IC

硅焊接技术有望实现更高密度、功耗效率和性能同Raytheon Vision Systems公司合作,硅焊接工艺开发者Ziptronix公司证明了其直接焊接互连(Direct Bond Interconnect,DBI)技术可以和多层CMOS IC工艺相兼容,该技术可     

RF IC芯片的测试挑战

目前专注在RF的厂商不在少数,但特别专注在RFTesting技术上的却不多,LTX即是其中之一。     

2.5 Gb／s 16：1 MUX IC Design with CMOS

A low--power and high--speed 16.-1 MUX IC designed for optical fiber communication based on TSMC 0.25μm CMOS technology is presented. A tree—type architecture was utilized. The output data bit rate is 2.5 Gb/s at input clock rate of 1.25 GHz. The simulation results show that the output signal has peak—to—peak amplitude of 400 mV, the power dissipation is less than 200 mW and the power dissipation of core circuit is less than 20 mW at the 2.5 Gb/s standard bit rate and supply voltage of 2.5 V. The chip area is 1.8mm^2.     

2.5 Gb/s 16∶1 MUX IC Design with CMOS

A low-power and high-speed 16:1 MUX IC designed for Optical fiber communication based on TSMC 0.25 μm CMOS technology is represented. A tree-type architecture was utilized. The output data bit rate is 2.5 Gb/s at input clock rate of 1.25 GHz. The simulation results show that the output signal has peak-to-peak amplitude of 400 mV, the power dissipation is less than 200 mW and the power dissipation of core circuit is less than 20 mW at the 2.5 Gb/s standard bit rate and supply voltage of 2.5 V. The chip area is (1.8) mm~(2).     

A 5 GHZ CMOS Power VCO with Novel Frequency-Modulation for RF Transmitter

A 5 GHz transformer-feedback power oscillator with novel frequency modulation (FM) up to 10 MHz is presented in this paper. The novel FM is achieved by a CMOS transistor between transformer and ground, which is designed for varying the equivalent inductance and mutual inductance of the transformer and shows no DC connection with the oscillation circuit. The major frequency tuning is realized by the variable capacitor which is controlled by a phase lock loop. The RF VCO with 210 MHz tuning range operates in class-E mode to achieve a cost-effective transmitter, which demonstrates a high DC-to-RF conversion efficiency of 39 %. A RF power of 15.1 dBm and phase noise better than \(-\) 109 dBc/Hz @ 100 kHz from the central frequency of 5.5 GHz is obtained with the biasing conditions V \(_\mathrm{ds}\) = 1.8 V and V \(_\mathrm{gs}\) = 0.65 V. The VCO also demonstrates an ultra-low voltage operation capability: with V \(_\mathrm{ds}\) = V \(_\mathrm{gs}\) = 0.6 V and DC power consumption of 9 mW, the output power is 4.5 dBm and the phase noise better than \(-\) 93 dBc/Hz @ 100 kHz. The die size of the transformer-feedback power oscillator is only \(0.4\times 0.6\) mm \(^{2}\) .     

Parameter Extraction for 2-π Equivalent Circuit Modelof RF CMOS Spiral Inductors

从有理分式拟合方法出发，提出了用于射频CMOS平面螺旋电感2-π等效电路模型参数提取的新方法. 通过比较提参后等效电路给出的S参数和实验测量的S参数，证明该方法的精度很高. 此外，提参的策略非常直接，因此容易在CAD里面编程实现. 提参得到的等效电路模型对于射频电路设计者来说也是非常有用的.     

基于CMOS工艺的RF接收机架构设计

分析了RF接收机的直流抑制、闪烁噪声及镜像抑制问题。给出了采用低中频接收机结构来抑制直流闪烁噪声，同时配合数字中频处理技术来控制镜像抑制的设计方法。