High-efficiency W-band GaAs monolithic frequency multipliers

High efficiency monolithic frequency multipliers have been designed, fabricated, and tested in the W-band. In microwave monolithic integrated circuits (MMICs), transmission lines with various impedances are used not only to transfer the input and output signals, but also to match the impedances of active devices to those of the input and output ports, with open and/or short stubs. Thus, loss in the transmission lines is one of the major limiting factors on circuit efficiencies. This paper presents high-efficiency MMIC frequency doublers with a balanced pair of GaAs Schottky barrier planar diodes operating in the W-band. The geometries of transmission lines were optimized to reduce the loss and thus to improve the efficiency. The demonstrated efficiency of 36.1% is the highest efficiency reported for a diode-based MMIC frequency multiplier in the W-band.     

High-efficiency Schottky-varactor frequency multipliers for 100 to 1000 GHz

There is a strong need of all-solid-state local oscillators in the frequency range of 100 to 1000 GHz, especially for space-borne radio astronomy and remote sensing of the atmosphere. Only up to 150 GHz the need can be satisfied with fundamental solid-state sources such as Gunn oscillators. At higher frequencies multipliers are needed. This paper discusses the Schottky-varactor multiplier theory and its use for design and optimization of millimeter and submillimeter frequency multipliers. Experimental work is also reviewed.     

Hybrid Integrated Frequency Multipliers at 300 and 450 GHz

300- and 450-GHz band doublers and triplers using thin-film integrated circuits have been developed. The multipliers are built with a GaAs honeycomb-type Schottky barrier diode designed to have a high cutoff frequency and transitions from microstrip to rectangular waveguides. A 450-GHz band tripler delivered an output power of -11.2 dBm with a corresponding conversion loss of 19.4 dB. The output power of the 300-GHz band doubler was -3.6 dBm, and its minimum conversion loss was 10.7dB. The hybrid integrated frequency multipliers are useful as solid-state sources in the short-millimeter-wave and subrnillimeter-wave regions.     

5 GHz binary frequency division on GaAs

A fully planar self-aligned technology with a standard photolithographic process has been used to fabricate binary frequency dividers on GaAs counting correctly from d.c. to over 5 GHz, which is the best performance so far on such circuits. The divider is an optimised version of the gated T master/slave flip-flop. The m.e.s.f.e.t.'s gates are 0.6 ?m within 2 ?m drain-source spacing.     

A 300 GHz quasioptical schottky frequency doubler

A monolithically integrated frequency multiplier based on a planar antenna providing impedance matching has been realized and measured at 300 GHz. Each of the two circuits comprises a Schottky varactor, slot antenna, MIM-capacitor and microstrip bias feed. The theoretical design aspects, the technological approach and the RF performance are addressed.     

Hybrid Integrated Triplers Frequency Doublers and to 300 and 450 GHz

High-power wide-band submillimeter-wave frequency sources have been developed. A frequency doubler to 300 GHz has delivered an output power of 5 mW with 3-dB-down bandwidth of more than 10 GHz. A frequency tripler to 450 GHz with an output power of 0.5 mW has also been tested. These multiplier output powers are highest values in the respective frequency regions up to date. The successful performances have been achieved by use of GaAs Schottky-barrier diodes and hybrid integrated circuits which are specially designed to obtain high output power.     

One-chip GaAs monolithic frequency converter operable to 4 GHz

The frequency converter combines a feedback amplifier, a differential amplifier, a double-balanced mixer, a voltage-controlled oscillator, and an IF amplifier on a 1-mm² GaAs chip. The FET circuits were matched by digital IC design rather than by the distributed element network technique, to use the substrate more effectively. Self-aligned WSi/Au gates 1.5 μm long were used, and the resistance in conventional WSi gates was reduced to enhance microwave characteristics. At 4 GHz, the conversion gain is 18 dB, the double-sideband noise is 11.8 dB and the output power is 5.6 dBm     

C.W. oscillation with p+-p-n+ silicon IMPATT diodes in 200 GHz and 300 GHz bands

Submillimetre-wave silicon single-drift-region IMPATT diodes with a p+?p?n+ structure have been fabricated by ion implantation. C.W. output powers of 7.5 mW at 285 GHz and 78 mW at 185 GHz were obtained. The maximum c.w. oscillation frequency observed was 394 GHz.     

Above 10 GHz frequency dividers with GaAs advanced saint and air-bridge technology

GaAs advanced SAINT without excess gate metal overlap on the dielectric film and air-bridge technology are applied to dual-clocked BFL M/S binary frequency dividers. Operation above 10 GHz is achieved owing to reduction of gate parasitic capacitances and parasitic capacitances between interlayer lines.     

Experimental study of frequency multipliers based on a GaAs/AlAs semiconductor superlattices in the terahertz frequency range

Frequency multipliers based on a GaAs/AlAs semiconductor quantum superlattice have been experimentally studied. The power spectrum of the harmonics in the output signal from a multiplier with an input-signal frequency of 140–160 GHz has been measured. Planar diodes with a small active region (an area of 1–2 μm²) have been used in this study. For fabrication of the diodes, structures of heavily doped superlattices with the miniband width 24 meV have been used, these structures were grown by the molecular-beam epitaxy method. Measurements have been conducted using a BOMEM DA3.36 Fourier spectrometer equipped with a detector based on a bolometer cooled to the temperature of liquid helium. The results of the measurements have been used to plot the dependences of the power of the harmonics on the frequency in the range from 0.4 to 8.1 THz. It has been found that the character of the microwave-power distribution over the number of harmonics is close to the spectrum of a sequence of sign-alternating pulses which appear in the diode circuit when the applied voltage of the input signal exceeds the threshold of the diode. The minimal time of establishment of the pulse front and pulse duration are equal to 123 and 667 fs, respectively.     

Monte Carlo harmonic-balance and drift-diffusion harmonic-balanceanalyses of 100-600 GHz Schottky barrier varactor frequency multipliers

To date, high frequency multipliers have been designed and analyzed using harmonic-balance codes incorporating equivalent circuit models for the diodes. These codes, however, are unable to accurately predict circuit performance at frequencies above 100 GHz and do not allow a means for studying the physics of electron transport. In order to analyze these high frequency Schottky doublers, a novel harmonic-balance technique has been integrated into a drift-diffusion numerical simulator and, for the first time, a Monte Carlo numerical device simulator. The unification of the numerical device simulator with the harmonic-balance algorithm allows for the self-consistent study of electron transport phenomena as well as the study of device performance in a given circuit. These combined simulators are tested against experimental data and an equivalent circuit model harmonic-balance approach, and yield superior accuracy with respect to the experimental data     

Charge storage frequency multipliers

Frequency multiplication by means of a nonlinear charge storage element is investigated. This element is assurmed to have an abrupt transition from an infinite to a zero capacitance. An analysis of a frequency multiplier circuit utilizing such an element is carried out with certain limitations imposed on the mode of operation in order to make possible an algebraic solution; namely that 1) only a fundamental and one harmonic current be applied to the nonlinear element, 2) only particular conduction angles be permitted, and 3) the fundamental and harmonic be subject to a particular phase relationship. These limitations permit an algebraic solution for circuit performance for any multiplication factor and for a range of conduction angles. The analysis yields directly the input and output resistances of the multiplier, in terms of which the conversion efficiency and power handling capability are derived. Design data are presented for circuits with muitiplication factors of between 2 and 20.     

High-gain transistor frequency multipliers

Certain transistors, operating class C, have the combined properties of power amplifier and frequency multiplier. Utilizing these transistors, power gains in excess of 10 dB can be obtained for ×4 and ×5 narrow-band UHF transistor frequency multipliers.     

GaAs binary frequency dividers for high speed applications up to 10 GHz

Very high speed GaAs frequency dividers with a maximum operating frequency of 10 GHz are proposed. The dividers are based on a two-phase dynamic logic concept. Breadboard and simulation results are presented and discussed.     

22 GHz 1/4 frequency divider using AlGaAs/GaAs HBTs

A divide-by-four frequency divider using AIGaAs/GaAs HBTs with GalnAs/GaAs emitter cap layers was designed and fabricated. A maximum toggle frequency of 22.15 GHz was obtained at a power supply voltage of 9 V and a total power dissipation of 712 mW. The minimum input signal power was under 0dBm and the free-running frequency was as high as 20 GHz.     

A 94/47 GHz frequency halver using a GaAs Gunn device

This paper describes the basic principles and the set up of a new kind of frequency halvers suited for millimeter wave applications. A Ga As Gunn-device is used to act like a nonostable multivibrator having a hold time adequate to the domain transit time T_t of the Gunn-device. In a certain frequency range depending on the transit frequency f_T=1/T_T, bias voltage and circuit parameters a harmonic wave synchronized fundamental/2nd harnonic mode oscillator is able to perform as a frequency halver. An input power of only 1mW is sufficient to achieve a bandwidth of 5 GHz respectively 2.5 GHz centered around 94 GHz respectively 47GHz. Since the output power is 50 mW at fundamental frequency f_F, this halver offers 17dB conversion gain.     

High speed GaAs digital integrated circuit with clock frequency of 4.1 GHz

A maximum clock frequency of 4.1 GHz was obtained for a GaAs digital integrated circuit using deep recess normally-on GaAs MESFETs with 1.2 ?m long gate and interdigitated Schottky diodes. The Ti/Pt/Au gate electrode was made by a lift-off technique with conventional photolithography. The minimum propagation delay of a NAND/AND gate was estimated to be 100 ps/gate for a fan-out of 2 from the self-oscillation frequency of the master-slave flip-flops.     

Orotron with double-row periodic structure for the frequency range 140–300 GHz

The orotron with the double-row periodic structure (DRPS) with a period of 0.2 mm on the plane mirror of an open cavity is studied using various types of focusing mirrors with one and two electron flows in the frequency range 140–300 GHz. Experimental results prove a hypothesis on an increase in the efficiency of the electron-wave interaction (output power) owing to the application of the second electron flow in the interaction space due to the quarter-wavelength resonance in the DRPS slits. The effect is observed in the entire frequency range and is especially important for an increase in the power at the high-frequency boundary.     

Accurate design equations for 50-600 GHz GaAs Schottky diodevaractor frequency doublers

To maintain the simplicity of equivalent circuit modeling while dramatically increasing accuracy, a set of analytical design equations are derived for nonlinear circuit analysis of 50-600 GHz Schottky diode varactor frequency doublers. These analytical design equations contain semi-empirical coefficients derived from a high performance Monte Carlo harmonic-balance (MCHB) numerical simulator. Both optimal diode embedding impedances and diode parameters for optimal doubler performance can be calculated. The calculated optimal embedding impedance is that which gives the best doubler efficiency for the given diode parameters, the circuit input power, and the input frequency. Thus, these equations allow for multiplier co-design from both a device and circuit point of view in a relatively simple, efficient and accurate manner     

G-band metamorphic HEMT-based frequency multipliers

Two monolithic G-band active frequency multipliers have been designed and fabricated using coplanar-waveguide technology. The monolithic microwave integrated circuits are a frequency tripler for an output frequency of 140 GHz and a 110-220-GHz frequency doubler. The tripler demonstrates a maximum conversion gain of -11 dB for an input power of 9 dBm, whereas the doubler achieves a conversion gain of -7 dB for a 2.5-dBm input signal. The circuits have been realized using two InAlAs/InGaAs-based metamorphic high electron-mobility transistor processes with different gate lengths of 100 and 50 nm, respectively.