Ultrathin, high-efficiency solar cells made from GaAs films prepared by the CLEFT Process

Solar cells with conversion efficiencies as high as 17% at AM1 have been fabricated from single-crystal 10-µm-thick GaAs films prepared by the CLEFT process. These cells are the first devices to employ CLEFT films. In making a cell, a GaAs film with an n⁺/p/p⁺shallow-homojunction structure is grown by vapor-phase epitaxy on a specially masked single-crystal GaAs substrate, then transferred to a glass substrate that serves as the cell cover glass. The GaAs substrate can be reused repeatedly for preparing additional CLEFT films.     

A dc and microwave comparison of GaAs MESFET's on GaAs and Si substrates

In order to assess GaAs on Si technology, we have made a performance comparison of GaAs MESFET's grown and fabricated on Si and GaAs substrates under identical conditions and report the first microwave results. The GaAs MESFET's on Si with 1.2-µm gate length (290-µm width) exhibited transconductances (gm) of 180 mS/mm with good saturation and pinchoff whereas their counterparts on GaAs substrates exhibited gmof 170 mS/mm. A current gain cut-off frequency of 13.5 GHz was obtained, which compares with 12.9 GHz observed in similar-geometry GaAs MESFET's on GaAs substrates. The other circuit parameters determined from S-parameter measurements up to 18 GHz showed that whether the substrate is Si or GaAs does not seem to make a difference. Additionally, the microwave performance of these devices was about the same as that obtained in devices with identical geometry fabricated at Tektronix on GaAs substrates. The side-gating effect has also been measured in both types of devices with less than 10-percent decrease in drain current when 5 V is applied to a pad situated 5 µm away from the source. The magnitude of the sidegating effect was identical to within experimental determination for all side-gate biases in the studied range of 0 to -5 V. The light sensitivity of this effect was also very small with a change in drain current of less that 1 percent between dark and light conditions for a side gate bias of -5 V and a spacing of 5 µm. Carrier saturation velocity depth profiles showed that for both MESFET's on GaAs and Si substrates, the velocity was constant at 1.5 × 10⁷cm/s to within 100-150 Å of the active layer-buffer layer interface.     

Reduction of extrinsic base resistance in GaAs/AlGaAs heterojunction bipolar transistors and correlation with high-frequency performance

Improved high-frequency performance in GaAs/AlGaAs heterojunction bipolar transistors (HBT's) by reduction of extrinsic base resistance is demonstrated. A new self-aligned process which is very simple, yet capable of producing 0.25-µm emitter-to-base contact gaps, is described. By the use of AuBe, we have also been able to produce contact resistances to p-type GaAs (p = 5 × 10¹⁸) as low as 1.2 × 10^-7Ω.cm². This is the lowest value reported to p-type GaAs considering the relatively low doping levels used. By employing these techniques, we have produced HBT's with 2.5-µm-wide emitters having current gain cutoff frequencies fTthat appear to be greater than 35 GHz and maximum oscillation frequenciesf_{max}of 22 GHz.     

Submicrometer fully self-aligned AlGaAs/GaAs Heterojunction bipolar transistor

A novel submicrometer fully self-aligned AlGaAs/GaAs heterojunction bipolar transistor (HBT) for reducing parasitic capacitances and resistances is proposed. The fabrication process utilizes SiO2sidewalls for defining base electrode width and separating this electrode from both emitter and collector electrodes. Measured common-emitter current gain β for a fabricated HBT with 0.6 × 10-µm²emitter dimension and 0.7 × 10-µm²× 2 base dimension is 26 at 9 × 10⁴-A/cm²collector current density.     

Long-term and instantaneous burnout in GaAs power FET's: Mechanisms and solutions

Catastrophic source-drain burnout is an important failure mode in GaAs power FET's. In this paper we show that short-term (instantaneous) and long-term (aging) failures have different physical origins provided the underlying drain ohmic-contact weakness has been suppressed by use of a recessed n⁺drain ledge geometry. With this drain configuration, instantaneous burnout is due to thermal runaway of the buffer/substrate when local temperatures reach the 500-550°C range. For our typical devices With 30-50-µm-thick substrates, the associated de burnout power is 4-5 W/mm of gate periphery. Long-term aging failure, on the other hand, results from chemical changes at the GaAs surface between gate and drain. These changes induce localized areas of avalanche white-light emission, particularly along the n⁺ledge, which serve as burnout precursors. A series of aging, surface etching, and passivation experiments has revealed that oxygen probably plays a major role in the aging process, perhaps through its known effect on free arsenic formation. Moreover, it is found that minimization of the oxygen content at the top surface by using si3N4:H passivation rather than SiO2not only prevents white-light emission but increases the median life at 310°C channel temperature from 2.5 to more than 500 h.     

Characterization of InGaAs/AlGaAs pseudomorphic modulation-doped field-effect transistors

High-performance pseudomorphic InyGa1-yAs/Al0.15- Ga0.85As (0.05 le y le 0.2) MODFET's grown by MBE have been characterized at dc (300 and 77 K) and RF frequencies. Transconductances as high as 310 and 380 mS/mm and drain currents as high as 290 and 310 mA/mm were obtained at 300 and 77 K, respectively, for 1-µm gate lengths and 3-µm source-drain spacing devices. Lack of persistent trapping effects,I-Vcollapse, and threshold voltage shifts observed with these devices are attributed to the use of low mole fraction AlxGa1-xAs while still maintaining 2DEG concentrations of about 1.3 × 10¹²cm^-2. Detailed microwave S-parameter measurements indicate a current gain cut-off frequency Of 24.5 GHz Wheny = 0.20, which is as much as 100 percent better than similar GaAs/AlGaAs MODFET structures, and a maximum frequency of oscillation of 40 GHz. These superior results are in part due to the higher electron velocity of InGaAs as compared with GaAs. Velocity field measurement performed up to 3 kV/cm using the magnetoresistance method indicates an electron saturation velocity of greater than 1.7 × 10⁷cm/s at 77 K fory = 0.15, which is 20 percent higher than GaAs/AlGaAs MODFET's of similar structure.     

Zone-melting recrystallization of polycrystalline silicon films on fused silica substrates using RF-Heated carbon susceptor

High-quality recrystallized silicon films on fused silica substrates have been produced with a new micro-zone-melting method using an RF-heated carbon susceptor. In this method, the fused silica substrate, on which a 0.5-1.0-µm-thick polycrystalline silicon film encapsulated with a 1.2-µm-thick CVD-SiO2layer has been deposited, is moved across the carbon susceptor surface, which has a narrow-strip high-temperature zone. Recrystallized silicon films with     

Electron-beam fabrication of GaAs low-noise MESFET's using a new trilayer resist technique

A LO/HI/LO resist system has been developed to produce sub-half-micrometer T-shaped cross section metal lines using e-beam lithography. The system provides T-shaped resist cavities with undercut profiles. T-shaped metal lines as narrow as 0.15 µm have been produced. GaAs MESFET's with 0.25-µm T-shaped Ti/Pt/Au gates have also been fabricated on MBE wafers using this resist technique. Measured end-to, end 0.25-µm gate resistance was 80 ω/mm, dc transconductance gmas high as 300 mS/mm was observed. At 18 GHz, a noise figure as low as 1.4 dB with an associated gain of 7.9 dB has also been measured. This is the lowest noise figure ever reported for conventional GaAs MESFET's at this frequency. These superior results are mainly attributed to the high-quality MBE material and the advanced T-gate fabrication technique employing e-beam lithography.     

An In0.15Ga0.85As/GaAs pseudomorphic single quantum well HEMT

This letter describes high electron mobility transistors (HEMT's) utilizing a conducting channel which is a single In0.15Ga0.85AS quantum well grown pseudomorphically on a GaAs substrate. A Hall mobility of 40 000 cm²/V.s has been observed at 77 K. Shubnikov-de Haas oscillations have been observed at 4.2 K which verify the existence of a two-dimensional electron gas at the In0.15Ga0.85As/GaAs interface. HEMT's fabricated with 2-µm gate lengths show an extrinsic transconductance of 90 and 140 mS/mm at 300 and 77 K, respectively-significantly larger than that previously reported for strained-layer superlattice InxGa1-xAs structures which are nonpseudomorphic to GaAs substrates. HEMT's with 1-µm gate lengths have been fabricated, which show an extrinsic transconductance of 175 mS/mm at 300 K which is higher than previously reported values for both strained and unstrained InxGa1-xAs FET's. The absence of AlxGa1-xAs in these structures has eliminated both the persistent photoconductivity effect and drain current collapse at 77 K.     

Ion-implantation and activation behavior of Si in MBE-Grown GaAs on Si substrates for GaAs MESFET's

The suitability of MBE-grown GaAs layers on Si substrates has been studied for ion-implanted GaAs MESFET technology. The undoped as-grown GaAs layers had a carrier concentration below 10¹⁴cm^-3. Uniform Si ion implants into 4-µm-thick GaAs layers on Si were annealed at 900°C for 10 s, using a rapid-thermal-annealing (RTA) system. Both the activation and the doping profile were similar to those obtained in bulk semi-insulating GaAs under similar conditions. The SIMS profiles of Si and As atoms near the GaAs/Si heterointerface were identical before and after the RTA process, indicating negigible interdiffusion during the implant activation. Dual implants of a shallow n+ layer and an n-channel layer were used to fabricate GaAs MESFET's with a recess-gate technology. Selective oxygen ion implantation was used for device isolation. The maximum transconductance obtained was 135 mS/ mm compared to typical values of 150-180 mS/mm obtained in our laboratory on GaAs substrates in similar device structures.     

A low-voltage high-speed silicon photodiode with buried isolation region for short-haul optical-fiber communications

A new epitaxial silicon p-i-n photodiode has been developed for short-haul optical-fiber communications that can be operated at biases as low as 4 V. The device has a heavily doped 5-µm-thick p⁺⁺isolation-region between the p⁺substrate and the π-epitaxial layer. Fast rise and fall times (2 ns), and low leakage current (40 pA) result from the recombination and trapping of the minority-carrier electrons in the substrate. Experimental results on such an n⁺-π-p⁺⁺-p⁺device with 1.1-mm²photosensitive area and 25-µm epi-layer thickness show quantum efficiency of 80 percent at 825-nm wavelength.     

Efficiency calculations for thin-film polycrystalline semiconductor Schottky barrier solar cells

Numerical calculations have been made of the effect of grain size on the short-circuit current and the AM1 efficiency of polycrystalline thin film InP, GaAs, and Si Schottky barrier solar cells. Si cells 10 µm thick are at best 8 percent efficient for 100-µm grain sizes; 25-µm-thick Si cells can be about 10 percent efficient for this grain size. GaAs cells 2 µm thick can be 12 percent efficient for grain sizes of 3 µm or greater.     

Surface-acoustic-wave (SAW) voltage sensor with improved sensitivity

The sensitivity of a surface-acoustic-wave (SAW) voltage sensor can be increased by reducing the thickness of the substrate across which the voltage is applied. Voltage sensitivity of 95 Hz/V has been obtained in a 77-MHz SAW oscillator fabricated on a 71-µm-thick, 728° Y-X LiNbO3substrate.     

GaAs MESFET fabrication using maskless ion implantation

A 2000-Å-diameter focused-ion beam from a Au-Si liquid-metal-alloy ion source was used to implant the doped regions of GaAs metal-semiconductor gate field-effect transistors. An Al stopping layer on the wafer was used to trap the Au ions. The 140-keV Si⁺⁺beam component was deflected under computer control to implant 8 × 50 µm active channel regions and 16 × 50 µm contact regions. The devices were metallized using conventional lithography. DC electrical characteristics of the 1.5-µm-gate-length devices are comparable to those of conventionally processed devices of identical geometry.     

Millimeter-wave GaAs FET's prepared by MBE

GaAs MESFET's suitable for operation in the millimeter-wave frequency range have been developed. These devices feature electron-beam-defined sub-half-micrometer gates with MBE grown materials. With an active-layer doping of 6 × 10¹⁷/cm³, an extrinsic transconductance of 330 mS/mm was obtained. A 75-µm gate-width device has achieved a gain of 13, 9.5, and 6.5 dB at 35, 44, and 60 GHz, respectively.     

A study of high-speed normally off and normally on Al0.5Ga0.5As heterojunction gate GaAs FET's (HJFET)

The dc, small-signal microwave, and large-signal switching performance of normally off and normally on Al0.5Ga0.5As gate heterojunction GaAs field-effect transistors (HJFET) with submicrometer gate lengths are reported. The structure of both types of devices comprises an n-type 10¹⁷-cm^-3Sn-doped active layer on a Cr-doped GaAs substrate, a p-type 10¹⁸-cm^-3Ge-doped Al0.5Ga0.5As gate layer and a p⁺-type 5 × 10¹⁸-cm^-3Ge-doped GaAs "contact and cap" layer on the top of the gate. The gate structure is obtained by selectively etching the p⁺-type GaAs and Al0.5Ga0.5As. Undercutting of the Al0.5Ga0.5As layer results in submicrometer gate lengths, and the resulting p⁺-GaAs overhang is used to self-align the source and the drain with respect to the gate. Normally off GaAs FET's with 0.5- to 0.7-µm long heterojunction gates exhibit maximum available power gains (MAG) of about 9 dB at 2 GHz. Large-signal pulse measurements indicate an intrinsic propagation delay of 40 ps with an arbitrarily chosen 100-Ω drain load resistance in a 50-Ω microstrip circuit. Normally on FET's with submicrometer gate lengths (∼0.6 µm) having a total gate periphery of 300 µm and a corresponding dc transconductance of 20-30 mmhos exhibit a MAG of 9.5 dB at 8 GHz. The internal propagation delay time measured under the same conditions as above is about 20 ps.     

Fabrication and characterization of AlGaAs/GaAs heterojunction bipolar transistors

The fabrication and characterization of MBE-grown AlGaAs/GaAs heterojunction bipolar transistors (HBT's) are described, A Be redistribution profile in the HBT epi-layer at the emitter-base heterojunction interface is investigated using secondary ion mass spectrometry, A relatively high substrate temperature of 650°C during growth can be employed by introducing a 100-Å undoped spacer layer between the emitter and base layer. A simple wafer characterization method using phototransistors is demonstrated for accurately predicting current gain in a three-terminal device. A dc current gain of up to 230 is obtained for the fabricated HBT with a heavy base doping of 1 × 10¹⁹/cm³. A gain-bandwidth product fTof 25 GHz is achieved with a 4.5-µm-width emitter HBT.     

Normally-off InGaAs junction field-effect transistor with InGaAs buffer layer

InGaAs junction field-effect transistors (JFET's) with 1-µm gate length were successfully fabricated with an n⁺-InGaAs active layer (8 × 10¹⁶cm^-3) and an undoped InGaAs buffer layer grown on semi-insulating InP:Fe substrate by liquid-phase epitaxy. The device showed good pinch-off behavior with a threshold voltage of 0.25 V, a low drain current of 1 µA at zero gate-source voltage, and a very high transconductance of 553 mS/mm at room temperature. This is one of the highest transconductance values ever reported for a 1-µm gate-length FET.     

New technique for measurement of electron saturation velocity in GaAs MESFET's

A new technique for the measurement of the electron saturation velocity in GaAs FET's is proposed using the "end" resistance measurement. The measurements performed on 1.3-µm gate-length ion-implanted GaAs MESFET's lead to the values of the saturation velocity ranging from 1 to 1.3 × 10⁵m/s.     

Electron beam direct writing technology applied to 512 kbit ROM with 1 µm geometry

A 512 kbit read-only memory (ROM) to store Chinese ideographs has been fabricated using variable-shaped electron beam and dry-etching lithography. 1.0-µm minimum line width was used to delineate device area spacings smaller than those obtained with conventional design rules using photoimaging techniques. SiO2, Si3N4, and polysilicon etchings were accomplished by reactive sputter techniques with CF4+ H2and CCl3F gases using negative electron beam resist PGMA and positive resist AZ-2400. Al etching was carried out by plasma with CCl4gas using negative electron beam resist NER-1. The alignment marks detectability and their locating accuracy were improved by properly using the basis arithmetic operations, subtraction and summation, in backscatter signal processings. 6.6 mm × 8.9 mm chip-by-chip alignment yielded about 0.2-µm level-to-level registration accuracy. Memory cell size and chip size are 5.2 µm × 8.4 µm and 6.6 mm × 8.9 mm, respectively; access time and power dissipation are 400 ns and 800 mW, respectively.