Molecular basis of the interphase dielectric properties of microelectronic and optoelectronic packaging materials

High frequency microelectronic and optoelectronic device packaging requires the use of substrate and encapsulation materials having a low dielectric constant, low dielectric loss and high volume resistivity. Most packaging materials are polymer-ceramic composites. A clear understanding of the broadband dielectric properties of composite materials is thus of great current importance for the effective development of high frequency packaging materials and optimized package design. Toward this goal, a general framework for understanding the dielectric properties of packaging materials was recently developed in which the dielectric constant of polymer-ceramic composite materials is characterized by the electrical properties of the polymer phase, the filler phase and an interphase region within the composite system. However, for this framework to be a viable tool for tailoring the dielectric properties of packaging materials, one must understand the dielectric properties of the polymer-filler interphase region, which represents a region of polymer surrounding and bonded to the surface of each filler particle having unique dielectric and physical characteristics. This work presents a model to explain and predict the dielectric properties of the composite interphase region based on dipole polarization theory.     

Fabrication and characterization of PZT-PMWSN thin film using pulsed laser deposition

Thin PZT films are being developed for use in sensor and actuator application in micromechanical systems. For the use as sensor and actuator, it is desirable to combine high mechanical quality factor (Q_m) with high piezoelectric constant (d) and high electro-mechanical coupling factor (k_p). We fabricated PbZr_xTi_1−xO₃-Pb(Mn,W,Sb,Nb)O₃ (PZT-PMWSN) targets with variations in the Zr/Ti ratio. The dielectric and piezoelectric properties of PZT-PMWSN ceramics were investigated as a function of Zr/Ti ratio. At the Zr/Ti ratio of 0.52/0.48, the electrical coupling factor (k_p) and the mechanical quality factor (Q_m) showed a maximum value of 0.56 and 2344, respectively. The PZT-PMWSN thin film has been prepared on a Pt/Ti/SiO₂/Si substrate using pulsed laser deposition method. The structural property was characterized with XRD, SEM and ferroelectric hysteresis loop measurement were used to characterize the electrical properties of PZT-PMWSN thin film.     

Study and characterization of optoelectronic photoconductor-basedprobes

Photoconductor sampling probes are important for optoelectronic device and circuit measurement applications. We use the finite-difference transmission line matrix (FD-TLM) method to characterize the ultrafast photoconductor sampling probes' fundamental performance limits imposed by electromagnetic constraints. Both on-wafer and free-standing photoconductor probes are investigated as applied to microstrip lines found in millimeter-wave integrated circuits and as applied to coplanar strip lines found in ultrafast device characterization systems. Localized invasiveness, distributed loading, and measurement accuracy are investigated for various probing configurations and orientations. Localized invasiveness is small for all our simulations. Distributed loading is negligible for cases where the guided-mode field confinement is tighter than the spatial separation between the probe support structure and the transmission line. Measurement accuracy is acceptable for simulated structures, but amplitude calibration precision may be compromised. We also study photoconductor probes for high-bandwidth signal generation on transmission line structures. The generated signals follow the photoconductor switch photocurrent signal for cases where both the probe and the transmission line form well-matched guiding-wave structures but are attenuated and distorted for other cases     

A junction characterization for microelectronic devices quality and reliability

With scaling down of devices for higher performance, ageing effects are becoming more important under standard working conditions. They have an important impact on the reliability of microelectronics devices since changes in the devices operating conditions due to lower power consumption are made. This work considers experimental degradations of the emitter–base characteristics in a transistor; the charge transport phenomena are related to structural properties and the evolution of standard operations, which introduce threshold voltage changes related to high injection effects. Both the junction ideality factor and the transient voltage appear as significant and sensitive parameters for quality and reliability characterization or hardness evaluation.A new reliability parameter RF is introduced and related to ageing of devices and to degradation processes.     

Modeling of interfacial sliding and film crawling in back-end structures of microelectronic devices

The fine-scale of interconnect structures in the back-end of modern microelectronic devices makes them susceptible to unusual, scale-sensitive deformation phenomena during processing or service because of internal stresses induced by thermal expansion mismatch between adjoining materials. During thermo-mechanical cycling associated with processing or service, dimensional changes may occur in Cu interconnect lines embedded in a low-K dielectric (LKD) due to plasticity/creep, strain incompatibilities may arise between Cu and LKD due to diffusionally accommodated interfacial sliding, and Cu lines may crawl or migrate via plastic deformation and interfacial sliding under far-field shear stresses imposed by the package. Although small, these effects can have a pronounced effect on component reliability. This paper presents shear-lag based modeling approaches to simulate out-of-plane (OOP) strain incompatibilities which arise within a single-layer Cu-LKD back-end structure (BES) during back-end processing, and in-plane (IP) deformation and migration of Cu interconnects within the BES after the chip is attached to a flip-chip package. Both models incorporate a previously developed constitutive interfacial sliding law, and help rationalize experimentally observed interfacial strain incompatibilities within Cu-LKD BES.     

Suppression of oxygen and carbon impurity deposition in the thermal system of Czochralski monocrystalline silicon

When preparing large monocrystalline silicon materials, severe carbon etching and silicide deposition often occur to the thermal system. Therefore, a suppression method that optimizes the upper insulation structure has been proposed. Assisted by the finite element method, we calculated temperature distribution and carbon deposition of heater and heat shield, made the rule of silicide and temperature distributing in the system, and we explained the formation of impurity deposition. Our results show that the optimized thermal system reduces carbon etching loss on heat components. The lowered pressure of the furnace brings a rapid decrease of silicide deposition. The increase of the argon flow rate effectively inhibits CO and back diffusion. The simulated results agree well with the experiment observations, validating the effectiveness of the proposed method.     

SiOF and SiO2 deposition in a HDP reactor: tool characterization and film analysis

A high density plasma chemical vapour deposition (HDP CVD) system based on electron cyclotron resonance (ECR) plasma excitation for deposition of inter metal dielectric (IMD) is presented. With the system deposition of SiO₂ and SiOF has been performed. The influence of pressure, Ar content in the flow, total flow, bias voltage, microwave power on gap fill capability and growth rate has been investigated. A figure of merit, the product of gap filling capability and growth rate is defined. In addition measurements of the uniformity of the composition over the wafer of the deposited SiO₂ and SiOF layers were performed. The dielectric constant of the layers was measured on SiOF films with different composition. The stability of these SiOF films was also analysed. This was done by treating the films with moisture and measuring composition before and after this treatment.     

脉冲激光沉积Al膜的沉积模式及沉积速率研究

为了给脉冲激光沉积(PLD)法沉积大面积均匀薄膜的应用提供相关的理论依据,以纯铝块作为靶材,采用PLD法在同轴和旁轴两种模式下对比研究了Al薄膜的厚度均匀性。同时,在旁轴的沉积模式下分别研究了基片温度、激光功率和重复频率对A l薄膜沉积速率的影响规律。实验结果表明,采用PLD方法在旁轴的沉积模式下获得的Al薄膜的厚度更加均匀。随着基片温度的增加,薄膜的沉积速率反而降低。升高激光功率,薄膜的沉积速率也随之提高。而在激光重复频率的变化过程中,Al薄膜的沉积速率有一最大值。     

Design and fabrication of thin film resistive heaters for hybrid optoelectronic packaging

This paper presents the technology for the design and fabrication of planar resistive heaters made from vacuum deposited nichrome thin films on a quartz substrate. These heaters are suitable as isolated local heat sources for melting solder to attach discrete components on a hybrid optoelectronic integration platform. Numerical simulations are performed using the Finite Element Method (FEM) to determine the geometry of the heaters in order to deliver adequate thermal performance. Multiple heater elements are batch processed on a 3.0 in polished fused quartz wafer using standard photolithographic techniques. Use of polyimide as a reliable insulation layer between the nichrome thin film and the solder has improved the thermal uniformity over the heater surface. Individual heaters can reach temperatures close to 300/spl deg/C drawing 7.1 W of power on an uncooled alumina platform and 12.0 W on an uncooled copper platform. This temperature is high enough to melt gold-tin (AuSn) solder (with eutectic melting point of 280/spl deg/C), typically used for attaching different optoelectronic components on a substrate.     

ZnO纳米晶薄膜/p-Si异质结制备及其光电特性

为了发展高性能、低成本和结构简单的ZnO纳米 器件,在本文中,利用简便的热分解法,在p型 硅(p-Si)基底上制备ZnO纳米晶薄膜,利用场发射扫描电子显微镜(FESEM)、X射线衍射仪 (XRD)、紫外- 可见分光光度计和荧光光谱仪,分别研究了ZnO纳米晶薄膜的形貌、晶相结构和光学特性。 结果显示:在 p-Si基底上形成不规则颗粒状ZnO纳米晶,为多晶六方纤锌矿结构。ZnO纳米晶薄膜在可 见光区光透过率 高于90%,光学带宽为3.26eV,仅在 387nm处出现一个很强的近带边(NBE)发射峰。进一步发现ZnO纳米 晶薄膜/p-Si异质结在暗态和365nm紫外光照射下都出现整流特性, 形成了二极管。在暗态下,该二极管的 整流率为3.95(±2.46 V),开启电压约为0.7V,理想因 子为4.65,反偏饱和电流为4.57×10－8 A。在365nm的 紫外光照射下,它的整流率高达24.85(±0.65V),说明它对365nm的紫外光有很高的响应,适合用于紫外光探测 器。     

光化学汽相淀积技术在薄膜备制中的应用

介绍了光化学汽相淀积法的原理以及ＰＶＤ－１０００设备淀积薄膜的规律，特点等，并且给出了所淀积的ＳｉＯ２膜，Ｓｉ３Ｎ４膜和ＺｎＳ膜的基本特性。     

多孔硅薄膜对p 型单晶硅太赫兹波段透射特性的影响

利用化学腐蚀方法,在低阻值p型单晶硅片上制备了火山口形、准纳米孔柱形和多孔形三种形貌的多孔硅薄膜。以空气为参考基准,0.2～10 THz时域光谱显示,火山口形样品在0.2～6 THz的透射强度下降了约1/2,另外两种样品强度下降了约1/5。火山口形、准纳米孔柱形样品呈现低通滤波特性,多孔形样品呈现级联带通特性。准纳米孔柱形样品截止频率比火山口形样品和多孔形样品提高了3 THz左右。样品的频谱出现多处吸收峰,峰的位置与薄膜的几何结构尺寸有关。实验结果表明:多孔薄膜的形状和几何结构尺寸改变了p型单晶硅的太赫兹波段透射强度、吸收频率和截止,该材料可以成为从太赫兹波段至可见光波段的宽频段探测材料和调制材料。     

背投显示技术及其用光学薄膜

对比了背投领域几种主要技术的原理和性能特点，同时介绍了多媒体投影系统所需要的各类光学薄膜的作用，参数和光学性能；并针对该领域国内外最新研究状况进行了调研，给出了现在所面临的关键技术难题并对其发展前景做了预测。     

Experimental characterization of electron-hole generation in silicon carbide

Thermal generation in wide bandgap semiconductors can be observed by monitoring the capacitance recovery transients of npn (or pnp) storage capacitors in which the middle layer is floating. In this article, we report a study of thermal generation in 4H and 6H silicon carbide (SiC). Three generation mechanisms are identified: bulk generation in the depletion regions of the pn junctions, surface generation at the periphery of the capacitors, and defect generation associated with imperfections in the material. All three generation mechanisms are thermally activated. Bulk generation and surface generation have activation energies of approximately half bandgap, while defect generation exhibits field-induced barrier lowering resulting in an apparent activation energy less than half bandgap. Because the generation rate is extremely low, most measurements are conducted at elevated temperatures (250-350°C). However, we also describe a long-term measurement at room temperature in which the 1/e recovery time appears to be in excess of 100 years.     

光电子封装中新型激光焊接吸收薄膜的设计

设计了一种用于对SiO2、Si和LiNbO3等材料进行激光焊接的吸收薄膜。这种“金属-介质-金属”的三层吸收薄膜减少了夹在透明母料之间的焊料表面对Nd：YAG激光束的反射。该设计使激光能量在实验中的实际吸收率超过99％。这种吸收膜与焊料层的结合使激光能更有效地转化为热能,减少了激光穿透母料的能量,这样也就减少了因为激光的透射而导致母料损伤的可能性,使激光能量得到更有效的利用。同时,焊接成品的力学性能也得到了有效提高。     

Comparison of thin epitaxial film silicon photovoltaics fabricated on monocrystalline and polycrystalline seed layers on glass

We fabricate thin epitaxial crystal silicon solar cells on display glass and fused silica substrates overcoated with a silicon seed layer. To confirm the quality of hot‐wire chemical vapor deposition epitaxy, we grow a 2‐µm‐thick absorber on a (100) monocrystalline Si layer transfer seed on display glass and achieve 6.5% efficiency with an open circuit voltage (V_OC) of 586 mV without light‐trapping features. This device enables the evaluation of seed layers on display glass. Using polycrystalline seeds formed from amorphous silicon by laser‐induced mixed phase solidification (MPS) and electron beam crystallization, we demonstrate 2.9%, 476 mV (MPS) and 4.1%, 551 mV (electron beam crystallization) solar cells. Grain boundaries likely limit the solar cell grown on the MPS seed layer, and we establish an upper bound for the grain boundary recombination velocity (S_GB) of 1.6x10⁴ cm/s. Copyright © 2014 John Wiley & Sons, Ltd.     

Atomic layer deposition of tantalum oxide thin films for their use as diffusion barriers in microelectronic devices

Atomic Layer Deposition (ALD) was used for the deposition of tantalum oxide thin films in order to be integrated in microelectronic devices as barrier to copper diffusion. The influence of deposition temperature, number of cycles and precursor pulse time on the film growth was discussed. The conformity of thinnest deposited films was shown. Copper diffusion through ALD Ta₂O₅ thin films, 20 nm in thickness, was investigated, for three temperatures from 600 to 800 °C, using X-ray Photoelectron Spectroscopy. The failure of such films was detected after a thermal treatment at 700 °C.     

Ka波段宽带薄膜匹配负载设计与制备研究

基于实频法思想设计了Ka波段薄膜匹配负载的宽带匹配网络,并利用ADS和HFSS软件进行了仿真和优化。仿真结果表明,在32 GHz～40 GHz频率范围内,所设计匹配负载的电压驻波比均小于1.2。利用丝网印刷以及直流磁控溅射工艺制备了所设计的薄膜匹配负载。测试结果表明,所制备的TaN薄膜匹配负载在30.3 GHz～37.4 GHz频率范围内,其电压驻波比均小于1.3。