CaCu3Ti4O12高介电材料的研究进展

在介绍CaCu3Ti4O12材料体心立方类钙钛矿结构的基础上总结了CaCu3Ti4O12块材和薄膜的制备方法,综述了CaCu3Ti4O12材料在高介电性能、晶界阻挡层效应引起的非线性特性以及金属离子掺杂改性等方面的最新研究进展.     

CaCu3Ti4O12多晶块材的巨介电常数

采用固相反应法制备了CaCu3Ti4O12单相多晶块材,系统地研究了其介电常数与温度（ε（T））和频率（ε（f））的依赖关系,结果表明,CaCu3Ti4O12多晶块材在温度为300K、频率为1kHz时,ε高达14000;在1kHz、100～340K温区内ε的数值基本不变．CaCu3Ti4O12多晶块材的介电特性很难用位移型铁电体的相关理论描述,可能源于在纳米尺度的畴区内极化弛豫的动态变化．在1kHz交流电场作用下,温度低于100K时,CaCu3Ti4O12多晶块材ε的急剧下降与其中氧空位引起Ti离子变价所产生的极化子的热激活相关。     

烧结温度对CaCu3Ti4O12巨介电性能的影响研究

制备CaCu3Ti4O12陶瓷,在50 K～300 K温区范围内测试试样介电性能.研究结果表明,CaCu3Ti4O12结晶完整性、晶界及缺陷对其巨介电常数的大小、出现低介电常数向高介电常数转变时对应温度的高低以及对极化粒子的温度活化响应弥散程度有直接的影响.随晶界和缺陷的下降,极化粒子受缺陷相互作用相应减弱,产生松弛时需要克服的势垒下降,对应的产生松弛的温度随之降低.材料的结晶越完整,极化粒子的温度活化响应弥散现象越小,由低到高介电常数的转变速度越快.     

CaCu2.7Ti4O12介电性能和J-E特征

采用传统的固相反应法制备了Cu欠量的CaCu3Ti4O12(CaCu2.7Ti4O12)陶瓷,研究了不同烧结时间对CaCu2.7Ti4O12相结构、显微形貌、介电性能和J-E非线性特征的影响。结果表明,延长保温时间降低了CaCu2.7-Ti4O12陶瓷的中低频介电损耗和击穿场强并且显著提高了其介电常数。采用肖特基热电子发射模型对其非线性特征和电学性能的变化机理进行了分析,认为耗尽层宽度是影响电学性能的主要因素。保温30h的CaCu2.7Ti4O12陶瓷有望作为低压压敏电阻应用于半导体电路中。     

溶胶-凝胶法制备CaCu_3Ti_4O_(12)粉体及其电性能

利用溶胶-凝胶法制备CaCu3Ti4O12粉体,采用差热分析、X射线衍射、扫描电子显微镜等技术进行表征,并探讨CaCu3Ti4O12粉体的烧结特性及电性能。结果表明,干凝胶经750℃低温煅烧可获得粒径分布较窄、平均粒径为80～100 nm的CaCu3Ti4O12粉体。CaCu3Ti4O12陶瓷在1 000℃时实现致密烧结,比固相反应法制备的粉体烧结温度降低100～200℃,具有较宽的烧结温区。溶胶-凝胶法制备的陶瓷经1 050℃烧结2 h,获得优良的电性能,相对介电常数为20 190,介电损耗为0.022,非线性系数为4.530。     

CaCu3Ti4O12陶瓷高介电性的起因机制

为了探索CaCu3Ti4O12(CCTO)高介电性的起因机制,利用固相反应工艺制备了CCTO陶瓷样品,对其电学性质进行了研究.在40 Hz～100 MHz测量范围内,其室温下的介电频谱在1 MHz附近呈现一个类Debye型弛豫,而高温介电频谱分别在1 kHz以下和1 MHz附近呈现两个类Debye型弛豫.抛除表面层的同一个样品分别溅射金电极和烧渗银电极后升温测量其介电频谱,发现低频介电弛豫对电极的金属类型高度敏感,而高频介电弛豫与电极的金属类型无关,与材料微观结构存在着密切的关系.因此推断:CCTO低频介电弛豫起源于样品与电极之间的耗尽层效应,而高频介电弛豫起源于高阻态的晶界与半导化的晶粒形成内部阻挡层电容效应.     

PZT陶瓷中由氧空位与畴壁相互作用引起的内耗

采用低频倒置扭摆内耗仪对组分为 Pb(Zr0.7Ti0.3)O3 (PZT73)和 Pb(Zr0.3Ti0.7)O3 (PZT37) 的两种陶瓷的内耗 Q-1及振动频率的平方 f 2（正比于材料的剪切模量 G）与温度的关系进行了 测定。在纯三角相的 PZT73陶瓷中发现两个内耗峰。高温内耗峰 PM起源于材料的顺电－铁 电相变 ,低温内耗峰 P1本质上是一个宽化的 Debye峰,可归因于氧空位作用下的畴壁振荡弛豫。 对纯四方相的 PZT37陶瓷,除了 P1和 PM峰外,在 P1与 PM峰之间另有内耗峰 P2,这与 900畴附 近的氧空位团簇的弛豫有关 ,其特征可用描述强关联系统的关联态模型（ Coupling model）描述。     

液相法制备CCTO及其巨介电机理的研究

利用溶胶凝胶法制备了CaCu3 Ti4 O12 (CCTO),相对介电常数高达123000.通过对不同温度烧结的样品断口进行能谱分析,发现晶界有明显的Cu富集,而且样品介电常数以及电导率均与晶界处Cu含量成正比.分析了Cu的偏析度对介电常数的影响及其巨介电机理.     

巨介电陶瓷CaCu_3Ti_4O_(12)/聚合物复合材料研究进展

介绍了具有巨介电常数的CaCu3Ti4O12陶瓷与聚合物形成复合材料的制备工艺,分析了复合材料介电性能的影响因素,展望了今后巨介电陶瓷CaCu3Ti4O12/聚合物复合材料的发展趋势。     

Al-Mg合金的晶界内耗

研究了退火、淬火状态下 Al-Mg 合金的晶界内耗。实验表明,随 Mg 含量的增加,晶界内耗峰的峰宽和弛豫强度单调下降,峰位开始移向高温,后又移向低温;高温淬火处理能压低 Al-2.4wt-%Mg的晶界峰,但对其它低 Mg 含量试样不敏感,一定温度的保温能使压低的晶界峰回升。     

SrTiO_3/CaCu_3Ti_4O_(12)复合陶瓷材料的介电性能

本文采用固相反应法制备了xSrTiO_3/(1-x)CaCu_3Ti_4O_(12)(x=0,0.2,0.4,0.6,0.8,1)复合陶瓷,研究了复合材料的物相、微观结构和宽温度宽频率范围内的介电性能。结果表明:在1348~1600K的温度范围内烧结能够得到致密性良好的xSrTiO_3/(1-x)CaCu_3Ti_4O_(12)(x=0,0.2,0.4,0.6,0.8,1)复合陶瓷。频率为100kHz时,样品的室温介电常数随SrTiO_3含量的增加而减少,从71358(x=0)单调减少至270(x=1),其变化规律遵循Lichtenecker法则。介电损耗随SrTiO_3含量的增加先增大后减少。当x=0.2时,样品与CaCu_3Ti_4O_(12)陶瓷的介电性能相似,存在低温的介电弛豫和巨介电常数平台。随着SrTiO_3含量的增加,复合陶瓷的低温介电弛豫激活能增大,介电响应被抑制,而高温介电响应由于高温电导的影响而增强,使得CaCu_3Ti_4O_(12)特有的巨介电常数平台随着SrTiO_3的增加逐渐消失,xSrTiO_3/(1-x)CaCu_3Ti_4O_(12)复合材料的温度依赖性增强。     

CaCu3Ti4O12 nanoparticles using polyvinyl pyrrolidone: synthesis and dielectric properties

Nanocrystalline CaCu3Ti4O12 powders with particle sizes of 39.28 8.12 nm were synthesized by a simple modify sol-gel using PVP (Poly-vinyl-pyrrolidone). The synthesized precursor was characterized by TG-DTA to determine the thermal decomposition and crystallization temperature which was found to be at above 500 degrees C. The precursor was calcined at 800 degrees C in air for 8 h to obtain nanocrystalline powders of CaCu3Ti4O12. The calcined CaCu3Ti4O12 powders were characterized by XRD, FTIR, SEM and TEM. Sintering of the powders was conducted in air at 1100 degrees C for 16 h. The XRD results indicated that all sintered samples have a typical perovskite CaCu3Ti4O12 structure and a small amount of CaTiO3. SEM micrographs showed the average grain sizes of 1.86 +/- 0.69 /m for the sintered CaCu3Ti4O12 ceramic prepared using the CaCu3Ti4O12 powders calcined at 800 degrees C. The sintered samples exhibit a giant dielectric constant, epsilon' of approximately 10(3)-10(4). The large low-frequency dielectric permittivity at low temperature is closely related to sub-grain boundary distribution, including conductivity effect. Furthermore, the ceramic shows three semicircles in the complex impedance plane. However, at low frequency, semicircles of sub-grain boundary and grain boundary are considered to represent collapse different electrical mechanisms. The another is ascribed to the contribution of grain. The dielectric behavior at several frequencies and temperatures of these samples can be attributed to electronic inhomogeneities present in material and can be explained based on a microstructural model.     

巨介电常数陶瓷CaCu3Ti4O12的研究进展

CaCu_3Ti_4O_(12)(CCTO)陶瓷具有高介电常数和高热稳定性,这使得CCTO可能在高密度信息储存、高介电电容器、大规模集成电路等领域获得广泛使用。系统地介绍了CCTO高介电常数起源的内禀机制和外禀机制,详细归纳了元素掺杂对CCTO介电特性的影响,阐述了巨介电常数与本征点缺陷的内在关联,肯定了晶粒电导赝极化理论,指出了CCTO巨介电常数陶瓷研究的重点在于:基于外禀机制的IBLC模型,通过晶胞掺杂或晶界掺杂改变晶粒或者晶界的电导,进而调控CCTO的介电损耗,使CCTO保持较高介电常数的前提下,在很宽的频率范围内使介电损耗正切值降低到0.1以下。     

Effect of sintering temperature on the properties of modified mechanical alloyed CaCu3Ti4O12

This paper presents the effects of calcination time and sintering temperature on the properties of CaCu(3)Ti(4)O(12). Electroceramic material of CaCu(3)Ti(4)O(12) was prepared using a modified mechanical alloying technique that covers several processes, which are preparation of raw material, mixing and ball milling for 5 hours, calcination, pellet forming and, sintering. The objective of this modified technique is to enable the calcination and sintering processes to be carried out at a shorter time and lower temperature. The x-ray diffraction (XRD) analysis result shows that a single-phase of CaCu(3)Ti(4)O(12) was completely formed by calcination at 750 degrees C for 12 hours. Meanwhile, the grain size of a sample sintered at 1050 degrees C for 24 hours is extremely large, in the range of 20-50 mum obtained from field emission scanning electron microscopy (FESEM) images. The dielectric constant value of 14,635 was obtained at 10 kHz by impedance (LCR) meter in the sintered sample at 1050 degrees C. However, the dielectric constant value of samples sintered at 900 and 950 degrees C is quite low, in the range of 52-119.     

Enhanced Dielectric Response in Mg-doped CaCu_3Ti_4O_(12) Ceramics

CaCu3Ti4O12 ceramics substituted by Mg for Ca were prepared by the solid state reaction method. The crystal structures, microstructures, and dielectric properties of the Ca1-xMgxCu3Ti4O12 ceramics were investigated. At lower doping concentrations, the substitution of Mg for Ca caused a decreased lattice constant, while at higher doping concentrations, some of the Mg dopants started to replace Ti and resulted in an increased lattice constant, and some could also replace Cu due to the similar ion radius betwe...     

Strong nonlinear current-voltage behaviour in perovskite-derivative calcium copper titanate

The discovery of a giant dielectric constant of 10(5) in CaCu(3)Ti(4)O(12) has increased interest in this perovskite-type oxide. Here we demonstrate that, in addition to high permittivity, CaCu(3)Ti(4)O(12) has remarkably strong nonlinear current-voltage characteristics without the addition of any dopants. An intrinsic electrostatic barrier at the grain boundaries is responsible for the unusual nonlinear behaviour. The nonlinear coefficient of CaCu(3)Ti(4)O(12) reaches a value of 900, which is even greater than that of the varistor material ZnO. As a result, CaCu(3)Ti(4)O(12) may lead to efficient switching and gas-sensing devices.     

Resistive-switching behavior in polycrystalline CaCu(3)Ti(4)O(12) nanorods

Highly aligned CaCu(3)Ti(4)O(12) nanorod arrays were grown on Si/SiO(2)/Ti/Pt substrates by radio-frequency sputtering at a low deposition temperature of 300 °C and room temperature. Structural and morphological studies have shown that the nanostructures have a polycrystalline nature and are oriented perpendicular to the substrate. The high density of grain boundaries in the nanorods is responsible for the nonlinear current behavior observed in these arrays. The current-voltage (I-V) characteristics observed in nanorods were attributed to the resistive memory phenomenon. The electrical resistance of microcapacitors composed of CaCu(3)Ti(4)O(12) nanorods could be reversibly switched between two stable resistance states by varying the applied electric field. In order to explain this switching mechanism, a model based on the increase/decrease of electrical conduction controlled by grain boundary polarization has been proposed.     

CaCu3Ti4-3/4zFezO12/偏聚氟乙烯和Ca1-3/2xLaxCu3-yMgyTi4O12/偏聚氟乙烯复合材料的制备及介电性能研究

以CaCu3Ti4O12为原料,采用溶胶-凝胶法制备CaCu3Ti4-3/4zFezO12 (CCTFO)和Ca1-3/2xLaxCu3-y MgyTi4O12(CLCMTO)前驱粉体,以聚偏氟乙烯(PVDF)为基体采用球磨共混法热压制备CaCu3Ti4-3/4zFezO12(CCTFO)/PVDF和Ca1-3/2xLaxCu3-yMgyTi4O12(CLCMTO)/PVDF复合材料,考察掺杂量和前驱粉体填充质量对复合材料微观结构和介电性能的影响。结果表明:当前驱粉体填充质量增加到50%时,复合材料出现团聚现象。复合材料的介电常数和介电损耗均随填料含量的增加而升高,Fe掺杂后虽然不能提高复合材料的介电常数,但能降低中到高频段的介电损耗,La、Mg双掺杂不仅可以提高介电常数还可以降低介电损耗。     

稀土氧化物Eu_2O_3掺杂对CaCu_3 Ti_4O_(12)陶瓷微结构及介电特性的影响

以稀土氧化物Eu_2O_3为添加剂,采用固相反应法制备了不同掺杂比例(质量比:x=0,0.2%,0.5%,1%)的CCTO陶瓷样品,利用SEM、XRD、4294A型高精密阻抗分析仪等测试手段对样品的微观结构、介电性能和交流电阻率进行了测试分析.掺杂之后样品的晶格结构并未发生改变,但是样品内部相对晶相含量和晶粒平均尺寸减小,同时掺杂阻碍了样品内部晶界处富铜相的生成;纯CCTO的XRD图谱中分别出现了CuO、TiO_2和CaCO_3杂相,掺杂样品的图谱中并未出现上述杂相;样品的介电性能与相同组分材料内部的相对晶相含量,晶粒平均尺寸和晶界处富铜相有很大关系.Eu_2O_3掺杂提高了样品介电性能的频率和温度稳定性.当掺杂量为0.2%和0.5%时,样品的介电性能得到较好改善效果.样品在低频40Hz和高频3.5MHz的交流电阻率测量结果很好的验证了Eu_2O_3掺杂导致的微结构变化对样品介电性能的影响.