基于CMOS图像传感器的微光成像系统信噪比研究

信噪比是微光成像系统的关键参数,决定了成像系统的性能与成像质量。给出了互补金属氧化物半导体（Complementary Metal Oxide Semiconductor, CMOS）图像传感器微光成像系统的信噪比模型,仿真计算了系统的信噪比与信号、噪声的关系。搭建了信噪比测试环境,完成了系统信噪比测试实验。实验结果表明,理论值与实测值一致。最后,根据信噪比分析结果对给定系统进行了参数优化。计算结果显示,优化后的系统在1 mLux照度下,信噪比能达到4.5。信噪比的研究为基于CMOS微光成像系统的总体设计与优化提供了理论依据。     

高帧频高灵敏度线列PIN-CMOS图像传感器研究

设计了一款高帧频高灵敏度双通道16元线列PIN-CMOS图像传感器。相对于传统的pn结光电二极管,PIN光电二极管具有结电容小和量子效率高的优点,可以降低CTIA像素电路的噪声,提高信噪比;同时采用一种新型的相关双采样电路结构,可以在边积分边读出的模式下实现相关双采样,抑制像素复位带来的KTC噪声。基于0.35μm PIN-CMOS工艺进行了线列CMOS图像传感器流片,并对器件的光电性能进行了测试。测试结果表明:在像元尺寸为90μm×90μm,700nm波长下,器件灵敏度达3000V/(lx·s),量子效率为96%;在40kHz高帧频、0.05lx光照条件下器件信噪比为7,适于弱信号下的高速探测。     

低照度CMOS图像传感器设计与实现

设计了一种基于电容反馈跨阻放大器型（Capacitive Trans-impedance Amplifier,CTIA）像元电路与双采样（Delta Double Sampling,DDS）的低照度CMOS图像传感器系统。采用CTIA像元电路提供稳定的光电二极管偏置电压以及高注入效率,完成在低照度情况下对微弱信号的读取;同时采用数字DDS结构,通过在片外实现像元积分信号与复位信号的量化结果在数字域的减法,达到抑制CMOS图像传感器中固定图案噪声的目的,进一步提高低照度CIS的成像质量。基于0.35 m标准CMOS工艺对此基于CTIA像元电路的CMOS图像传感器芯片进行流片,像元阵列为256256,像元尺寸为16 m16 m。测试结果表明该低照度CMOS图像传感器系统可探测到0.05 lx光照条件下的信号。     

一种应用于CMOS图像传感器数字双采样ADC的PGA电路

提出了一种应用于CMOS图像传感器数字双采样模数转换器(ADC)的可编程增益放大器(PGA)电路。通过增加失调采样电容,采集PGA运放和电容失配引入的失调电压,在PGA复位阶段和放大阶段进行相关双采样和放大处理,通过数字双采样ADC将两个阶段存储电压量化,并在数字域做差,降低了PGA电路引入的固定模式噪声。采用0.18μm CMOS图像传感器专用工艺进行仿真,结果表明:在输入失调电压-30~30mV变化区间,提出的PGA的输出失调电压可以降低到1mV以下,相比传统PGA输出失调电压随输入失调电压单倍线性关系而言大大降低了列固定模式噪声。     

CMOS读出电路中的噪声及抑制

CMOS读出电路中的噪声严重地制约了读出电路的动态范围,进而影响到焦平面阵列甚至成像系统的性能.文章对读出电路中KTC噪声、1/f噪声以及固定图形噪声的成因及抑制技术进行了分析和讨论,并给出了仿真结果.     

面向超大面阵CMOS图像传感器的列总线自加速建立方法研究

在超大面阵CMOS图像传感器（COMS Image Sensor,CIS）中,由于像素面阵输出的列总线上存在超大的寄生电阻电容,列总线信号建立速度的主导因素发生改变,严重影响了读出速度.为了解决这一问题,本文提出了一种可应用于超大面阵CIS列并行读出机制的列总线自加速建立方法,基于电流增益增强理论,在不引入额外总线的前提下,通过对模拟信号建立过程的实时跟踪,加快列总线信号的变化过程,在列总线终端实现了自加速,将超长列总线的读出速度提升了一个数量级. 55 nm工艺下的测试与实验结果显示,采用本文提出的方法后,在亿级像素规模CIS列总线引入的寄生电容与寄生电阻分别为47 pF和20 kΩ的情况下,光电信号从像素节点到列级电路采样节点的上升建立时间由4μs缩短至790 ns,下降建立时间由22.43μs缩短至1.17μs,将亿级像素规模的CMOS图像传感器帧频提升至100帧,压缩了相关双采样的取样间隔时间,从而拓宽了噪声抑制的频率范围.本文方法实现了在保持低噪声和高速读出的同时,单列功耗仅有6.6μW.     

CMOS图像传感器的设计考虑

由于CMOS图像传感器的应用,新一代图像系统的开发研制已经得到了极大的加快。这些芯片采用与调制解调器、传真机、便携式移动电话以及微处理器相同的设备制造,并且随着经济规模的形成,其生产成本也得到了降低。现在,CMOS图像传感器的画面质量已能够与CCD图像传感器相媲美了,这主要归功于图像传感器芯片设计的改进,以及亚微米级设计水平增加了像素内部新的功能。实际上CCMOS图像传感器更确切地说应当是一个图像系统。一个典型的CMOS图像传感器通常包含有：一个图像传感器核心（是将离散信号电平多路复用传送到一个单一的输出,…     

基于时间域读出的大动态范围CMOS图像传感器

设计了一款基于时间域读出的大动态范围CMOS图像传感器。传感器基于一种新型的结构,其可在时间域下探测高输入光强,在模拟域下探测低输入光强。该设计在传统电容反馈式跨阻放大器(CTIA)的基础上,新增了时间域测量电路,在不改变原有积分过程的同时可实现连续的大动态范围。基于0.35μm,5V-CMOS工艺进行了256×1线列CMOS图像传感器流片,光电二极管面积为22.5μm×22.5μm,并对器件的光电特性进行了后仿真验证。仿真测试结果表明,基于时间域读出的图像传感器可实现96dB的大动态范围,且时间域和模拟域的两路输出信号可同步输出,功耗为7.98mW。     

边积分边读出低噪声红外焦平面读出电路研究

设计了一款低噪声InGaAs焦平面读出电路.提出一种新型相关双采样电路结构,可在边积分边读出模式下有效抑制积分电容(0.15 pF)的KTC噪声.电路经0.5 μn5 V Nwell CMOS工艺流片,测试结果符合设计目标,在高帧频边积分边读出模式下工作状态良好,电路噪声约1.7×10-4V,动态范围大于80 dB.     

Column readout circuit with improved offset mismatch and charge sharing for CMOS image sensor

High linearity and low noise column readout chain are two key factors in CMOS image sensor. However, offset mismatch and charge sharing always exist in the conventional column wise readout implementation, even adopting the technology of correlated double sample. A simple column readout circuit with improved offset mismatch and charge sharing for CMOS image sensor is proposed in this paper. Based on the bottom plate sampling and fixed common level method, this novel design can avoid the offset nonuniformity between the two buffers. Also, the single buffer and switched capacitor technique can effectively suppress the charge sharing caused by the varied operating point. The proposed approach is experimentally verified in a 1024 × 1024 prototype chip designed and fabricated in 55 nm low power CMOS process. The measurement results show that the linear range is extended by 20%, the readout noise of bright and dark fields is reduced by 40% and 30% respectively, and the improved photo response nonuniformity is up to 1.16%. Finally, a raw sample image taken by the prototype sensor shows the excellent practical performance.     

红外焦平面CMOS单元读出电路

研制出一种 Ｃ Ｍ Ｏ Ｓ 差分放大器组成的电容反馈互导放大器（ Ｃ Ｔ Ｉ Ａ） 型红外焦平面读出电路,其输出端带有相关双取样（ Ｃ Ｄ Ｓ） 电路。对读出电路的注入效率进行了计算机模拟。介绍了器件的设计与工艺分析。实验结果表明,在７７ Ｋ 下,读出电路的动态范围为６６ ｄ Ｂ,功耗典型值为０ ．５３ 毫瓦／ 位     

应用于高速CMOS图像传感器的10比特列并行循环式ADC

This paper presents a high-speed column-parallel cyclic analog-to-digital converter(ADC) for a CMOS image sensor.A correlated double sampling(CDS) circuit is integrated in the ADC,which avoids a stand-alone CDS circuit block.An offset cancellation technique is also introduced,which reduces the column fixed-pattern noise(FPN) effectively.One single channel ADC with an area less than 0.02 mm~2 was implemented in a 0.13μm CMOS image sensor process.The resolution of the proposed ADC is 10-bit,and the conversion rate is 1.6 MS/s. The measured differential nonlinearity and integral nonlinearity are 0.89 LSB and 6.2 LSB together with CDS, respectively.The power consumption from 3.3 V supply is only 0.66 mW.An array of 48 10-bit column-parallel cyclic ADCs was integrated into an array of CMOS image sensor pixels.The measured results indicated that the ADC circuit is suitable for high-speed CMOS image sensors.     

高性能TDI扫描式红外传感器读出电路研究

扫描式红外成像传感器在遥测遥感、卫星成像等远距离成像领域具有广泛的应用。为了缓解信噪比相对较低而影响图像质量的问题,提出了一种时间延时积分(TDI)型读出电路。该读出电路由电容跨阻放大器(CTIA)像素电路阵列、并行TDI电路、多路开关选择电路和输出缓冲器等组成。为实现对宽动态范围光电流的处理,CTIA电路设计有多档可选增益,且非线性度小于0.3%。该读出电路采用0.35 μm CMOS工艺设计与制造,芯片面积约为1.3 mm×20 mm,采用5 V电源时功耗小于60 mW。为了评估1024×3 TDI读出电路的功能,采用了对TDI输入端注入不同电压激励的方式进行测试,测试结果验证了所提出的设计方案。     

A time-to-first spike CMOS image sensor with coarse temporal sampling

Conventional voltage-based CMOS image sensors inherently have a dynamic range of about 60 dB. To extend the dynamic range, a two-degree of freedom time-based CMOS image sensor is proposed. Instead of reading analog voltages off chip, a time representation is used to record when the photodetector voltage passes a timing-varying threshold. The time measurements are combined with the reference voltage waveform to reconstruct the image. Experimental results on a prototype 32 × 32 pixel array CMOS image sensor verify that the two-degree of freedom sampling technique is feasible for ultra-wide dynamic range imaging. A measured 115 dB dynamic range at 30 fps is obtained. Qiang Luo received the B.S. (with honor) and M.S. degrees in electrical engineering from Fudan University, Shanghai, China, in 1995 and 1998, respectively, and the Ph.D. degree in electrical engineering from University of Florida, Gainesville, FL, in 2002. In 2001, he was with Texas Instruments Inc., Dallas, TX, where he was an intern engineer working on ultra-wide dynamic range CMOS image sensors. From 2002 to 2004, he was with National Semiconductor Corporation, Santa Clara, CA, where he was a staff circuit design engineer and worked on the design of high performance CMOS image sensors. He is currently with the Marvell Semiconductor Inc, Sunnyvale, CA, where he is working on the development of advanced DVD servo IC. His research interests include high-speed mixed-signal IC design, CMOS image sensors, DVD servo IC and device physics. Dr. John G. Harris received his BS and MS degrees in Electrical Engineering from MIT in 1983 and 1986. He earned his PhD from Caltech in the interdisciplinary Computation and Neural Systems program in 1991. After a two-year postdoc at the MIT AI lab, Dr Harris joined the Electrical and Computer Engineering Department at the University of Florida (UF). He is currently an associate professor and leads the Hybrid Signal Processing Group in researching biologically-inspired circuits, architectures and algorithms for signal processing. Dr. Harris has published over 100 research papers and patents in this area. He co-directs the Computational NeuroEngineering Lab and has a joint appointment in the Biomedical Engineering Department at UF. Zhiliang J. Chen received Ph.D. degree in electrical engineering from University of Florida in 1994. From 1994 to 2004, he was with Texas Instruments where he worked as Senior Member of Technical Staff and Design Branch Manager. In 2002 he was expatriated to COMMIT, a Texas Instruments JV company in China, as director of RF & Analog Base Band department. In 2004, he left Texas Instrument and found On-Bright (Shanghai) Corporation where he serves as president of the company. Dr. Chen currently held 22 US patents and has published morn than 10 journal papers. He was a recipient of the Best Paper Award from the 1997 ESD/EOS symposium.     

近红外光谱仪CMOS图像传感器驱动电路设计

简单介绍了一种典型的CMOS图像传感器G9203-256D,主要用于近红外光谱仪的设计.介绍了此传感器的的驱动电路的设计过程,具体介绍了驱动电路中驱动电压和驱动时序的设计过程.驱动时序基于CPLD器件设计,采用VHDL语言编写程序简化了硬件逻辑设计过程,电路简洁,控制可靠.     

CMOS图像传感器及其研究

介绍了CMOS图像传感器的工作原理,比较了CCD图像传感器与CMOS图像传感器的优缺点,指出了CMOS图像传感器的技术问题和解决途径,综述了CMOS图像传感器的现状和发展趋势.     

背景暗电流抑制的红外探测器读出电路输入级设计

主要研究红外探测器读出电路的输入级设计,针对短波红外信号,电容反馈互导放大器型(CTIA)读出电路具有高注入效率的特点.本文设计了一种带有背景暗电流抑制的CTIA型读出电路输入级结构,该结构在77 K低温环境,大于300μs的长积分时间工作.探测器接收短波小信号,注入电流0～800 pA,与传统的CTIA型读出电路输入...