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1.
An accurate calculation of MOSFET capacitance-voltage (C V) characteristics has to account for the bulk charge which is affected by nonuniform doping profiles and short-channel effects. In an approach based on the unified charge control model (UCCM), the voltage dependencies of the bulk charge are related to the standard parameters of the body plots which are routinely measured during MOSFET characterization. The results of the C-V calculations based on this model are in good agreement with experimental data and calculations based on the standard BSIM model. Compared to the BSIM simulations, the present model more accurately describes capacitances related to the bulk charge and the device subthreshold behavior, and it is suitable for incorporation into circuit simulators  相似文献   

2.
A one-region compact Ids model from subthreshold to saturation, which resembles the same form as the well-known long-channel model but includes all major short-channel effects (SCEs) in deep-submicron (DSM) MOSFETs, has been formulated through physics-based effective transformation. The model has 23 process-dependent fitting parameters, which requires an 11-step, one-iteration extraction procedure. The new approach to modeling channel-length modulation (CLM), subthreshold diffusion current, and edge-leakage current, all in a compact form, has been verified with the 0.25-μm experimental data. The model covers the full range of gate length (without “binning”) and bias conditions, and can be correlated to true process variables for aiding technology development  相似文献   

3.
Unified MOSFET Short Channel Factor Using Variational Method   总被引:1,自引:1,他引:0  
It is well known that short channel effect is one of the most important constraints that determine the downscaling of MOSFET's.The relationship between the device structure configuration and short channel effect is first expressed empirically in Ref.[1].And recently,due to...  相似文献   

4.
A new natural gate length scale for MOSFET's is presented using Variational Method. Comparison of the short channel effects is conducted for the uniform channel doping bulk MOSFET, intrinsic channel doping bulk MOSFET, SOI MOSFET and double gated MOSFET. And the results are verified by the 2D numerical simulation. Taken all the 2-D effects on front gate dielectric, back gate dielectric and silicon film into account, the data validity of electrical equivalent oxide thickness is investigated by this model, as shows that it is valid only when the gate dielectric constant is relatively small.  相似文献   

5.
The spline collocation-based nonquasi-static (NQS) model is further developed to include all regions of operation and small-geometry effects. The new formulation provides a unified (hence consistent) approach to both large-signal and small-signal NQS modeling and is sufficiently flexible to work with any surface-potential-based MOSFET model. The model is verified through comparison with the channel segmentation method, two-dimensional numerical simulations, and experimental results and demonstrates a controlled tradeoff between model accuracy and efficiency. The new NQS model has been implemented into PSP model. Circuit simulations are given to demonstrate the accuracy and applicability of the new model.  相似文献   

6.
A MOSFET model valid for long-channel devices is derived. The model describes correctly the drain current and the small signal parameters in all regions of operation, including the subthreshold regime and the saturation regime. The model contains as an approximation the charge-sheet model proposed by Brews[1]. Mobility variations along the channel, resulting from the normal and lateral electric fields, can be taken into account.  相似文献   

7.
The authors address the modelling of 1/f noise in SOI MOS devices for circuit simulation. A simple and unified model is presented which is valid for all operating regimes; it is verified by comparison with noise measurements. It is shown that this model is especially useful for low-power SOI MOS circuit design  相似文献   

8.
Short-channel single-gate SOI MOSFET model   总被引:3,自引:0,他引:3  
The authors derive an analytical model for threshold voltage for fully depleted single-gate silicon-on-insulator (SOI) MOSFETs taking into consideration the two-dimensional effects in both SOI and buried-oxide layers. Their model is valid for both long- and short-channel SOI MOSFETs and demonstrates the dependence of short-channel effects on the device parameters of channel-doping concentration, gate oxide, SOI, and buried-oxide thickness. It reproduces the numerical data for sub-0.1-/spl mu/m gate-length devices better than previous models.  相似文献   

9.
《Solid-state electronics》1987,30(8):859-864
A new highly accurate long-channel MOSFET model which is valid both in the linear and saturation regions by taking into account two-dimensional effects over the whole channel is presented in this paper. The calculated results are in excellent agreement with the experimental data. Compared with three other long-channel MOSFET models, the double integral model, the charge-sheet model and the single-integral model, our model has some advantages. The results demonstrate that two-dimensional effects are important in the current continuity near the drain end of the channel and cannot be neglected when the MOSFET is operating in saturation.  相似文献   

10.
An efficient computer-aided-design-oriented large-signal microwave model for silicon MOSFETs is presented based on the well-founded small-signal equivalent circuit including self-heating effect and charge conservation condition. The proposed new single continuously differentiable empirical equations for drain current and gate capacitance are simple and quite accurate. The model parameters in the equations are constructed in such a way that they can be easily and straightforwardly extracted from measured data. The temperature effect is predicted by simply adopting the linear temperature-dependent model parameters for threshold voltage, saturation current, capacitance, and series resistances. The presented model is a good compromise between the simplicity of numerical calculations and the accuracy of final results that is desired by circuit designers in nonlinear circuit simulation  相似文献   

11.
An accurate analytical model is proposed in this paper to calculate the power loss of a metal-oxide semiconductor field-effect transistor. The nonlinearity of the capacitors of the devices and the parasitic inductance in the circuit, such as the source inductor shared by the power stage and driver loop, the drain inductor, etc., are considered in the model. In addition, the ringing is always observed in the switching power supply, which is ignored in the traditional loss model. In this paper, the ringing loss is analyzed in a simple way with a clear physical meaning. Based on this model, the circuit power loss could be accurately predicted. Experimental results are provided to verify the model. The simulation results match the experimental results very well, even at 2-MHz switching frequency.  相似文献   

12.
A simple CAD model is proposed for the short-channel enhancement-mode MOSFET. The conventional use of drain bias modulation of channel length to describe saturation characteristics has been discarded and replaced by drain bias enhancement of channel velocity. The model possesses continuity of current, transconductance and output conductance throughout the triode, and saturation ranges of operation. It has been tested against experimental transistors and against two-dimensional numerically simulated transistors, and has given satisfactory results in all cases. The model is based on good physics, is easy to understand, is straightforward to use, and is computationally efficient.  相似文献   

13.
Intuition, device evolution, and even efficient computation require simple MOSFET (metal-oxide-semiconductor field-effect transistor) models. Among these simple models are charge-sheet models which compress the inversion layer into a conducting plane of zero thickness. It is the purpose of this paper to test one such charge sheet model to see whether this approximation is too severe. This particular model includes diffusion which is expected to be important in the subthreshold and saturation regions.As a test the charge sheet model is applied to long-channel devices. Long-channel MOSFET behavior has been thoroughly studied, and is very well explained by the Pao-Sah double-integral formula for the current. Hence, a clear-cut test is a comparison of the charge sheet model with the Pao-Sah model.We find the charge sheet model has two advantages over the Pao-Sah model.(1) It leads to a very simple algebraic formula for the current of long-channel devices. The same formula applies in all regimes from subthreshold to saturation. Neither splicing nor parameter changes are needed. No discontinuities occur in either the current or the small-signal parameters, or in the derivatives of the small-signal parameters.(2) It is simpler to extend the charge sheet model to two or three dimensions than the Pao-Sah model. This simplification is a result of dropping the details of the inversion layer charge distribution.An important aspect of the gradual channel approximation is brought out by the analysis. Suppose the boundary condition relating the quasi-fermi level at the drain, φfL, to that at the source, φfo, namely
φ?L?0+VD
where VD is the drain voltage, is applied in all bias regimes. Then it is shown that this means the potential at the drain end of the channel, φsL is not related to the potential at the source end of the channel, φso, by
φsLs0+VD
Instead, φsL is computed, not imposed as a boundary condition. It is suggested that this failure of the potential to satisfy the boundary condition at the drain is justifiable. That is, φsL should be reinterpreted as the potential at the point in the channel where the gradual channel approximation fails. Hence, (2) may be relaxed. However, the “channel length” in the gradual-channel approximation now becomes a fitting parameter and is not the metallurgical source-to-drain separation.In addition several aspects of the long-channel MOSFET are brought out: (1) Pinch-off is achieved only asymptotically as the drain voltage tends to infinity. This is in marked contrast to the often-stated, textbook view that pinch-off is achieved for some finite drain voltage, the saturation voltage. (2) The channel or drain conductance approaches zero only asymptotically. (3) The transconductance saturates only asymptotically.Figures comparing the simple charge-sheet model formulas with the usual textbook formulas are included for direct-current vs drain voltage, channel conductance vs drain voltage, and transconductance vs drain voltage. The charge-sheet model agrees with the original Pao-Sah double-integral formula for the current at all gate and drain voltages, and possesses the correct subthreshold behavior. The textbook formulas do not.  相似文献   

14.
A new compact physics-based alpha-power law MOSFET model is introduced to enable projections of low power circuit performance for future generations of technology by linking the simple mathematical expressions of the original alpha-power law model with their physical origins. The new model, verified by HSPICE simulations and measured data, includes: 1) a subthreshold region of operation for evaluating the on/off current tradeoff that becomes a dominant low power design issue as technology scales, 2) the effects of vertical and lateral high field mobility degradation and velocity saturation, and 3) threshold voltage roll-off. Model projections for MOSFET CV/I indicate a 2X-performance opportunity compared to the National Technology Roadmap for Semiconductors (NTRS) extrapolations for the 250, 180, and 150 nm generations subject to maximum leakage current estimates of the roadmap. NTRS and model calculations converge at the 70 nm technology generation, which exhibits pronounced on/off current interdependence for low power gigascale integration  相似文献   

15.
The recently proposed non-quasi-static dc-to-high-frequency weak-to-strong-inversion model for the four-terminal MOSFET is improved in such a way that closer agreement with exact and experimental results can be obtained. It is shown that the modification of a single parameter leads to significant improvement in the model characteristics.  相似文献   

16.
A MOSFET model that is capable of handling the drain current above 10-10A within the temperature range of 220-340 K is proposed. The key feature of the model is that surface potentials at source and pinchoff points are used for the purpose of obtaining a smooth connection between the current solutions in the tail and the saturation regions. Comparison of the model with experiments has been carried out using n-channel MOSFET's with 7 × 1013, 7 × 1014, and 4 × 1015cm-3substrate impurity concentration and 675-, 1470-, and 5030-Å gate-oxide thickness. The theoretical calculations are in excellent agreement with the experimental measurements. It is shown that low-level current has a strong influence on the low-voltage static inverter circuit and dynamic memory.  相似文献   

17.
A new MOSFET substrate current model, incorporating energy transport, is proposed. It was found that a non-steady-state electron transport effect and two effects attributed to electron pressure are essential to calculate the substrate current characteristics accurately. The predictions from the present model compare favorably with the experimental data for MOSFET's with effective channel length down to 0.45 µm.  相似文献   

18.
The long-channel MOSFET model is based on an approximate solution to the nonlinear current-continuity equation in the channel. The model includes the large-signal transient and the small-signal AC analyses, although only the transient model is reported here. Comparisons have been made between this model and the 1-D numerical solution to the current-continuity equation, 2-D device simulation (PISCES), and the quasistatic (QS) results. The channel-charge partitioning scheme in the charge-based QS models is shown to be inadequate for the fast transient. This model does not use a charge-partitioning scheme and the currents are dependent on the history of the terminal voltages, not just the instantaneous voltages and their derivatives. For the slow signals (compared to the channel transit time), the nonquasistatic (NQS) model is reduced to the quasistatic 40/60 channel-charge partitioning scheme. The CPU time required for this model is about two to three times longer than that of conventional MOSFET models in SPICE  相似文献   

19.
An improved MOSFET model for circuit simulation   总被引:3,自引:0,他引:3  
Problems that have continued to remain in some of the recently published MOSFET compact models are demonstrated in this paper. Of particular interest are discontinuities observed in these models at the boundary between forward and reverse mode operation. A new MOSFET model is presented that overcomes the errors present in state-of-the-art models. Comparison with measured data is also presented to validate the new model  相似文献   

20.
An analytical threshold voltage model is developed based on the results from a three-dimensional MOSFET simulator, called MICROMOS. The model is derived by solving Poisson's equation analytically and is used to predict the threshold voltage of MOSFETs with fully recessed oxide isolation (the trench structure). Coupling was observed between the short-channel effect and the inverse-narrow-width effect. The coupling results from the mutual modulation of the depletion depth and is used to extend the analytical inverse narrow-width model to small-geometry devices. The model is compared with experimental data obtained from the literature as well as with the three-dimensional simulator. Satisfactory agreement for channel length down to 1.5 μm and channel widths down to 1 μm has been obtained  相似文献   

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