InGaN基高压LED和传统大功率LED的发光效率比较

主要从三个不同角度探究并分析了基于In Ga N材料的高压LED的发光效率优于传统大功率LED的原因。为了保证实验结论的可靠性,文中所采用的实验样品具有相同的芯片尺寸和材料以及相同的封装结构。经过大量的实验证明,更均匀的电流分布和小芯片间隙的出光,使得高压LED的发光效率优于传统大功率LED。结果显示,在相同的1 W输入功率下,高压LED的发光效率比传统大功率LED高大约4.5%。     

Lumen maintenance predictions for LED packages

Commercial claims for LED-based products in terms of lumen maintenance are fully based on TM-21 extrapolations using LM-80 data. This paper indicates that there may be a risk in doing this as TM-21 only relies on the behavior of the average LED degradation, instead of taking into account the degradation of all individual LEDs. Therefore, we propose a more profound statistical analysis in order to make the appropriate step from TM-21 extrapolation to lumen maintenance on a product level. This is needed as some commercial claims are based on 10 years of warranty and some service bids provide periods of 20 to 25 years of operation. This paper reviews the different approaches currently available to perform lumen maintenance extrapolations. We propose a new method to analyze and extrapolate LM-80 data using a more profound statistical approach.     

Chip package interaction for LED packages

Solid-state lightings (SSL) rapidly penetrate the global illumination market because of the energy efficiency and the reliability. The energy efficiency can be easily evaluated but the reliability is not convenient to be estimated. Among several reliability issues, a LED chip level's reliability could be a difficult problem because chip failures related to electromigration phenomenon are hard to be detected in the early stages. In order to remove potential leakage LEDs in modules, additional screening method is necessary to be performed occasionally. In this study, chip package interaction (CPI) for LED packages was investigated in order to estimate stresses of the LED chip in the module level. This methodology would help LED manufacturers to perform a robust design of LED packages in terms of the LED chip reliability. The electromigration is related to metal diffusion, which belongs to a creep phenomenon. As the creep strain is a function of temperature, stress and time, quantifying stresses in the metal layers of the LED die can be useful information for LED manufacturers to make an engineering decision in the early stages of manufacturing.     

Three-band white light from InGaN-based blue LED chip precoated with Green/red phosphors

A three-band white light-emitting diode (LED) was fabricated using an InGaN-based blue LED chip that emits 460-nm blue light, and a green phosphor SrGa/sub 2/S/sub 4/ : Eu/sup 2+/ and a red phosphor Ca/sub 1-x/Sr/sub x/S : Eu/sup 2+/ that emit 535-nm green and 615-nm red emissions, respectively, when excited by 460-nm blue light. When the white LED operated in a direct current (DC) 20 mA at room temperature, the Commission Internationale de l'Eclairage chromaticity coordinate (x, y), the color temperature Tc, and the color rendering index Ra are calculated to be (0.3236, 0.3242), 5937 K, and 92.2, respectively. The luminous efficacy of this white LED is about 15 lm/W at a DC 20 mA. With increasing DC from 5.0 to 60 mA, both the coordinates x and y of the white LED trend to increase, and consequently the Tc and the Ra increases and decreases, respectively.     

Color shift acceleration on mid-power LED packages

Mid-power LED packages are now widely used in many indoor illumination applications due to several advantages. Temperature stress, humidity stress and current stress were experimentally designed and performed to accelerate the color shift of mid-power LED packages and color shift mechanisms have been discussed based on the color shift results obtained from measurements. Conclusions could be drawn:

• -Linear function fitting demonstrates a good linear relationship between color shift (Δu′ Δv′) and aging time almost for all the aging conditions. We can extrapolate the color shift Δu′ and Δv′ based on the fitted regression equations and then make the prediction for the total color shift Δu′v′.
• -Current stress can induce a different failure mode. Peak intensity reduction analysis reveals that the current stress accelerates the degradation of LED die.
• -Humidity test induced a substantial color shift both in u′ and v′. The u′ has an increased degradation rate after aging of 3000 h at 85%RH & 85 °C, there should be different degradation mechanisms during the whole humidity test. The molecular structure decomposition of silicone plates and then follows the silicone carbonization due to the long-term (3000 h) accumulated high localized temperature aging.

     

Thermal investigation of LED array with multiple packages based on the superposition method

In this paper, the superposition method is used to investigate the complete temperature field of a light-emitting diode (LED) packaging substrate, based on the results of transient temperature rise measurements and the thermal resistance coupling matrix. The feasibility of use of the superposition method in an LED array with multiple packages has been proved first by temperature comparisons with the simultaneous operation of an array (5×5) of 25 high power LEDs mounted on a metal core printed circuit board (MCPCB). Compared with existing approaches, the superposition method will measure the internal temperature of chip directly, accurately and nondestructively. According to the relatively accurate and reliable self-heating and coupling temperature rise data, optimization scheme of LED lamp with multiple packages is proposed. The results show that increasing the heat source separation distance and improving the thermal conductivity of thermal interface materials will reduce the temperature rise and thermal non-uniformity.     

Reliability test and failure analysis of high power LED packages

A new type application specific light emitting diode(LED) package(ASLP) with freeform polycarbonate lens for street lighting is developed,whose manufacturing processes are compatible with a typical LED packaging process.The reliability test methods and failure criterions from different vendors are reviewed and compared.It is found that test methods and failure criterions are quite different.The rapid reliability assessment standards are urgently needed for the LED industry.85℃/85 RH with 700 mA is used to test our LED modules with three other vendors for 1000 h,showing no visible degradation in optical performance for our modules,with two other vendors showing significant degradation.Some failure analysis methods such as C-SAM,Nano X-ray CT and optical microscope are used for LED packages.Some failure mechanisms such as delaminations and cracks are detected in the LED packages after the accelerated reliability testing.The finite element simulation method is helpful for the failure analysis and design of the reliability of the LED packaging.One example is used to show one currently used module in industry is vulnerable and may not easily pass the harsh thermal cycle testing.     

Reliability test and failure analysis of high power LED packages

A new type application specific light emitting diode (LED) package (ASLP) with freeform polycarbonate lens for street lighting is developed, whose manufacturing processes are compatible with a typical LED packaging process. The reliability test methods and failure criterions from different vendors are reviewed and compared. It is found that test methods and failure criterions are quite different. The rapid reliability assessment standards are urgently needed for the LED industry. 85 ℃/85 RH with 700 mA is used to test our LED modules with three other vendors for 1000 h, showing no visible degradation in optical performance for our modules, with two other vendors showing significant degradation. Some failure analysis methods such as C-SAM, Nano X-ray CT and optical microscope are used for LED packages. Some failure mechanisms such as delaminations and cracks are detected in the LED packages after the accelerated reliability testing. The finite element simulation method is helpful for the failure analysis and design of the reliability of the LED packaging. One example is used to show one currently used module in industry is vulnerable and may not easily pass the harsh thermal cycle testing.     

RF electrical measurements of fine pitch BGA packages

A series of fine pitched ball grid arrays (BGAs) were measured on an Network Analyzer using a novel technique to de-embed the package test fixture and provide an accurate representation of the electrical characteristics of the package. The technique consisted of the design and fabrication of a RF circuit board. Duplicates of the board were modified to become a series of calibration fixtures while others, with sample packages attached, were modified to become test fixtures. The packages, attached to circuit boards, were measured to determine their performance at the RF frequencies of most cellular phone applications. Measurements included the return losses looking into several leads of the package that were 50 Ω terminated and insertion losses from one terminated lead to an adjacent one. These measurements can be used for verifying models or for characterizing packages     

Complete methodology for electrical modeling of RFIC packages

A complete methodology based on broadband S-parameter measurement is proposed to establish the electrical models for radio-frequency integrated circuit (RFIC) packages. The research is focused on calibration of the test-fixture parasitics to obtain the intrinsic S-parameters from which an equivalent coupled lumped model can be extracted for any pair of package leads under test. Then a step-by-step optimization scheme is employed to construct an equivalent circuit for the whole package. A real example on modeling a 16-lead Thin Shrink Small Outline Package (TSSOP) has been demonstrated. The established model can account for various package effects at radio frequencies     

Thermal resistance investigations on new leadframe-based LED packages and boards

In Solid State Lighting, thermal management is a key issue. Within the CSSL consortium, we have developed an advanced leadframe based LED package to reduce the thermal resistance of the component. Numerical simulations have been implemented using Ansys® software and thermal measurements have been carried out using the forward voltage method to derive the thermal resistance. The T3ster® transient thermal analysis has been used to determine the different thermal resistance contributions in the package and in the board, showing good correlation between experimental and simulation results. As a result, low thermal resistances of 5.5 K/W have been obtained on our advanced leadframe based LED package and have been compared with the standard configuration of multiple Rebel LEDs on FR4 board.     

Fatigue life evaluation of wire bonds in LED packages using numerical analysis

Reliability of LED packages is evaluated using several tests. When a thermal shock test, which is one of the reliability tests, is conducted, the most common failure mode is wire neck breakage. In order to evaluate the wire bonding reliability of LED packages, performing the thermal shock test is time-consuming. In this paper the wire bonding reliability for LED packages is evaluated by using numerical analysis. A wire bonding lifetime model for the thermal shock test was developed, which is based on Coffin-Manson fatigue law. The model was calibrated from fatigue data of thermal shock tests and volume averaging accumulated plastic strains. The accumulated plastic strains were calculated by using finite element analysis corresponding to the test conditions. The test conditions were changed by silicones, package sizes, wire bonding diameters, heights, and lengths. The calibrated model was used to estimate the number cycle to failure so that the wire bonding reliability for the thermal shock test was evaluated by performing the numerical analysis. Furthermore, we used a response surface methodology to study the relationship between the wire loop and the accumulated plastic strain to determine the optimal wire loop. The plastic strain was a function of diameter, height and length. At the optimal point, the number of cycle to failure for the thermal shock test was suggested using the wire bonding lifetime model.     

Thermal analysis of high power LED packages under the alternating current operation

In this paper we describe a novel thermal characterization method of GaN-based Light Emitting Diode (LED) package driven under the Alternating Current (AC) mode. The result was compared with the results from the thermal analysis for LED package operated under the Direct Current (DC) condition. Different from the DC condition, the junction temperature rise with the operation time of LED package was exhibited in a band formation. Finite Volume Method (FVM) was utilized to calculate the thermal performance of LED package under the AC condition using the input power extracted from the output current and voltage from the AC power supply. The experimental result was in a good agreement with the simulation data.     

Printable optically transparent adhesive processing for bonding of LED chips to packages

Die bonding is the first step in the packaging of light-emitting diodes and its role in lumen output performance and consistency of the packaged LED emitters has recently been investigated: there is an optimal range of bond-line thickness (BLT) and the fillet coverage has to be minimized. One method which can accurately control the BLT and fillet coverage is to employ the pre-made die attach adhesive (DAA) films, which cost more than the use of conventional DAA pastes. However it is difficult to control BLT as well as fillet by using conventional DAA pastes. In this work, a silicone-based transparent DAA is used for LED chip bonding. DAA layers are formed by using stencil printing, as an alternative method for LED die bonding with an objective of exploring a cost-effective method for LED die bonding with the controlled DAA BLT and fillet coverage. It is demonstrated that with other conditions being the same, a low BLT value of 3.9 µm could be achieved by stencil printing. The lumen output of the packaged white LED emitters using printed DAAs with no fillet coverage, is found to be 3.5% higher than using the conventional pin-transferred DAA pastes with 33% fillet coverage, while the reliability of the packaged white LEDs is found not to be altered. The method of printable DAAs for LED die bonding is thus a cost-effective alternative to the one using pre-made DAA films.     

Thermal measurements and analyses of low-cost high-power LED packages and their modules

The thermal behaviors of high-power light emitting diode (LED) chip-on-plate (COP) package and module are investigated by experimental measurements (with LED junction temperature (T_j) tester, thermocouples, and thermal imager), a thermal resistance circuit (TRC) method, a commercial finite element code (ANSYS), and a computational fluid dynamics code (CFdesign). Based on the experimental results, the thermal resistance of the COP package was found to be comparable to those for the commercial packages. Furthermore, it was also found that the T_j and thermal resistances of the COP package and module, calculated from 2D ANSYS, 3D TRC and 3D CFdesign, are consistent well with those from the experiments. Besides, the uncertain equation-based convection coefficients used in ANSYS and TRC for the thermal analysis of the COP module were closely examined and discussed in detail by comparing with those from CFdesign analysis. Moreover, the validated ANSYS and CFdesign models were used for parametric studies of the COP module and further provided useful design parameters. Finally, the COP module under natural and forced convection conditions was studied, and the results showed that the junction-to-air thermal resistances are sensitive to the flow conditions, but not for thermal resistances from the junction to aluminum substrate and to heat sink.     

Research on lumen depreciation related to LED packages by in-situ measurement method

In this paper, lumen depreciation of LED in reliability experiment was monitored by in-situ measurement method. The partial LED flux on the receiving surface of fiber cable was captured, and it was proportional to the total luminous flux of LED light source when we provided an exact distance. The high temperature operating life test was used to find the weakness elements of LED packages with a limiting maximum temperature stress of 125 °C. Four kinds of packaged samples were constituted with difference components, and the lumen depreciations were presented. Combined with the lumen depreciation data and sampling inspection, the results could be summed up as follows: (i) the luminous flux of LED chip had a steady and slow depreciation, however, that of the samples coated with the phosphor–silicone composites had an initial sharp decline and then reach the stable state. (ii) The samples of only chip encapsulated by silicone and those of commercial white LEDs were carbonized on the center surface between chip and materials of encapsulant. As a conclusion, the silicone as an LED encapsulant could induce flaws, the material properties in larger coefficient of thermal expansion (CTE) and stronger adhesion should be considered in the package design stage, and the degradation of phosphor–silicone composites led to a fast light energy loss during the initial high temperature aging test, and then reached up to steady.     

Thermal and mechanical effects of voids within flip chip soldering in LED packages

This paper investigates the effect of void percentage in the solder layer on the shear strength and thermal property of DA3547 packages by SAC soldering technology. X-ray observation and shear tests revealed that the increase of solder paste volume significantly decreases the void percentage in the solder layer and thus improved the shear strength of the packages. Furthermore, packages with lower void percentage showed a lower junction temperature based on the results of IR test and finite element simulation. The temperature difference due to the effect void percentage shows a correlation with the input power. For the DA3547 packages studied in this research, voids show limited influence on the junction temperature under 50 mA, the typical current recommended by Cree.     

Improving the incorporation of indium component for InGaN-based green LED through inserting photonic crystalline in the GaN layer

We report on the effect of inserted photonic crystalline (Ph-C) in the GaN epitaxial layer on the incorporation of the indium component for the InGaN-based green LED. The adoption of Ph-C in the GaN layer shifted the Raman peak value of E₂ mode of GaN to lower frequency and resulted in a tensive stress relief. The stress relief can be attributed to strained lattices restoring in the matrix of Ph-C and the GaN pseudo-epitaxy over the air-void of the Ph-C. Moreover, the HRXRD rocking curves and AFM results show that the insertion of Ph-C also improves the crystal quality. With the inserted Ph-C, the indium component in the multiple quantum wells of the green LED (Ph-C LED) was enhanced. This resulted in a 6-nm red-shift of the peak wavelength. Furthermore, the LOP of the Ph-C LED was enhanced by 10.65% under an injection current of 20 mA.     

Reliability enhancement of electronic packages by design of optimal parameters

Reliability growth testing involves the selection of optimal design parameters to enhance a product's reliability. This paper proposes a split plot experimental design that accommodates the restriction on randomization on the order of experimental runs caused by the experimental nature of accelerated reliability testing. The proposed experimental design provides statistically relevant solutions about the choice of design parameters, in terms of their reliability impact, in a much shorter time. A degradation model that aids in predicting the failure time for the given problem further supplements this discussion.     

Interactions between solder and metallization during long-term aging of advanced microelectronic packages

The reactions between the eutectic PbSn solder and the Au/Ni/Cu tri-layer metallization in advanced microelectronic packages were studied. In this investigation, reflowed packages were subjected to aging at 160°C for times as long as 4000 h. Immediately after the reflow, all the Au had left the Au/Ni/Cu metallization, forming many (Au_1−xNi_x)Sn₄ particles distributed throughout the whole solderjoint. In addition, there was a thin layer of Ni₃Sn₄ (1.4 μm) at the interface. After 500 h of aging, most of the (Au_1−xNi_x)Sn₄ particles regrouped at the interface as a continuous (Au_0.45Ni_0.55)Sn₄, layer over the Ni₃Sn₄ layer. After 2500 h of aging, nearly all the Ni layer had been consumed. A 15 μm layer of (Au_0.45Ni_0.55) Sn₄ and a 20 μm Ni₃Sn₄ were found over the remaining Ni. At 3000 h, the Cu had started to react with both Ni₃Sn₄ and (Au_1−xNi_x)Sn₄, forming a layer of (Cu_1−p−pAu_pNi_q)₆Sn₅, a layer of (Cu_1−r−sAu₁Ni_s)₆Sn₅, and a layer of Cu₃Sn over the Cu layer. A small amount of Cu (2.7–5.7 at.%) was found to dissolve in this Ni₃Sn₄, forming a ternary compound (Ni_1−yCu_y)₃Sn₄. It was revealed that Au diffused up-hill during the reaction. After aging for 4000 h, all the (Au_1−xNi_x)Sn₄ had disappeared and Au atoms had diffused into the (Cu_1−p−qAu_pNi_q)₆Sn₅ and (Cu_1−r−sAu_rNi_s)₆Sn₅ phases. The practical implications for the above findings were pointed out in this paper.