用于W-LAN的5.8GHz InGaP/GaAs HBT MMIC线性功率放大器

介绍了一种应用于W-LAN系统的5.8 GHz InGaP/GaAs HBT MMIC功率放大器。该功率放大器采用了自适应线性化偏置电路来改善线性度和效率,同时偏置电路中的温度补偿电路可以抑制直流工作点随温度的变化,采用RC稳定网络使放大器在较宽频带内具有绝对稳定性。在单独供电3.6 V电压情况下,功率放大器的增益为26 dB,1 dB压缩点处输出功率为26.4 dBm,功率附加效率(PAE)为25%。三阶交调系数(IMD3)在输出功率为26.4 dBm时为-19 dBc,输出功率为20 dBm时低于-38 dBc,在1 dB压缩点处偏移频率为20 MHz时邻道功率比(ACPR)值为-31 dBc。     

Low dissipation power and high linearity PCS power amplifier withadaptive gate bias control circuit

A new personal communication service (PCS) power amplifier with gate bias control circuit has been developed for high efficiency at low output power level: and for high linearity at high output power level. The efficiency at an average operating power of 16 dBm was improved to 10.5%, and the IMD, at the maximum operating power of 27 dBm to -33 dBc     

A Handset Power Amplifier With High Efficiency at a Low Level Using Load-Modulation Technique

A new monolithic-microwave integrated-circuit power amplifier for cellular handsets has been implemented using the load-modulation concept of the Doherty amplifier, which has a high efficiency at a low power level. In order to get a compact module, the$lambda/4$transmission line for the load modulation is replaced by a passive high-pass$pi$-network, and the load-modulation circuit is also modified to function as a power-matching circuit of the main amplifier. The amplifier has two modes of operation, low- and high-power modes, controlled by a control voltage. At the high power mode, both the main and auxiliary amplifiers are operational and, at the low power mode, only the main amplifier generates output power enhancing the efficiency. For the code-division multiple-access environment, the amplifier at the low-power mode provides power-added efficiency (PAE) of 39.8% and an adjacent channel power ratio (ACPR) less than 49.8 dBc at 23.1 dBm, and the high-power mode PAE of 37.9% and ACPR of 46.4 dBc at 28 dBm. The efficiency is improved by approximately 18.8% at$ P_ out=23$dBm by the load-modulation technique. For the advanced mobile phone system-mode operation, the amplifier delivers 26.1 dBm with PAE of 53% and 30.8 dBm with 48.7% at the low and high modes, respectively.     

Dual-band transmitters using digitally predistorted frequency multipliers for reconfigurable radios

Two methods for reconfigurable transmitters using frequency multipliers in conjunction with digital predistortion linearizers are developed. One method utilizes a circuit topology that can be switched between a fundamental-mode in-phase combined amplifier, and a push-push frequency doubler using input phasing. Investigation to maximize output harmonics out of regular power amplifiers (PAs) was performed, and the implementation of the device was successful for the amplifier- and doubler-mode operation. To satisfy optimal load-line conditions for the operation in both modes, a bi-tuned output-combining technique is introduced as well. Measurement results indicate that the circuit is able to transmit 28 dBm of output power at 900 MHz in the amplifier mode, and 22 dBm at 1800 MHz in the doubler mode. In combination with predistortion linearization, the reconfigurable transmitter was shown to be capable of amplifying IS-95B code-division multiple-access (CDMA) signals with an adjacent-channel power ratio (ACPR) up to -58dBc/30kHz. The second suggested method utilizes a fundamental-frequency PA followed by a varactor multiplier that can be bypassed with an RF switch. A varactor-diode doubler with a saturated conversion loss of 1.3 dB was built and tested. Using predistortion linearization techniques on both the PA and doubler, an ACPR of -53dBc/30kHz at 885-kHz offset was achieved for a CDMA signal transmitted at 1850 MHz.     

A planar gate double beryllium implanted GaAs power MESFET for lowvoltage digital wireless communication application

An ion-implanted planar gate power MESFET for low voltage digital wireless communication system including DCS1800 (digital cellular system at 1800 MHz) and CDMA (code division multiple access) handset applications has been developed. The process for the device developed contains double Be implantation to reduce the surface and substrate defect trapping effects. The MESFET process developed has very little gate recess (less then 200 Å), which greatly improves the uniformity and the yield of the wafer. The 1 μm×20 mm MESFET manufactured using this planar gate technology exhibits an output power of 32.98 dBm and power added efficiency over 53% with gain of 11.2 dB when tested at 1.9 GHz under 3.6 V drain bias voltage and 80 mA quiescent drain current. The pinch off voltage of the 20 mm devices within a wafer is -2.81 V with a standard deviation of 120 mV. The device was also tested at 3.6 V and 1.9 GHz for CDMA application. Under the IS-95 CDMA modulation at 28 dBm output power, the device gain is 10.7 dB and the device has an adjacent channel power rejection (ACPR) of -29.5 dBc at 1.25 MHz offset frequency and -44.9 dBc at 2.25 MHz offset. The test data shows that the double Be implanted devices developed using the planar gate technology have very good linearity and efficiency and can be used for the low voltage DCS1800 and CDMA handset applications     

CDMA800多载波线性功率放大器的设计

设计了一款6载波的高线性功率放大器.在功放管绝对稳定基础上,利用Loadpull和Sourcepull技术得到管子的最佳输入输出匹配电路.整个模块采用了4级放大,增益达到了50dB,最大输出功率42 dBm,互调衰减达到了-47dBc,ACPR和PAE效率均达到了电信的系统标准.末级采用了双平衡放大以提高功放的线性度.     

A 2.7-V SiGe HBT variable gain amplifier for CDMA applications

A monolithic SiGe HBT variable gain amplifier with high dB-linear gain control and high linearity has been developed for CDMA applications. The VGA achieves a 30-dB dynamic gain control with a control range of 0-2.7 Vdc in 824-849 MHz band. The maximum gain and attenuation are 23 dB and 7 dB, respectively. Input/output VSWRs keep low and constant despite change in the gain-control voltage. At a low operation voltage of 2.7 V, the VGA produces a 1-dB compression output power of 13 dBm and /spl plusmn/885-kHz ACPR of -57 dBc at a 5-dBm output power.     

A 3-V monolithic SiGe HBT power amplifier for dual-mode (CDMA/AMPS)cellular handset applications

A dual-mode (CDMA/AMPS) power amplifier has been successfully implemented by using a monolithic SiGe/Si heterojunction bipolar transistor (HBT) foundry process for cellular handset (824-849 MHz) applications. The designed two-stage power amplifier satisfies both CDMA and AMPS requirements in output power, linearity, and efficiency. At V _cc=3 V,the power amplifier shows an excellent linearity (first ACPR<-44.1 dBc and second ACPR<-57.1 dBc) up to 28 dBm of output power for CDMA applications. Under the same bias condition, the power amplifier also meets AMPS handset requirements in output power (up to 31 dBm) and linearity (with second and third harmonic to fundamental ratios lower than -37 dBc and -55 dBc, respectively). At the maximum output power level, the worst power-added efficiencies (PAEs) are measured to be 36% for CDMA and 49% for AMPS operations. The power amplifier also tolerates severe output mismatch (VSWR>12:1) up to V _cc=4 V, with spurs measured to be <-22 dBc in CDMA outputs at two specific tuning angles, but with no spur in AMPS outputs at any tuning angle     

Highly Linear and Efficient Microwave GaN HEMT Doherty Amplifier for WCDMA

A highly linear and efficient GaN HEMT Doherty amplifier for wideband code division multiple access (WCDMA) repeaters is presented. For better performance, the adaptive gate bias control of the peaking amplifier using the power tracking circuit and the shunt capacitors is employed. The measured one‐carrier WCDMA results show an adjacent channel leakage ratio of ?43.2 dBc at ±2.5‐MHz offset with a power added efficiency of 40.1% at an average output power of 37 dBm, which is a 7.5 dB back‐off power from the saturated output power.     

Linearised InGaP/GaAs HBT MMIC power amplifier with active biascircuit for W-CDMA application

A high linearity InGaP/GaAs heterojunction bipolar transistor (HBT) monolithic microwave integrated circuit (MMIC) power amplifier is demonstrated using a new structure for a bias circuit for wideband-code division multiple access (W-CDMA) application. A one shunt capacitor is added to a novel active bias circuit and acts as a lineariser improving input P_{1 dB} of 16 dB and phase distortion of 5.1° for the hybrid phase shift keying (HPSK) modulated signal at the 28 dBm output power; the lineariser showing no significant increase of signal loss and chip area. The two-stage HBT MMIC amplifier exhibits a power-added efficiency (PAE) of 37%, a linear power gain of 24.5 dB, and an output power of 28 dBm with an adjacent channel power ratio (ACPR) of -45 dBc, under a 3 V operation voltage     

应用于移动终端的线性功率放大器设计

设计了一种应用于移动终端的InGaP/GaAs HBT功率放大器。该放大器采用了一种新颖的在片偏置电路技术,不仅避免了由于电源和温度变化导致的直流偏置点的不稳定,而且补偿了由于输入信号增大所引起的动态偏置点的偏离。电流镜结构的偏置电路与反馈电路使偏置电压维持在一个稳定的状态,在反馈电路中引入一个非反相电路加强了电路增益。通过在偏置管的基极并联一个反偏二极管改善了功率放大器的线性。芯片采用基板的封装形式进行测试,改善了功率放大器的散热条件。测试结果表明该放大器具有27.6 dBm的输出压缩点,对于W-CDMA应用,放大器的效率为34.1%,ACPR为-40.3 dBc。     

High efficiency, wide dynamic range variable gain and poweramplifier MMICs for wideband CDMA handsets

A linearized variable gain amplifier (VGA) and a two-stage power amplifier (PA) MMIC were developed for 1.95-GHz wideband CDMA (W-CDMA) handsets application. A complete PA block with power control ability was obtained by cascading the VGA with the PA. The linearized VGA consists of a predistorter (PD) integrated with a conventional VGA, performing dual function for achieving high linearity power control, as well as reducing output distortion level of the following PA. With the use of predistortion, the P_out and power added efficiency (PAE) of the PA block improved from 27.5 dBm and 39.8% to 28.5 dBm and 44.8%, respectively, measured at -35 dBc adjacent channel leakage power ratio (ACPR). Under power control operation, the control range of the PA block increased from 23.6 dB to 31.2 db, and ACPR reduction of over 10 dB was achieved with the use of linearized VGA     

前馈线性化功率放大器设计

采用自适应结合查表控制的前馈技术,设计了用于CDMA2000的超线性功率放大器.在连续波输出功率达到45dBm时,双音IMD3低于-62dBc,用CDMA2000信号测试,其ACPR分别低于-54dB@750kHz和-71dB@1.98MHz.     

一种带功率检测的TD-SCDMA锗硅功率放大器

设计了一个用于TD-SCDMA的锗硅异质结双极晶体管(SiGe HBT)功率放大器。该放大器使用3.3 V电源,内部实现了包括级间匹配网络等的全电路片上集成。对于码分多址环境,功率放大器提供28 dBm的功率输出,实现34.8%的功率附加效率(PAE),另外,在28 dBm的输出功率下,邻道功率泄漏比(ACPR)小于-35 dBc。该功率放大器同时包括动态控制偏置电路和完全集成的功率检测器。     

硅基半导体功放模块邻道干扰特性优化方法

基于硅基半导体器件的功放模块，由于器件本身物理结构特性引起的功放开关时间以及开关时上升沿、下降沿斜率的控制不当，导致调制邻道功率（Modulation of Adjacent Channel Power，ACP）以及瞬态切换邻道功率（Adjacent channel transient power，ACTP）较差，从而引起邻道干扰。针对硅基半导体器件功放模块在数字对讲机中的应用，创造性地提出了一种新的方法，对功放栅极偏置电路优化，从理论上分析和推导出功放开关时间以及开关时上升沿、下降沿斜率对ACP以及ACTP的影响，并在实际应用中通过适当调节对讲机功放模块栅极偏置电路电容以及串联电阻，实现了功放开关的上升沿以及下降沿斜率调节。实验结果表明:该方法在不影响功放输出功率以及效率的前提下，当信道间隔为12.5 kHz时，ACP-60 dBc，ACTP-50 dBc，有效改善了ACP、ACTP的性能，具有一定的实际意义和应用价值。     

ISM频段中功率功率放大器

采用三指单胞的InGaP/GaAsHBT提取的大信号模型参数 ,设计出应用于ISM频段的三级AB类功率放大器 .通过对传统偏置网络的优化 ,消除了小信号下的增益压缩 .在 3 5V电压下 ,该放大器的最大线性输出功率为30dBm ,增益达到 2 9 1dB ,对应的功率附加效率为 4 3 4 % ,临近沟道抑制比达到 - 10 0dBc,而静态偏置电流很低 ,只有 10 9 7mA .     

一种带功率检测和自适应偏置的CDMA功率放大器

设计了一款包含功率检测和自适应线性化偏置电路的CDMA功率放大器,功率检测器能根据输入信号的大小来调整功率管的偏置点,大幅提升低功率输出时的效率,从而提升系统整体效率;自适应线性化偏置能有效抑制功率放大器的增益压缩和相位失真,改善其线性度.采用2 μm InGaP/GaAs HBT晶体管工艺成功流片,测试结果表明,与普...     

ISM频段中功率功率放大器

采用三指单胞的InGaP/GaAs HBT提取的大信号模型参数,设计出应用于ISM频段的三级AB类功率放大器.通过对传统偏置网络的优化,消除了小信号下的增益压缩.在3.5V电压下,该放大器的最大线性输出功率为30dBm,增益达到29.1dB,对应的功率附加效率为43.4%,临近沟道抑制比达到-100dBc,而静态偏置电流很低,只有109.7mA.     

一种电调Doherty功率放大器

提出了一种全新的电调Doherty移动基站功率放大器。该Doherty放大器的载波放大器和峰值放大器的驱动功率分配比及输出合成相位实现了电可调,从而保证了Doherty功率放大器的最佳驱动功率分配比,以及最佳的输出合成相位,同时结合内部线性化技术以实现Doherty功率放大器的最优性能。为保证功率放大器性能的稳定,设计了一种用于Doherty功率放大器的恒静态偏置电路,在-25℃～+50℃的高低温实验中使放大器偏置电流的波动小于5%。功放的工作频率为870～890MHz,增益大于58dB。在CDMA2000信号测试下,输出功率为50.06dBm时,其ACLR(邻道泄漏功率比)小于-47.5dBc,整机效率达42.3%(含驱动级)。     

InGaP/GaAs HBT微波功率放大器的设计

采用模拟退火算法提取出异质结双极晶体管器件的大信号Gum mel- Poon模型参数,利用所提取出的模型参数设计出具有很低静态功耗的190 0 MHz两级AB类功率放大器.该功放的功率增益为2 6 d B,1d B压缩点输出功率为2 8d Bm,对应的功率附加效率和邻近信道功率比分别为38.8%、- 30 .5 d Bc,1d B压缩点处的各阶谐波功率均小于- 4 0 d Bc.