Sb含量对0.96(K_(0.5)Na_(0.5))(Nb_(1–x)Sb_x)O_3-0.04Bi_(0.5)Na_(0.5)ZrO_3无铅压电陶瓷结构与电性能的影响

采用传统固相法制备了0.96(K_(0.5)Na_(0.5))(Nb_(1–x)Sb_x)O_3-0.04Bi_(0.5)Na_(0.5)ZrO_3(0.96KNNS_x-0.04BNZ,x=0,0.01,0.02,0.03,0.04,0.05)无铅压电陶瓷,系统研究了Sb含量对0.96KNNS_x-0.04BNZ压电陶瓷晶相组成、显微结构及压电性能的影响规律。X射线衍射分析结果表明:0.96KNNS_x-0.04BNZ陶瓷具有纯钙钛矿结构,随着Sb含量x的增加,陶瓷从正交-四方两相共存转变为四方相,x≤0.02时在正交-四方两相共存的多型相转变(Polymorphic Phase Transition,PPT)区域。在该PPT区域靠近四方相的边界x=0.02处,陶瓷具有优异的压电性能:压电常数d_(33)=354 p C/N;平面机电耦合系数k_p=43.6%;机械品质因数Q_m=46;相对介电常数ε_r=2100;介电损耗tanδ=2.6%,居里温度t_C=290℃。     

BBC掺杂BSNN-BSZT陶瓷低温烧结性能的研究

采用传统的两步固相反应法制备了一种低温烧结的CuBBiO_4-(Ba_(0.8)Sr_(0.2))(Ni_(1/3)Nb_(2/3))-(Ba_(0.8)Sr_(0.2))(Zr_(0.5)Ti_(0.5))(BBC-BSNN-BSZT)压电陶瓷,并研究了CuBBiO_4(BBC)掺杂量对陶瓷微观形貌、相结构、介电、压电性能和烧结温度的影响。研究结果表明,制备的陶瓷样品为单一的钙钛矿相,未发现其他杂相;掺杂的BBC低熔点化合物在烧结中提供适量液相,促进烧结,样品可在925℃烧结致密。该压电陶瓷材料的居里温度由158℃提升到230℃;当掺杂w(BBC)=0.75%(质量分数)时,陶瓷达到最佳压电性能:压电常数d_(33)=613pC/N,机电耦合系数k_p=0.7,介电常数ε_r=3 926,介电损耗tanδ=0.005 2,品质因数Q_m=70。居里温度T_C=227℃。     

BiYbO3掺杂对KNN LS压电陶瓷微结构与电性能的影响

采用传统陶瓷烧结工艺,制备了BiYbO3掺杂的xBiYbO3-0.95(K05Na0.5)NbO3-0.05LiSbO3(xBY-KNN-LS)(x=0～0.002,摩尔分数)无铅压电陶瓷.研究了BiYbO3掺杂对陶瓷相结构、显微组织和电性能的影响.结果表明,随着BiYbO3掺杂含量的增加,晶粒变细,居里点逐步向低温方向移动,压电性能先增加后降低,介电损耗tan δ先增加后减小.在0≤x≤0.001 5的范围内,存在斜方相与四方相共存的准同型相界,当x=0.1％时得到最佳电性能:压电常数d33=245 pC/N,机电耦合系数kp=44.75％,居里温度Tc =365℃,tan δ=4.5％.     

BiCrO_3掺杂Na_(0.5)K_(0.5)NbO_3压电陶瓷的制备与性能

采用传统固相合成法制备了BiCrO3掺杂Na0.5K0.5NbO3无铅压电陶瓷。借助XRD、SEM等手段对该陶瓷的显微结构与电性能进行了研究。结果表明,当BiCrO3掺杂量为0.2%～1.0%(摩尔分数),样品均为ABO3型钙钛矿结构。当BiCrO3掺杂量为0.4%(摩尔分数)时,所得陶瓷样品具有最优综合电性能,其压电常数d33、机电耦合系数kp、机械品质因素Qm、斜方–四方相变温度tO-T和居里温度tC分别为138pC/N,0.32,30,175℃和410℃。     

KNN-BT-BZ-CT基无铅压电陶瓷的性能研究

采用两步烧结法制备了(0.91-x)K_(0.5)Na_(0.5)NbO_3-0.03BaTiO_3-0.06BaZrO_3-xCaTiO_3[KNN-BT-BZCT]基无铅压电陶瓷,探究了在不同CaTiO_3(CT)含量下,KNN基压电陶瓷相结构变化以及对压电性能的影响。结果表明,x<0.02时,陶瓷物相出现菱方-正交双相共存。随着CT含量的增加,陶瓷晶粒尺寸先减小后增大,且其居里温度(TC)和四方-正交(TO-T)转变温度随之逐渐降低。当x=0.01时,在室温下陶瓷出现菱方-正交准同型相界,其压电常数d33=224pC/N和机电耦合系数kp=40.2%分别达到了最佳。因此,KNN基压电陶瓷中掺入BCZT可以较好地提高其压电性能。     

Li_2O掺杂对BNBT6无铅压电陶瓷组织与性能的影响

采用传统固相烧结法制备出0.94Bi_(0.5)(Na_(1-x)Li_x)_(0.5)TiO_3-0.06BaTiO_3(BNT6)压电陶瓷(摩尔分数x分别为0.06%,0.10%,0.15%,0.20%),研究了不同含量Li_2O掺杂对Bi_(0.5)Na_(0.5)TiO_3(BNT)基陶瓷材料物相结构、显微组织和压电、介电性能的影响。结果表明,添加不同含量的Li_2O,制备的BNBT6压电陶瓷组织分布均匀,致密度高,呈现三方-四方共存的准同型相界结构,且不同含量的Li_2O不影响陶瓷的相结构,但其烧结性能及电性能与Li含量有关。当x=0.15%时,BNBT6陶瓷样品的性能最佳,相对密度达到98%,在1kHz的测试频率下,BNBT6陶瓷样品的压电常数d_(33)=130pC/N,介电常数εr=971,介电损耗tanδ=2.0%,机械品质因数Q_m=367。     

锂掺杂对K0.5Na0.5NbO3无铅压电陶瓷电性能的影响

采用固相法制备了Li掺杂K0.5Na0.5NbO3无铅压电陶瓷,即K0.5Na0.5NbO3+x/2%Li2CO3(KNN-xL)。研究了不同Li摩尔分数(x分别为0,0.25,0.50,0.75,1.00,1.50)样品的物相组成、显微结构及电性能。结果表明,室温下所有样品都具有正交相的钙钛矿结构。随着Li摩尔分数的增加,样品的压电常数d33、平面机电耦合系数kp、机械品质因数Qm及密度ρ都先升高后降低,介电损耗tanδ普遍比未掺杂的低,当x=0.5时综合性能达到最优,即d33=122pC/N,kp=41%,Qm=115,εr=548,tanδ=0.022,ρ=4.32g/cm3。另外正交到四方相变温度逐渐降低,居里温度逐渐升高。     

CeO2 掺杂BNLKT陶瓷的压电性能与微观结构

利用企业的电子陶瓷工艺制备了CeO2掺杂Bi0.5(Na1-x-yLixKy)0.5TiO3无铅压电陶瓷,并研究了CeO2掺杂对该体系陶瓷的介电压电性能与微观结构的影响。X-射线衍射结果表明,掺杂的CeO2扩散进入了Bi0.5(Na1-x-yLixKy)0.5TiO3钙钛矿结构的晶格;SEM观察结果表明,少量的CeO2掺杂可改进该陶瓷的微结构;介电压电性能研究结果表明,CeO2掺杂对该陶瓷体系的综合性能有较大改善,室温下该体系配方的压电常数d33可达199 pC/N,径向机电耦合系数kp达39.3%,同时降低了陶瓷的介电损耗(tanδ=2.0%),提高了其机械品质因数。     

A位取代对PZN-PNN-PZT压电陶瓷性能的影响

以固态氧化物为原料,采用固态合成工艺制备Pb(Zn1/3Nb2/3)O3-Pb(Ni1/3Nb2/3)O3-Pb(ZrTi)O3(PZN-PNN-PZT)压电陶瓷,并研究了锆钛比(r(Zr)/r(Ti))、Ba2+的A位取代及Ba2+、La3+的A位复合取代对压电陶瓷电性能的影响。结果表明,PZN-PNN-PZT压电陶瓷在r(Zr)/r(Ti)=1.03下,进行Ba2+,La3+的A位复合取代后,即式子在Pb0.92Ba0.04La0.04(Ni1/3Nb2/3)y(Zn1/3Nb2/3)z Zrm Tin O3时压电性能最佳,其介电常数εT33/ε0=5 657,压电常数d33=709pC/N,机电耦合系数kp=0.69,品质因数Qm=45,居里温度TC=180.9℃。     

直写成型制备的3-3型PZT压电复合材料及其性能

3-3型压电复合材料在超声波传感器、水下声学检测等领域有着广泛的应用。锆钛酸铅(PZT)陶瓷通过复合有望制备具有低介电常数、低脆性等优点的复合材料。采用直写成型技术制备了PZT三维木堆结构支架,结合浸渍法填充环氧树脂制备了3-3型PZT/环氧树脂压电复合材料。研究了陶瓷相体积分数对3-3型PZT/环氧树脂压电复合材料的介电、压电、铁电性能的影响,并对比了PZT陶瓷支架与PZT/环氧树脂复合材料的介电与压电性能。研究结果表明,随着陶瓷相体积分数的增加,复合材料的介电常数、压电常数及剩余极化强度都会增大,PZT支架具有更大的介电常数、压电常数、压电电压常数;当陶瓷相体积分数为36%时,PZT支架与PZT/环氧树脂的压电电压常数分别达到151.0 mV·m/N与104.0 mV·m/N。PZT/环氧树脂复合材料同时具备了压电陶瓷的硬度、电性能,以及聚合物的柔韧性、低密度等优势,其应用前景良好。     

半导体器件与工艺综合

利用器件与工艺综合的思想,开发出自顶向下的新的器件和工艺设计方法,实现了该设计方法的MOSPAD软件,并利用MOSPAD系统做出了一定的综合结果. 做出了关于器件与工艺综合的两个实例,即对FIB器件的器件综合和对阱形成工艺模块进行的工艺综合,并证明了自顶向下的器件与工艺综合思想的可行性.     

镜像综合孔径毫米波辐射测量灵敏度

镜像综合孔径可利用较少的天线获得地球遥感所需的高空间分辨率,但是镜像综合孔径辐射测量灵敏度尚未得到深入分析。针对该问题,推导了二维镜像综合孔径辐射测量噪声特性,在此基础上,对一维/二维镜像综合孔径测量灵敏度进行了分析,开展了仿真实验,并与常规综合孔径测量灵敏度进行了分析比较。     

Speech synthesis using AM/FM sinusoids and band-pass noise

In the speech synthesis model presented in this paper, voiced speech is synthesized as the sum of sinusoidally modulated two FM sinusoids corresponding to the first and second formants. Each FM signal is generated such that its amplitude is equal to the formant amplitude, its carrier frequency to the formant frequency or its linear combination, its modulation frequency to the pitch, and its modulation index to one fifth of the carrier to modulation frequency ratio. Unvoiced speech is generated by shifting the center frequency of a low-pass noise with a bandwidth of 1 KHz, to the frequency where the energy of the unvoiced speech is concentrated. The drawbacks of this scheme are that the pitch and the formant frequencies of the FM signals may deviate up to 40% and 9%, respectively, and spurious formants may occur. A hardware implementation can be accomplished by driving a linear analog circuitry which can simply be integrated on a single chip, by a digital computer which supplies voltages at every T = 5 ms corresponding to seven parameter values. Examples of the signals and spectrograms of synthesized speech obtained by both synthesis by analysis and synthesis by rule are given along with a set of rules for text-to-speech synthesis of Turkish. It is observed that the speech synthesized by analysis loses the speaker's identity but it is highly intelligible, while understanding the speech synthesized by rules requires a training period.     

PICO-NPA: High-Level Synthesis of Nonprogrammable Hardware Accelerators

The PICO-NPA system automatically synthesizes nonprogrammable accelerators (NPAs) to be used as co-processors for functions expressed as loop nests in C. The NPAs it generates consist of a synchronous array of one or more customized processor datapaths, their controller, local memory, and interfaces. The user, or a design space exploration tool that is a part of the full PICO system, identifies within the application a loop nest to be implemented as an NPA, and indicates the performance required of the NPA by specifying the number of processors and the number of machine cycles that each processor uses per iteration of the inner loop. PICO-NPA emits synthesizable HDL that defines the accelerator at the register transfer level (RTL). The system also modifies the user's application software to make use of the generated accelerator.The main objective of PICO-NPA is to reduce design cost and time, without significantly reducing design quality. Design of an NPA and its support software typically requires one or two weeks using PICO-NPA, which is a many-fold improvement over the industry norm. In addition, PICO-NPA can readily generate a wide-range of implementations with scalable performance from a single specification. In experimental comparison of NPAs of equivalent throughput, PICO-NPA designs are slightly more costly than hand-designed accelerators.Logic synthesis and place-and-route have been performed successfully on PICO-NPA designs, which have achieved high clock rates.     

激光控制反应合成的实验研究

本文把表面工程领域两种先进技术——燃烧合成涂层技术和激光表面熔覆技术结合起来进行研究,旨在使这两种表面处理技术优势互补,获得一种新的表面处理技术——激光控制反应合成表面熔覆技术。在结合实验的基础上,研究了在铝热自蔓延反应2Al+Fe_2O_3=2Fe+Al_2O_3的反应物中添加合适的稀释剂,使此体系无法自蔓延,再通过激光能量的输入来诱发和控制反应合成,从而实现在钢板表面的激光陶瓷熔覆。     

RTL综合中子程序的综合方法

本文论述了RTL综合系统中子程序综合方法,针对以赋值语句为核心的中间数据结构,采取嵌入方式或例示方式进行处理,然后进行格式判别、组合逻辑综合及时序逻辑综合.文章给出具体综合算法,并在最后给出运行实例.     

Incorporating testability considerations in high-level synthesis

In this article we propose two novel methods to improve the testability of the designs produced by high-level synthesis tools. Our first method, loop-breaking algorithm, identifies self-loops in a design generated by a high-level synthesis system and eliminates as many of these loops as possible by altering the register and module bindings. The second method, BINET with test cost, is a binding algorithm that takes the cost of testing into account during the binding phase of the high-level synthesis. The test cost considered in this article is a function of the number of self-loops in the synthesized design. Thus it generates only those solutions that have fewer if any self-loops. Finally we put the two methods together in which we first use BINET with test cost to produce nearly self-loop free designs and we further improve their testability by using the loop-breaking algorithm. We applied these methods to synthesis benchmark circuits and the results of our study, given in this article, show that the designs produced by our method have indeed reduced testability overhead and improved testability.     

Domain–Specific High–Level Modeling and Synthesis for ATM Switch Prototyping

ATM switch, the core technology of an ATM networking system, is one of the major products in Fujitsu telecommunication business. However, current gate–level design methodology can no longer satisfy its stringent time–to–market requirement. It becomes necessary to exploit high–level methodology to specify and synthesize the design at an abstraction level higher than logic gates. This paper presents our prototyping experience on domain–specific high–level modeling and synthesis for Fujitsu ATM switch design. We propose a high–level design methodology using VHDL, where ATM switch architectural features are considered during behavior modeling, and a high–level synthesis compiler, MEBS, is prototyped to synthesize the behavior model down to a gate–level implementation. Since the specific ATM switch architecture is incorporated into both modeling and synthesis phases, a high–quality design is efficiently derived. The synthesis results shows that given the design constraints, the proposed high–level design methodology can produce a gate–level implementation by MEBS with about 15 percent area reduction in shorter design cycle when compared with manual design.     

微波双工器电路综合

近年微波滤波器多项式综合技被广泛用于微波滤波器的设计,将此技术由双端口网络推广至三端口网络可以实现微波双工器的综合。根据微波网络技术,可以推导得到微波双工器电路等效y参数与S参数的关系,进而得到微波双工器散射参数s11,s21,s31与两个通道单通带微波滤波器散射参数s11,s21的关系。应用推广后的微波双工器电路综合技术可以实现微波双工器的精确、快速综合。经过对比发现,微波双工器多项式综合结果与微波双工器电路建模仿真响应吻合度很好。