The performance of GaAs power MESFET’s using backside copper metallization

The performance of GaAs power MESFET’s using backside copper metallization has been evaluated. 10 nm Ta metal was used as the diffusion barrier between GaAs and Cu for copper film metallization in this study. Microstructural characterization shows that the Cu/Ta films with GaAs remained stable up to 400 °C, indicating that Ta is a good diffusion barrier for Cu in GaAs MESFET’s. A copper metallized 6 mm power MESFET was thermal stressed to test the device stability. After annealing at 200 °C for 3 h, the devices showed very little degradation in power performance, and the thermal resistance of the device was 65 °C mm/W with 1.4 W/mm DC input power. Results in this study demonstrate that the feasibility of using Cu/Ta films for the backside metallization of GaAs power devices with stable electrical and thermal characteristics.     

Use of WN/sub X/ as the diffusion barrier for interconnect copper metallization of InGaP-GaAs HBTs

Use of WN/sub X/ as the diffusion barrier for interconnect copper metallization of InGaP-GaAs heterojunction bipolar transistors (HBTs) was studied. The WN/sub X/ (40 nm) and Cu (400 nm) films were deposited sequentially on the InGaP-GaAs HBT wafers as the diffusion barrier and interconnect metallization layer, respectively, using the sputtering method. As judged from the data of scanning electron microscopy, X-ray diffraction, Auger electron spectroscopy, and sheet resistance, the Cu--WN/sub X/--SiN and Cu--WN/sub X/--Au structures were very stable up to 550/spl deg/C and 400/spl deg/C annealing, respectively. Current accelerated stress test was conducted on the Cu--WN/sub X/ metallized HBTs with V/sub CE/=2 V, J/sub C/=140 kA/cm/sup 2/ and stressed for 55 h, the current gain (/spl beta/) of these HBTs showed no degradation and was still higher than 100 after the stress test. The Cu--WN/sub X/ metallized HBTs were also thermally annealed at 250/spl deg/C for 25 h and showed no degradation in the device characteristics after the annealing. For comparison, HBTs with Au interconnect metallization were also processed, and these two kinds of devices showed similar characteristics after the stress tests. From these results, it is demonstrated that WN/sub X/ is a good diffusion barrier for the interconnection copper metallization of GaAs HBTs.     

Cu contact on NiSi substrate with a Ta/TaN barrier stack

The thermal and electrical stabilities of Cu contact on NiSi substrate with and without a Ta/TaN barrier stack in between were investigated. Four-point probe (FPP), X-ray diffraction (XRD), scanning electron microscopy (SEM), depth-profiling X-ray photoelectron spectroscopy (XPS), and Schottky barrier height (SBH) measurement were carried out to characterize the diffusion barrier properties. The SBH measurement provides a very sensitive method to characterize the diffusion barrier properties for the copper contact on NiSi/Si. The results show that the Ta/TaN stack can be both thermally and electrically stable after annealing at 450 °C for 30 min and it will have a potential application as a diffusion barrier for Cu contact on NiSi.     

超薄Ru/TaN双层薄膜作为无籽晶铜互连扩散阻挡层

研究了钌（Ru) /氮化钽（TaN）双层结构对铜的扩散阻挡特性，在Si (100）衬底上用离子束溅射的方法沉积了超薄Ru/TaN以及Cu/Ru/TaN薄膜，在高纯氮气保护下对样品进行快速热退火，用X射线衍射、四探针以及电流-时间测试等表征手段研究了Ru/TaN双层结构薄膜的热稳定性和对铜的扩散阻挡特性. 同时还对Ru/TaN结构上的铜进行了直接电镀. 实验结果表明Ru/TaN双层结构具有优良的热稳定性和扩散阻挡特性,在无籽晶铜互连工艺中有较好的应用前景.     

Evaluation of DC-sputtered Glassy TaCoN Thin Film for Copper Metallization

The failure mechanism of the TaCoN barrier for copper metallization was examined using films by direct current (dc) magnetron reactive sputtering at various nitrogen flow rates. The as-deposited TaCoN films had a glassy structure and were free from intermetallic compounds. Optimizing the nitrogen flow rate during sputtering maximized the thermal stability of the Si/Ta_66.8Co_11.4N_21.8/Cu metallization system up to an annealing temperature of 750°C when the film was deposited using a nitrogen flow rate of 1 sccm, as revealed by using X-ray diffraction, a scanning electron microscope, a four-point probe and a transmission electron microscope. Structural analysis indicated that the failure mechanisms of the studied Si/TaCoN/Cu stacked films involved the initial dissociation of the barrier layer that was annealed at a specific temperature, and the subsequent formation of diffusion paths along which the copper penetrates through the TaCoN barrier layer to react with underlying Si. The high formation temperature of the Cu₃Si phase demonstrated that the studied film was highly stable, indicating that the TaCoN thin film is highly promising for use as a diffusion barrier for Cu metallization.     

A new GaAs technology for stable FETs at 300°C

A technology for the fabrication of GaAs devices for operation at 300°C is presented. The high reliability of the devices is mainly due to diffusion barrier of WSi₂ in the ohmic contacts and to an optimized Si₃N₄ passivation. It is shown that MESFETs produced with this technology demonstrate a remarkable stability of their characteristics, even after 100 h of storage at 300°C, and only a little degradation after 100 h at 400°C     

Cu contact on NiSi/Si with thin Ru/TaN barrier

Thin Ru(5 nm)/TaN(15 nm) bi-layer was sputtered on the NiSi/Si substrate as a diffusion barrier in the copper contact structure. The barrier properties were investigated through X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), transmission electron microscopy (TEM), energy dispersive X-ray (EDX) and electrical measurement. The whole Cu/Ru/TaN/NiSi/Si structure has a good thermal stability until after annealing at 450 °C. The Schottky barrier measurement shows that the leakage current increases after 450 °C annealing and after 500 °C annealing the barrier fails. Failure mechanism of the barrier stack is discussed.     

Barrier layer thickness analysis for reliable copper plug process in CMOS technology

Copper (Cu) replacing conventional tungsten (W) based 1st contact plug has become necessary for high performance CMOS. For a reliable and well optimized Cu plug, process selection and integration of plug diffusion barrier is an important task. In this work, we investigate barriers for Cu plug technology for CMOS process. Single layer TaN and bi-layer Ta + TaN barrier materials were studied for their effectiveness in preventing Cu diffusion into device active regions for backend thermal stress conditions. The degradation of device characteristics was used as monitor of robustness of barrier reliability. Diffusion of Cu in multilayer plug structure is modeled to explain observed stress behavior. From the model studies, the critical barrier layer thickness needed to prevent Cu diffusion is determined. We show than that a ∼7 nm sidewall barrier is effective in preventing Cu diffusion into Si at up to 350 °C/60 min only, while a minimum thickness of ∼10 nm is needed for blocking copper diffusion at 420 °C/30 min. Using multilayer Cu diffusion model, an optimized process window for reliable, low contact resistance Cu plug technology for CMOS process can be obtained.     

不同氮氩比制备的W-Si-N薄膜的阻挡特性研究

研究了薄膜沉积条件之一——氮气和氩气流量比对超薄(10nm)W-Si-N薄膜作为铜扩散阻挡层的阻挡特性的影响。用薄层电阻、俄歇电子能谱(AES)、X射线衍射谱(XRD)、电容-电压(C-V)等方法系统研究了氮氩比对W-Si-N、Cu/W-Si-N/Si以及Cu/W-Si-N/SiO2/Si结构的热稳定性、电学稳定性的影响。实验发现,W-Si-N薄膜中氮含量对材料的阻挡特性起重要作用,高的氮氩比使薄膜中氮含量增高,薄膜对Cu的扩散阻挡特性增强。     

Crystallization and failure behavior of Ta-TM (TM=Fe, Co) nanostructured/amorphous diffusion barriers for copper metallization

This work examined the thin-film properties and diffusion barrier behavior of sputtered Ta-TM (TM=Fe, Co) films, aiming at depositing a highly crystallization-resistant and conductive diffusion barrier film for Cu metallization. Four-point probe measurement, x-ray diffraction (XRD), scanning electron microscopy (SEM), transmission electron microscopy (TEM), and a secondary ion mass spectrometer (SIMS) were used to examine the barrier properties. Structural examination indicated that intermetallic-compound-free amorphous Ta-TM films were obtained by magnetron sputtering, thus giving a resistivity of 146.82 μΩ-cm and 247.01 μΩ-cm for Ta_0.5Fe_0.5 and Ta_0.5Co_0.5 films, respectively. The Si/Ta_0.5Fe_0.5/Cu and Si/Ta_0.5Co_0.5/Cu stacked samples were observed to fail completely at temperature above 650°C and 700°C because of the formation of Cu₃Si protrusions between silicon and the Ta-TM interface. Ta_0.5Co_0.5 is thus superior to Ta_0.5Fe_0.5 in preventing copper from diffusion. Highly thermally stabilized amorphous Ta-TM thin film can thus be potentially adopted as a diffusion barrier for Cu metallization.     

Study of Ti/W/Cu,Ti/Co/Cu,and Ti/Mo/Cu multilayer structures as schottky metals for GaAs diodes

Schottky structures with copper and refractory metals as diffusion barrier for GaAs Schottky diodes were evaluated. These structures have lower series resistances than the conventionally used Ti/Pt/Au structure. Based on the electrical and material characteristics, the Ti/W/Cu and Ti/Mo/Cu Schottky structures are thermally stable up to 400°C; the Ti/Co/Cu Schottky structure is thermally stable up to 300°C. Overall, the copper-metallized Schottky structures have excellent electrical characteristics and thermal stability, and can be used as the Schottky metals for GaAs devices.     

Integrity of copper–hafnium,hafnium nitride and multilayered amorphous-like hafnium nitride metallization under various thickness

The barrier properties and failure mechanism of sputtered Hf, HfN and multilayered HfN/HfN thin films were studied for the application as a Cu diffusion barrier in metallization schemes. The barrier capability and thermal stability of Hf, HfN and HfN/HfN films were determined using X-ray diffraction (XRD), leakage current density, sheet resistance (R_s) and cross-sectional transmission electron microscopy (XTEM). The thin multi-amorphous-like HfN thin film (10 nm) possesses the best barrier capability than Hf (50 nm) and amorphous-like HfN (50 nm). Nitrogen incorporated Hf films possess better barrier performance than sputtered Hf films. The Cu/Hf/n⁺–p junction diodes with the Hf barrier of 50 nm thickness were able to sustain a 30-min thermal annealing at temperature up to 500 °C. Copper silicide forms after annealing. The Hf barrier fails due to the reaction of Cu and the Hf barrier, in which Cu atoms penetrate into the Si substrate after annealing at high temperature. The thermal stabilities of Cu/Hf/n⁺–p junction diodes are enhanced by nitrogen incorporation. Nitrogen incorporated Hf (HfN, 50 nm) diffusion barriers retained the integrity of junction diodes up to 550 °C with lower leakage current densities. Multilayered amorphous-like HfN (10 nm) barriers also retained the integrity of junction diodes up to 550 °C even if the thickness is thin. No copper–hafnium and copper silicide compounds are found. Nitrogen incorporated hafnium diffusion barrier can suppress the formation of copper–hafnium compounds and copper penetration, and thus improve the thermal stability of barrier layer. Diffusion resistance of nitrogen-incorporated Hf barrier is more effective. In all characterization techniques, nitrogen in the film, inducing the microstructure variation appears to play an important role in thermal stability and resistance against Cu diffusion. Amorphousization effects of nitrogen variation are believed to be capable of lengthening grain structures to alleviate Cu diffusion effectively. In addition, a thin multilayered amorphous-like HfN film not only has lengthening grain structures to alleviate Cu diffusion, but block and discontinue fast diffusion paths as well. Hence, a thin multilayered amorphous-like HfN/HfN barrier shows the excellent barrier property to suppress the formation of high resistance η′-(Cu,Si) compound phase to 700 °C.     

The effect of sputtered W-based carbide diffusion barriers on the thermal stability and void formation in copper thin films

The W-based diffusion barriers W, WC and WCN barriers were investigated for Cu metallization. The thermal stability of the W, WC and WCN barriers was compared by X-ray diffraction and four point probe. It shows comparable stability for the W and WC barriers while the ternary WCN barrier has superior performance. The agglomeration of the Cu films (100 nm) on these barriers is quite different. The formation of voids was observed for the annealed copper film on the WC or WCN barriers and the activation energy values determined from Kissinger equation are low comparing with Cu on W barrier. Twins were also observed in the as-deposited and annealed Cu films on the WC and WCN barriers. The twin formation and its correlation with void formation for Cu films onto the C-containing diffusion barrier were discussed through the stress relaxation and stress-induced vacancy migration mechanism.     

Evaluation of a copper metallization process and the electricalcharacteristics of copper-interconnected quarter-micron CMOS

Copper metallization was applied to quarter-micron CMOS circuits using copper chemical vapor deposition (CVD) and chemical mechanical polishing (CMP). Both the metallization process and the electrical characteristics of CMOS devices/circuits were evaluated. Process-induced metal contamination on both sides of the wafer were quantitatively evaluated and reduced to about of 10¹¹ atoms/cm² by using an optimized cleaning sequence. The ability of borophosphosilicate-glass (BPSG) to act as a copper diffusion barrier was discovered and the ability of TiN to do so was also confirmed. Electrical characteristics of n and p MOSFET's with copper interconnections were stable even after annealing at 550°C. The leakage current of the pn junction, capacitance-voltage characteristics and time-dependent dielectric breakdown characteristics of the MOS diode indicate that the copper metallization process did not deteriorate the pn junction and the gate oxide. Normal operation of a 53-stage quarter-micron CMOS inverter ring oscillator with copper metallization was successfully achieved     

Novel Cu/Cr/Ge/Pd Ohmic Contacts on Highly Doped n-GaAs

The thermal stability of the Cu/Cr/Ge/Pd/n⁺-GaAs contact structure was evaluated. In this structure, a thin 40 nm layer of chromium was deposited as a diffusion barrier to block copper diffusion into GaAs. After thermal annealing at 350°C, the specific contact resistance of the copper-based ohmic contact Cu/Cr/Ge/Pd was measured to be (5.1 ± 0.6) × 10⁻⁷ Ω cm². Diffusion behaviors of these films at different annealing temperatures were characterized by metal sheet resistance, X-ray diffraction data, Auger electron spectroscopy, and transmission electron microscopy. The Cu/Cr/Ge/Pd contact structure was very stable after 350°C annealing. However, after 400°C annealing, the reaction of copper with the underlying layers started to occur and formed Cu₃Ga, Cu₃As, Cu₉Ga₄, and Ge₃Cu phases due to interfacial instability and copper diffusion.     

High-temperature stability of refractory-metal VLSI GaAs MESFETs

Commercially available, self-aligned VLSI GaAs MESFETs, with tungsten-based refractory-metal Schottky gates, nickel-based refractory-metal ohmic contacts, and aluminum interconnection metallization, have been thermally cycled and shown to be stable after 3 h at temperatures up to 500°C. Both partially processed and fully processed wafers were found to be stable with no significant change occurring in either Schottky gate or ohmic contact properties. An increase in the channel resistance component of the series resistance is believed to be responsible for I_DS and g_m degradation above 500°C. The fact that commercially available, gold-free VLSI GaAs MESFETs are able to withstand such thermal cycles has very important consequences for monolithic optoelectronic integrated circuit (OEIC) fabrication because it means that it may now be feasible to grow photonic device heterostructures epitaxially on MESFET VLSI wafers; process them into lasers, modulators, and/or detectors; and interconnect them with the electronics to produce VLSI-density OEICs     

Copper-Airbridged Low-Noise GaAs PHEMT With$hboxTi/hboxWN_x/hboxTi$Diffusion Barrier for High-Frequency Applications

A GaAs pseudomorphic HEMT (PHEMT) with Cu-metallized interconnects was successfully developed. Sputtered$hboxWN_x$was used as the diffusion barrier and Ti was used as the adhesion layer to improve the adhesion between$hboxWN_x/hboxCu$interface in the thin-metal structure. After copper metallization, the PHEMTs were passivated with silicon nitride to avoid copper oxidation. The Cu-airbridged PHEMT showed the saturation$I_ DS$was 250 mA/mm and the$g_m$was 456 mS/mm. The Ti adhesion layer plays a significant role on the$g_m$and$V_p$uniformity of the Cu-metallized PHEMTs. The GaAs PHEMTs with$hboxTi/hboxWN_x/hboxTi/Cu$multilayer have better noise figure and associated gain than those of the devices without the Ti adhesion layer. The fabricated Cu-metallized GaAs PHEMT with$hboxTi/hboxWN_x/hboxTi/Cu$multilayer has a noise figure of 0.76 dB and an associated gain of 8.8 dB at 16 GHz. The cutoff frequency$(f_T)$is 70 GHz when biased at$V_ DS = hbox1.5 V$. These results show that the$hboxTi/hboxWN_x/hboxTi$multilayer can serve as a good diffusion barrier for Cu metallization process of airbridge interconnects on GaAs lownoise PHEMTs.     

Bottom‐Up Engineering of Subnanometer Copper Diffusion Barriers Using NH2‐Derived Self‐Assembled Monolayers

A 3‐aminopropyltrimethoxysilane‐derived self‐assembled monolayer (NH₂SAM) is investigated as a barrier against copper diffusion for application in back‐end‐of‐line (BEOL) technology. The essential characteristics studied include thermal stability to BEOL processing, inhibition of copper diffusion, and adhesion to both the underlying SiO₂ dielectric substrate and the Cu over‐layer. Time‐of‐flight secondary ion mass spectrometry and X‐ray spectroscopy (XPS) analysis reveal that the copper over‐layer closes at 1–2‐nm thickness, comparable with the 1.3‐nm closure of state‐of‐the‐art Ta/TaN Cu diffusion barriers. That the NH₂SAM remains intact upon Cu deposition and subsequent annealing is unambiguously revealed by energy‐filtered transmission electron microscopy supported by XPS. The SAM forms a well‐defined carbon‐rich interface with the Cu over‐layer and electron energy loss spectroscopy shows no evidence of Cu penetration into the SAM. Interestingly, the adhesion of the Cu/NH₂SAM/SiO₂ system increases with annealing temperature up to 7.2 J m^?2 at 400 °C, comparable to Ta/TaN (7.5 J m^?2 at room temperature). The corresponding fracture analysis shows that when failure does occur it is located at the Cu/SAM interface. Overall, these results demonstrate that NH₂SAM is a suitable candidate for subnanometer‐scale diffusion barrier application in a selective coating for copper advanced interconnects.     

Study of diffusion barrier properties of ionized metal plasma (IMP) deposited TaN between Cu and SiO2

The diffusion barrier properties of IMP deposited TaN between Cu and SiO₂ have been investigated in the Cu (200 nm)/TaN (30 nm)/SiO₂ (250 nm)/Si multi-layer structure. The IMP-TaN thin film shows better Cu diffusion barrier properties than chemical vapor deposition (CVD) and conventional physical vapor deposition (PVD) deposited TaN films. The thermal stability was evaluated by electrical measurement and X-ray diffraction (XRD) analysis. As a main part of thermal stability studies, the atomic intermixing, new compound formation and phase transitions in the test structure were also studied. Furthermore, a failure mechanism was also examined by X-ray diffraction (XRD), scanning electron microscopy (SEM), atomic force microscopy (AFM), secondary ion mass spectroscopy (SIMS) and Rutherford backscattering spectroscopy (RBS) in conjunction with electrical measurements. The 30 nm thick IMP-TaN was found to be stable up to 800°C for 35 min.     

Electroless CoWP as a Diffusion Barrier between Electroless Copper and Silicon

In this work, an electroless CoWP film deposited on a silicon substrate as a diffusion barrier for electroless Cu and silicon has been studied. Four different Cu 120 nm/CoWP/Si stacked samples with 30, 60, 75, and 100 nm electroless CoWP films were prepared and annealed in a rapid thermal annealing (RTA) furnace at 300°C to 800°C for 5 min. The failure behavior of the electroless CoWP film in the Cu/CoWP/Si sample and the effect of CoWP film thickness on the diffusion barrier properties have been investigated by transmission electron microscopy (TEM), scanning electron microscopy (SEM), X-ray diffraction (XRD), and sheet resistance measurements. The composition of the electroless CoWP films was 89.4 at.% Co, 2.4 at.% W, and 8.2 at.% P, as determined by energy dispersive X-ray spectrometer (EDS). A 30 nm electroless CoWP film can prevent copper penetration up to 500°C, and a 75 nm electroless CoWP film can survive at least up to 600°C. Therefore, increasing the thickness of electroless CoWP films effectively increases the failure temperature of the Cu/CoWP/Si samples. The observations of SEM and TEM show that interdiffusion of the copper and cobalt causes the failure of the electroless CoWP diffusion barriers in Cu/CoWP/Si during thermal annealing.