Delay Optimized Architecture for On-Chip Communication

Networks-on-chip （NoC）, a new system on chip （SoC） paradigm, has become a great focus of research by many groups during the last few years. Among all the NoC architectures that have been proposed until now, 2D-Mesh has proved to be the best architecture for implementation due to its regular and simple interconnection structure. In this paper, we propose a new interconnect architecture called 2D-diagonal mesh （2DDgl-Mesh） for on-chip communication. The 2DDglMesh is almost similar to traditional 2D-Mesh in aspects of cost, area, and implementation, but it can outperform the later in delay. The both architectures are compared by using NS-2 （a network simulator） and CINS1M （a component based interconnection simulator） under the same traffic models and parametric conditions. The results of comparison show that under the proposed architecture, the packets can almost always be routed to their destinations in less time. In addition, our archi- tecture can sometimes perform better than 2D-Mesh in drop ratio for special fixed traffic models.     

Delay Optimized Architecture for On-Chip Communication

Networks-on-chip (NoC), a new system on chip (SoC) paradigm, has become a great focus of research by many groups during the last few years. Among all the NoC architectures that have been proposed until now, 2D-Mesh has proved to be the best architecture for implementation due to its regular and simple interconnection structure. In this paper, we propose a new interconnect architecture called 2D-diagonal mesh (2DDgl-Mesh) for on-chip communication. The 2DDglMesh is almost similar to traditional 2D-Mesh in aspects of cost, area, and implementation, but it can outperform the later in delay. The both architectures are compared by using NS-2 (a network simulator) and CINSIM (a component based interconnection simulator) under the same traffic models and parametric conditions. The results of comparison show that under the proposed architecture, the packets can almost always be routed to their destinations in less time. In addition, our architecture can sometimes perform better than 2D-Mesh in drop ratio for special fixed traffic models.     

Detector Time Delay in Band-Limited Systems

The effect of the integration interval in an integrate and dump detector in a band-limited system is analyzed. It is found for optimum performance that the interval must be delayed by τ seconds, which can be approximated by finding the interval giving maximum area under the system pulse response.     

超宽带通信的正交正弦相关接收方法

超宽带通信中,实现窄于Ins的脉冲信号的准确接收是个很大的挑战。目前很多文献都是采用匹配滤波器的方法进行接收,并在此基础上分析性能。但由于匹配滤波器输出的相关峰的宽度太窄,因而系统对定时抖动较为敏感。定时偏差较大时,接收性能将急剧下降。而且对各路随机定时的多径信号进行相关接收也是一个很大的难题。该文提出一种新的超宽带脉冲接收方法,该方法允许较大的定时偏差,并且能够提供多路随机定时的相关模板,同时接收信噪比的损失被控制在一个可接受的水平。     

Optimum FIR Transmitter and Receiver Filters for Data Transmission Over Band-Limited Channels

The paper deals with the design of digital transmitter and receiver filters with finite impulse response (FIR) for data transmission over band-limited channels. The filters are matched and satisfy a zero intersymbol interference constraint when cascaded. For baseband transmission, the filters achieve optimum spectral concentration in the frequency range[-(1+beta)/2T, (1+beta)/2T]. Mathematically, the filter design leads to a generalized eigenvalue problem which is solved numerically by a projected gradient Procedure. For transmission over bandpass channels by combined amplitude and phase modulation, the design technique is modified so that filters with complex-valued impulse response and optimum spectral concentration in the range of positive bandpass frequencies[f_{c} - (1+beta)/2T, f_{c} + (1+beta)/2T]are obtained. In addition, the complex formulation allows the design of impulse responses with enhanced spectral attenuation in the corresponding range of negative frequencies in order to minimize imageband interference. Results are shown in terms of filter coefficients, signal spectra, and spectral concentrations obtained. For example, filters designed for a voiceband data modem operating at a symbol rate of 2400 baud achieve a spectral concentration of 98.5 percent with 24 coefficients andbeta = 0.1, and with only 0.001 percent of the total energy in the imageband region.     

无信号内干扰的相关延迟键控混沌通信方案

该文提出一种名为无信号内干扰相关延迟键控(Correlation-Delay-Shift-Keying with No Intrasignal Interference, CDSK-NII)的新型混沌通信方案。采用重复混沌序列为参考信号,同时利用零和序列确保参考信号与信息信号严格正交,CDSK-NII能够在解调过程中消除信号内干扰。在高斯白噪声信道和Rayleigh衰落信道中分析CDSK-NII的比特误码率。实验结果表明：由于无信号内干扰,CDSK-NII的比特误码率低于CDSK和通用相关延迟键控(GCDSK);随着复帧长度的增加,CDSK-NII的性能将进一步提升,比特误码率低于参考自适应相关延迟键控(RA-CDSK)。     

Flexible Digital Receiver Architecture with Optimized Components

Future wireless communication systems require increased flexibility, lower power consumption, smaller size and decreasing costs for the terminals and therewith for the components. By replacing analogue by digital signal processing the degree of integration and the flexibility of a terminal with respect to multi-mode capability can be improved.In a highly integrated implementation the most critical components are the A/D-converter and the digital filter stages due to high speed and low power requirements. In this contribution a novel concept for a flexible, digital receiver with highly optimized components will be presented. The concept is based on down-conversion of the broadband receive signal to a low intermediate frequency. The main modules of the receiver are a properly designed ΔΣ-modulator for A/D-conversion, and novel digital filtering stages. It will be demonstrated, that the use of cascaded low-order wave digital lattice filters results in a number of advantages and makes a very efficient realization in VLSI-technology feasible.     

一种多基准接收机条件下的载波相位差分报文优化生成方法

实时动态相对定位(RTK)以其精度高的特点广泛适应于精密 RTK 测绘和高精度导航等领域。为了保证系统的完好性,基准站设置多台基准接收机,因此需要选取状态最优的基准接收机用于 RTK 定位的基准。在多基准接收机条件下,本文提出了完好性算法结合残差以及多基准优选的方法生成 RTK 报文,优选出状态最好的基准接收机,确保播发的报文数据质量高且卫星数多。该方法经过多次故障加注试验,验证了该方法能够优选出综合状态最佳的基准接收机作为基准,从而保证移动站的定位精度和定位成功率。     

Optimized Delay Diversity for Suboptimum Equalization

The optimization of delay diversity (DD) for linear equalization (LE) and decision-feedback equalization (DFE) is presented. The general case of transmission over a correlated multiple-input–multiple-output frequency-selective fading channel is considered. The proposed optimization requires the knowledge of the statistical properties of the wireless channel at the transmitter, but channel state information is only required at the receiver side. Based on an approximation of the bit error rate for LE and DFE, a stochastic gradient algorithm for optimization of the DD transmit filters is derived. Simulation results for the Global System for Mobile Communications (GSM)/Enhanced Data Rates for GSM Evolution system show significant performance gains of the proposed optimized DD scheme over the DD schemes reported by Gore (Proc. IEEE Inter. Conf. Commun., 2002) and Hehn (IEEE Trans. Wireless Commun., vol. 4, p. 2289, 2005) if LE and DFE are used at the receiver.     

基于循环相关的时延估计方法研究

该文研究了低频通信中的时延估计问题。考虑在低频信道大气噪声干扰的条件下,对接收信号进行削波处理后,采用循环相关法进行多径时延估计。经过削波处理,该方法能准确地估计出低频通信的时延,并且其性能优于广义相关法。该文最后的计算机仿真结果验证了文中的结论。     

一种优化的射频接收前端电路

介绍了一种直接混频的无线局域网802.11b接收机前端电路。在考虑输入寄生的前提下,对射频输入端的阻抗匹配和噪声性能进行了优化;提出了一种适合低电源电压工作的新混频器结构;整个接收前端电路采用直流耦合的方式,增加一个负反馈低通滤波器,以消除直流偏差,减少低频噪声。电路采用SMIC 0.18μm CMOS工艺,仿真结果显示,整个接收机的噪声系数为5.2 dB,输入三阶交调IIP3为-14.5 dBm。1.8 V电源电压下,功耗为100 mW左右。     

Receiver Performance for Heterodyne Optical Communication

A model for the heterodyne optical channel that is consistent with experimental observations is introduced, and a general maximum-likelihood sequence estimation receiver that accounts for laser phase instabilities is proposed using the generalized log-likelihood functional. The performance of various suboptimal "estimator-correlator" receivers, obtained from optimal, nonimplementable receiver equations, is studied by simulation and compared to that of an incoherent receiver for practical parameter values. It is observed that, for hard decisions, the proposed receiver performs significantly better than an incoherent receiver for bit intervals larger than about half the coherence time of the laser oscillators, with larger gains to be expected when soft decisions on long sequences are made. A way of reducing the complexity of the soft-decisions receiver for long sequences is discussed.     

全数字突发信号接收机实现

突发通信具有环境噪声大,突发帧短等特点,常规的解调器不能满足要求,文中提出了一种全数字突发信号实现方案,以并行进行位同步,载波同步等加快捕获速度.通过在Xilinx的FPGA上实现,并经工程测试表明,该接收机具有高速传输、捕获速度快等特点,适合高速突发通信场合使用.     

Performance Assessment of Band-Limited Limiting and Blanking Communication Systems

This paper presents a general formulation of piecewise linear (PWL) models of voltage transfer functions to characterize channel nonlinearities in satellite digital communication systems. This formulation provides a tractable approach to evaluate the performance of such systems with band-limited PWL limiters, channel blanking, and hardlimiters. The envelope characteristics of the PWL models are derived in terms of breakpoints and slopes of PWL segments. Intermodulation (IM) products, their statistical properties, and the resultant error probability performance of such BPSK systems, subject to CW interference, are numerically illustrated through these PWL models.     

Design of Multigigabit-per-Second Transceiver for Band-Limited High-Speed Data Communication Using DC-Free Signaling

This paper presents a 5-Gb/s transceiver for ac-coupled interconnects using dc-free signaling based on symbol-rate-carrier offset quadrature phase-shift-keying modulation. A modified Costas loop for the clock and data recovery is also proposed to perform the receiver function. Without the need of an encoding scheme for dc balance, the proposed modulation can be used in high-speed ac-coupled high-speed interconnect systems. The theory and analysis of the proposed dc-free signaling are discussed in this paper. The fully integrated transmitter and the receiver are implemented using a 0.18-$mu$ m CMOS technology.      

信道化侦察接收机优化设计

微波电路非线性特性产生的虚假响应将影响信道化侦察接收机的动态范围。分析了信道化接收机产生虚似响应的机理以及虚似响应的频率和幅度特性,通过自动化测试获取混频器高阶非线性参数,以此为依据优化设计接收机的参数。实际设计的信道化接收机无虚假动态范围大于90 dB。     

卫星通信链路优化设计

对于卫星通信系统来说，其空间段的成本是系统运营过程中的主要开销，如何更加有效地使用卫星转发器，有效地降低地面设备成本．提高系统工作的可靠性，使系统简单易用，是卫星通信系统设计中最重要的工作。保证空间段资源高效利用和尽可能地减小天线口径／高功率放大器的输出功率．是保证系统性价比的两个重要设计原则。     

Adaptive Receiver for Digital Communication Over HF Channels

The fading characteristics of the HF channel make communication over this channel difficult, even at moderate data rates. In this correspondence, a practical communication system is presented which has a near-optimal receiver for data detection and adaptive optimization of the receiver to channel parameters. The channel tracking is performed during the training sequence as well as during the detected data sequence. The receiver is fast converging, therefore suitable for frequency hopping. The correspondence presents the performance obtained on fading HF channels and the computational complexity via comparisons to previously published results. The performance is shown to be superior at comparable computational complexity.     

A CMOS Ultra-Wideband Receiver for Low Data-Rate Communication

A low-power impulse-radio ultra-wideband receiver is demonstrated for low data-rate applications. A topology selection study demonstrates that the quadrature analog correlation is a good receiver architecture choice when energy consumption must be minimized. The receiver operates in the 3.1-5 GHz band of the UWB FCC spectrum mask on channels of 500 MHz bandwidth. The pulse correlation operation is done in the analog domain in order to reduce the ADC sampling speed down to the pulse repetition rate, thereby reducing the power consumption. The receiver comprises a low-noise amplifier with full on-chip matching network, an RF local oscillator generation, two quadrature mixers, two analog baseband chains followed by two ADCs, and a clock generation network. The receiver is implemented in 0.18 mum CMOS technology and achieves 16 mA power consumption at 20 Mpulses/s pulse repetition rate.