Printed and Electrochemically Gated,High‐Mobility,Inorganic Oxide Nanoparticle FETs and Their Suitability for High‐Frequency Applications

Solution‐processed or printed n‐channel field‐effect transistors (FETs) with high performance are not reported very often in the literature due to the scarcity of high‐mobility n‐type organic semiconductors. On the other hand, low‐temperature processed n‐channel metal oxide semiconductor (NMOS) transistors from electron conducting inorganic‐oxide nanoparticles show reduced‐performance and low mobility because of large channel roughness at the channel‐dielectric interface. Here, a method to produce ink‐jet printed high performance NMOS transistor devices using inorganic‐oxide nanoparticles as the transistor channel in combination with a 3D electrochemical gating (EG) via printed composite solid polymer electrolytes is presented. The printed FETs produced show a device mobility value in excess of 5 cm² V^?1 s^?1, even though the root mean square (RMS) roughness of the nanoparticulate channel exceeds 15 nm. Extensive studies on the frequency dependent polarizability of composite polymer electrolyte capacitors show that the maximum attainable speed in such printed, long channel transistors is not limited by the ionic conductivity of the electrolytes. Therefore, the approach of combining printable, high‐quality oxide nanoparticles and the composite solid polymer electrolytes, offers the possibility to fully utilize the large mobility of oxide semiconductors to build all‐printed and high‐speed devices. The high polarizability of printable polymer electrolytes brings down the drive voltages to ≤1 V, making such FETs well‐suited for low‐power, battery compatible circuitry.     

Polymer Field‐Effect Transistors Fabricated by the Sequential Gravure Printing of Polythiophene,Two Insulator Layers,and a Metal Ink Gate

The mass production technique of gravure contact printing is used to fabricate state‐of‐the art polymer field‐effect transistors (FETs). Using plastic substrates with prepatterned indium tin oxide source and drain contacts as required for display applications, four different layers are sequentially gravure‐printed: the semiconductor poly(3‐hexylthiophene‐2,5‐diyl) (P3HT), two insulator layers, and an Ag gate. A crosslinkable insulator and an Ag ink are developed which are both printable and highly robust. Printing in ambient and using this bottom‐contact/top‐gate geometry, an on/off ratio of >10⁴ and a mobility of 0.04 cm² V^?1 s^?1 are achieved. This rivals the best top‐gate polymer FETs fabricated with these materials. Printing using low concentration, low viscosity ink formulations, and different P3HT molecular weights is demonstrated. The printing speed of 40 m min^?1 on a flexible polymer substrate demonstrates that very high‐volume, reel‐to‐reel production of organic electronic devices is possible.     

Implementation of Low‐Power Electronic Devices Using Solution‐Processed Tantalum Pentoxide Dielectric

The development of solution‐processed field effect transistors (FETs) based on organic and hybrid materials over the past two decades has demonstrated the incredible potential in these technologies. However, solution processed FETs generally require impracticably high voltages to switch on and off, which precludes their application in low‐power devices and prevent their integration with standard logic circuitry. Here, a universal and environmentally benign solution‐processing method for the preparation of Ta₂O₅, HfO₂ and ZrO₂ amorphous dielectric thin films is demonstrated. High mobility CdS FETs are fabricated on such high‐κ dielectric substrates entirely via solution‐processing. The highest mobility, 2.97 cm² V^?1 s^?1 is achieved in the device with Ta₂O₅ dielectric with a low threshold voltage of 1.00 V, which is higher than the mobility of the reference CdS FET with SiO₂ dielectric with an order of magnitude decrease in threshold voltage as well. Because these FETs can be operated at less than 5 V, they may potentially be integrated with existing logic and display circuitry without significant signal amplification. This report demonstrates high‐mobility FETs using solution‐processed Ta₂O₅ dielectrics with drastically reduced power consumption; ≈95% reduction compared to that of the device with a conventional SiO₂ gate dielectric.     

Non‐Lithographic Fabrication of All‐2D α‐MoTe2 Dual Gate Transistors

As one of the emerging new transition‐metal dichalcogenides materials, molybdenum ditelluride (α‐MoTe₂) is attracting much attention due to its optical and electrical properties. This study fabricates all‐2D MoTe₂‐based field effect transistors (FETs) on glass, using thin hexagonal boron nitride and thin graphene in consideration of good dielectric/channel interface and source/drain contacts, respectively. Distinguished from previous works, in this study, all 2D FETs with α‐MoTe₂ nanoflakes are dual‐gated for driving higher current. Moreover, for the present 2D dual gate FET fabrications on glass, all thermal annealing and lithography processes are intentionally exempted for fully non‐lithographic method using only van der Waal's forces. The dual‐gate MoTe₂ FET displays quite a high hole and electron mobility over ≈20 cm² V^?1 s^?1 along with ON/OFF ratio of ≈10⁵ in maximum as an ambipolar FET and also demonstrates high drain current of a few tens‐to‐hundred μA at a low operation voltage. It appears promising enough to drive organic light emitting diode pixels and NOR logic functions on glass.     

Transition Metal Dichalcogenide‐Based Transistor Circuits for Gray Scale Organic Light‐Emitting Displays

Two types of transition metal dichalcogenide (TMD) transistors are applied to demonstrate their possibility as switching/driving elements for the pixel of organic light‐emitting diode (OLED) display. Such TMD materials are 6 nm thin WSe₂ and MoS₂ as a p‐type and n‐type channel, respectively, and the pixel is thus composed of external green OLED and nanoscale thin channel field effect transistors (FETs) for switching and driving. The maximum mobility of WSe₂‐FETs either as switch or as driver is ≈30 cm² V^?1 s^?1, in linear regime of the gate voltage sweep range. Digital (ON/OFF‐switching) and gray‐scale analogue operations of OLED pixel are nicely demonstrated. MoS₂ nanosheet FET‐based pixel is also demonstrated, although limited to alternating gray scale operation of OLED. Device stability issue is still remaining for future study but TMD channel FETs are very promising and novel for their applications to OLED pixel because of their high mobility and I _D ON/OFF ratio.     

Organic Electronics: High Tg Cyclic Olefin Copolymer Gate Dielectrics for N,N′‐Ditridecyl Perylene Diimide Based Field‐Effect Transistors: Improving Performance and Stability with Thermal Treatment (Adv. Funct. Mater. 16/2010)

A novel application of ethylene‐norbornene cyclic olefin copolymers (COC) as gate dielectric layers in organic field‐effect transistors (OFETs) that require thermal annealing as a strategy for improving the OFET performance and stability is reported. The thermally‐treated N,N′‐ditridecyl perylene diimide (PTCDI‐C13)‐based n‐type FETs using a COC/SiO₂ gate dielectric show remarkably enhanced atmospheric performance and stability. The COC gate dielectric layer displays a hydrophobic surface (water contact angle = 95° ± 1°) and high thermal stability (glass transition temperature = 181 °C) without producing crosslinking. After thermal annealing, the crystallinity improves and the grain size of PTCDI‐C13 domains grown on the COC/SiO₂ gate dielectric increases significantly. The resulting n‐type FETs exhibit high atmospheric field‐effect mobilities, up to 0.90 cm² V^?1 s^?1 in the 20 V saturation regime and long‐term stability with respect to H₂O/O₂ degradation, hysteresis, or sweep‐stress over 110 days. By integrating the n‐type FETs with p‐type pentacene‐based FETs in a single device, high performance organic complementary inverters that exhibit high gain (exceeding 45 in ambient air) are realized.     

Metastable Copper‐Phthalocyanine Single‐Crystal Nanowires and Their Use in Fabricating High‐Performance Field‐Effect Transistors

This paper describes a simple, vapor‐phase route for the synthesis of metastable α‐phase copper‐phthalocyanine (CuPc) single‐crystal nanowires through control of the growth temperature. The influence of the growth temperature on the crystal structures, morphology, and size of the CuPc nanostructures is explored using X‐ray diffraction (XRD), optical absorption, and transmission electron microscopy (TEM). α‐CuPc nanowires are successfully incorporated as active semiconductors in field‐effect transistors (FETs). Single nanowire devices exhibit carrier mobilities and current on/off ratios as high as 0.4 cm² V^?1 s^?1 and >10⁴, respectively.     

Highly Stretchable,High‐Mobility,Free‐Standing All‐Organic Transistors Modulated by Solid‐State Elastomer Electrolytes

Highly stretchable, high‐mobility, and free‐standing coplanar‐type all‐organic transistors based on deformable solid‐state elastomer electrolytes are demonstrated using ionic thermoplastic polyurethane (i‐TPU), thereby showing high reliability under mechanical stimuli as well as low‐voltage operation. Unlike conventional ionic dielectrics, the i‐TPU electrolyte prepared herein has remarkable characteristics, i.e., a large specific capacitance of 5.5 µF cm^?2, despite the low weight ratio (20 wt%) of the ionic liquid, high transparency, and even stretchability. These i‐TPU‐based organic transistors exhibit a mobility as high as 7.9 cm² V^?1 s^?1, high bendability (R_c, radius of curvature: 7.2 mm), and good stretchability (60% tensile strain). Moreover, they are suitable for low‐voltage operation (V_DS = ?1.0 V, V_GS = ?2.5 V). In addition, the electrical characteristics such as mobility, on‐current, and threshold voltage are maintained even in the concave and convex bending state (bending tensile strain of ≈3.4%), respectively. Finally, free‐standing, fully stretchable, and semi‐transparent coplanar‐type all‐organic transistors can be fabricated by introducing a poly(3,4‐ethylenedioxythiophene):polystyrene sulfonic acid layer as source/drain and gate electrodes, thus achieving low‐voltage operation (V_DS = ?1.5 V, V_GS = ?2.5 V) and an even higher mobility of up to 17.8 cm² V^?1 s^?1. Moreover, these devices withstand stretching up to 80% tensile strain.     

High‐Performance,Air‐Stable,Top‐Gate,p‐Channel WSe2 Field‐Effect Transistor with Fluoropolymer Buffer Layer

High‐performance, air‐stable, p‐channel WSe₂ top‐gate field‐effect transistors (FETs) using a bilayer gate dielectric composed of high‐ and low‐k dielectrics are reported. Using only a high‐k Al₂O₃ as the top‐gate dielectric generally degrades the electrical properties of p‐channel WSe₂, therefore, a thin fluoropolymer (Cytop) as a buffer layer to protect the 2D channel from high‐k oxide forming is deposited. As a result, a top‐gate‐patterned 2D WSe₂ FET is realized. The top‐gate p‐channel WSe₂ FET demonstrates a high hole mobility of 100 cm²_­ V^?1 s^?1 and a I_ON/I_OFF ratio > 10⁷ at low gate voltages (V_GS ca. ?4 V) and a drain voltage (V_DS) of ?1 V on a glass substrate. Furthermore, the top‐gate FET shows a very good stability in ambient air with a relative humidity of 45% for 7 days after device fabrication. Our approach of creating a high‐k oxide/low‐k organic bilayer dielectric is advantageous over single‐layer high‐k dielectrics for top‐gate p‐channel WSe₂ FETs, which will lead the way toward future electronic nanodevices and their integration.     

Star‐Shaped Oligothiophenes for Solution‐Processible Organic Field‐Effect Transistors

We have designed and successfully synthesized star‐shaped oligothiophenes, which could be used as semiconducting materials for solution‐processible organic field‐effect transistors (FETs). By systematically changing the chemical structure of the star‐shaped oligothiophenes we obtained the structural requirements needed for making working FETs from them. UV‐vis fluorescence measurements showed that a molecule of the star‐shaped compounds under consideration is not a fully conjugated molecule, but it has three independently conjugated oligothienyl‐phenylene blocks. A possible scheme of molecular packing of the star‐shaped oligothiophenes in a lamellar structure was proposed and confirmed by atomic force microscopy (AFM) and X‐ray diffraction (XRD) measurements. Although the star‐shaped semiconductors show a somewhat lower mobility than their linear analogs, they possess better solubility and film‐forming properties, leading to improved spin‐coating processing. The best FETs were made by spin‐coating 1,3,5‐tris(5″‐decyl‐2,2′:5′,2″‐terthien‐5‐yl)benzene from a chloroform solution, which resulted in a mobility of 2 × 10^–4 cm² V ^–1s^–1, a 10² on/off ratio at gate voltages of 0 V and –20 V, and a threshold voltage close to 0 V.     

High Tg Cyclic Olefin Copolymer Gate Dielectrics for N,N′‐Ditridecyl Perylene Diimide Based Field‐Effect Transistors: Improving Performance and Stability with Thermal Treatment

A novel application of ethylene‐norbornene cyclic olefin copolymers (COC) as gate dielectric layers in organic field‐effect transistors (OFETs) that require thermal annealing as a strategy for improving the OFET performance and stability is reported. The thermally‐treated N,N′‐ditridecyl perylene diimide (PTCDI‐C13)‐based n‐type FETs using a COC/SiO₂ gate dielectric show remarkably enhanced atmospheric performance and stability. The COC gate dielectric layer displays a hydrophobic surface (water contact angle = 95° ± 1°) and high thermal stability (glass transition temperature = 181 °C) without producing crosslinking. After thermal annealing, the crystallinity improves and the grain size of PTCDI‐C13 domains grown on the COC/SiO₂ gate dielectric increases significantly. The resulting n‐type FETs exhibit high atmospheric field‐effect mobilities, up to 0.90 cm² V^?1 s^?1 in the 20 V saturation regime and long‐term stability with respect to H₂O/O₂ degradation, hysteresis, or sweep‐stress over 110 days. By integrating the n‐type FETs with p‐type pentacene‐based FETs in a single device, high performance organic complementary inverters that exhibit high gain (exceeding 45 in ambient air) are realized.     

Fully Transparent Non‐volatile Memory Thin‐Film Transistors Using an Organic Ferroelectric and Oxide Semiconductor Below 200 °C

A fully transparent non‐volatile memory thin‐film transistor (T‐MTFT) is demonstrated. The gate stack is composed of organic ferroelectric poly(vinylidene fluoride‐trifluoroethylene) [P(VDF‐TrFE)] and oxide semiconducting Al‐Zn‐Sn‐O (AZTO) layers, in which thin Al₂O₃ is introduced between two layers. All the fabrication processes are performed below 200 °C on the glass substrate. The transmittance of the fabricated device was more than 90% at the wavelength of 550 nm. The memory window obtained in the T‐MTFT was 7.5 V with a gate voltage sweep of ?10 to 10 V, and it was still 1.8 V even with a lower voltage sweep of ?6 to 6 V. The field‐effect mobility, subthreshold swing, on/off ratio, and gate leakage currents were obtained to be 32.2 cm² V^?1 s^?1, 0.45 V decade^?1, 10⁸, and 10^?13 A, respectively. All these characteristics correspond to the best performances among all types of non‐volatile memory transistors reported so far, although the programming speed and retention time should be more improved.     

High‐Transconductance Organic Thin‐Film Electrochemical Transistors for Driving Low‐Voltage Red‐Green‐Blue Active Matrix Organic Light‐Emitting Devices

Switching and control of efficient red, green, and blue active matrix organic light‐emitting devices (AMOLEDs) by printed organic thin‐film electrochemical transistors (OETs) are demonstrated. These all‐organic pixels are characterized by high luminance at low operating voltages and by extremely small transistor dimensions with respect to the OLED active area. A maximum brightness of ≈900 cd m^?2 is achieved at diode supply voltages near 4 V and pixel selector (gate) voltages below 1 V. The ratio of OLED to OET area is greater than 100:1 and the pixels may be switched at rates up to 100 Hz. Essential to this demonstration are the use of a high capacitance electrolyte as the gate dielectric layer in the OETs, which affords extremely large transistor transconductances, and novel graded emissive layer (G‐EML) OLED architectures that exhibit low turn‐on voltages and high luminescence efficiency. Collectively, these results suggest that printed OETs, combined with efficient, low voltage OLEDs, could be employed in the fabrication of flexible full‐color AMOLED displays.     

Fully Transparent p‐MoTe2 2D Transistors Using Ultrathin MoOx/Pt Contact Media for Indium‐Tin‐Oxide Source/Drain

Since transition metal dichalcogenide (TMD) semiconductors are found as 2D van der Waals materials with a discrete energy bandgap, many 2D‐like thin field effect transistors (FETs) and PN diodes are reported as prototype electrical and optoelectronic devices. As a potential application of display electronics, transparent 2D FET devices are also reported recently. Such transparent 2D FETs are very few in report, yet no p‐type channel 2D‐like FETs are seen. Here, 2D‐like thin transparent p‐channel MoTe₂ FETs with oxygen (O₂) plasma‐induced MoO_x/Pt/indium‐tin‐oxide (ITO) contact are reported for the first time. For source/drain contact, 60 s short O₂ plasma and ultrathin Pt‐deposition processes on MoTe₂ surface are sequentially introduced before ITO thin film deposition and patterning. As a result, almost transparent 2D FETs are obtained with a decent mobility of ≈5 cm² V^?1 s^?1, a high ON/OFF current ratio of ≈10⁵, and 70% transmittance. In particular, for normal MoTe₂ FETs without ITO, O₂ plasma process greatly improves the hole injection efficiency and device mobility (≈60 cm² V^?1 s^?1), introducing ultrathin MoO_x between Pt source/drain and MoTe₂. As a final device application, a photovoltaic current modulator, where the transparent FET stably operates as gated by photovoltaic effects, is integrated.     

Cellulose‐Based Ionogels for Paper Electronics

A new class of biofriendly ionogels produced by gelation of microcellulose thin films with tailored 1‐ethyl‐3‐methylimidazolium methylphosphonate ionic liquids are demonstrated. The cellulose ionogels show promising properties for application in flexible electronics, such as transparency, flexibility, transferability, and high specific capacitances of 5 to 15 μF cm^?2. They can be laminated onto any substrate such as multilayer‐coated paper and act as high capacitance dielectrics for inorganic (spray‐coated ZnO and colloidal ZnO nanorods) and organic (poly[3‐hexylthiophene], P3HT) electrolyte‐gated field‐effect transistors (FETs), that operate at very low voltages (<2 V). Field‐effect mobilities in ionogel‐gated spray‐coated ZnO FETs reach 75 cm² V^?1 s^?1 and a typical increase of mobility with decreasing specific capacitance of the ionogel is observed. Solution‐processed, colloidal ZnO nanorods and laminated cellulose ionogels enable the fabrication of the first electrolyte‐gated, flexible circuits on paper, which operate at bending radii down to 1.1 mm.     

Controlled Doping of Wafer‐Scale PtSe2 Films for Device Application

Semiconductive transition metal dichalcogenides (TMDs) have been considered as next generation semiconductors, but to date most device investigations are still based on microscale exfoliation with a low yield. Wafer scale growth of TMDs has been reported but effective doping approaches remain challenging due to their atomically thick nature. This work reports the synthesis of wafer‐scale continuous few‐layer PtSe₂ films with effective doping in a controllable manner. Chemical component analyses confirm that both n‐doping and p‐doping can be effectively modulated through a controlled selenization process. The electrical properties of PtSe₂ films have been systematically studied by fabricating top‐gated field effect transistors (FETs). The device current on/off ratio is optimized in two‐layer PtSe₂ FETs, and four‐terminal configuration displays a reasonably high effective field effect mobility (14 and 15 cm² V^?1 s^?1 for p‐type and n‐type FETs, respectively) with a nearly symmetric p‐type and n‐type performance. Temperature dependent measurement reveals that the variable range hopping is dominant at low temperatures. To further establish feasible application based on controllable doping of PtSe₂, a logic inverter and vertically stacked p–n junction arrays are demonstrated. These results validate that PtSe₂ is a promising candidate among the family of TMDs for future functional electronic applications.     

Large‐Area Schottky Barrier Transistors Based on Vertically Stacked Graphene–Metal Oxide Heterostructures

The fabrication of all‐transparent flexible vertical Schottky barrier (SB) transistors and logic gates based on graphene–metal oxide–metal heterostructures and ion gel gate dielectrics is demonstrated. The vertical SB transistor structure is formed by (i) vertically sandwiching a solution‐processed indium‐gallium‐zinc‐oxide (IGZO) semiconductor layer between graphene (source) and metallic (drain) electrodes and (ii) employing a separate coplanar gate electrode bridged with a vertical channel through an ion gel. The channel current is modulated by tuning the Schottky barrier height across the graphene–IGZO junction under an applied external gate bias. The ion gel gate dielectric with high specific capacitance enables modulation of the Schottky barrier height at the graphene–IGZO junction over 0.87 eV using a voltage below 2 V. The resulting vertical devices show high current densities (18.9 A cm^?2) and on–off current ratios (>10⁴) at low voltages. The simple structure of the unit transistor enables the successful fabrication of low‐power logic gates based on device assemblies, such as the NOT, NAND, and NOR gates, prepared on a flexible substrate. The facile, large‐area, and room‐temperature deposition of both semiconducting metal oxide and gate insulators integrates with transparent and flexible graphene opens up new opportunities for realizing graphene‐based future electronics.     

Single‐Crystalline p‐Type Zn3As2 Nanowires for Field‐Effect Transistors and Visible‐Light Photodetectors on Rigid and Flexible Substrates

Zn₃As₂ is an important p‐type semiconductor with the merit of high effective mobility. The synthesis of single‐crystalline Zn₃As₂ nanowires (NWs) via a simple chemical vapor deposition method is reported. High‐performance single Zn₃As₂ NW field‐effect transistors (FETs) on rigid SiO₂/Si substrates and visible‐light photodetectors on rigid and flexible substrates are fabricated and studied. As‐fabricated single‐NW FETs exhibit typical p‐type transistor characteristics with the features of high mobility (305.5 cm² V^?1 s^?1) and a high I_on/I_off ratio (10⁵). Single‐NW photodetectors on SiO₂/Si substrate show good sensitivity to visible light. Using the contact printing process, large‐scale ordered Zn₃As₂ NW arrays are successfully assembled on SiO₂/Si substrate to prepare NW thin‐film transistors and photodetectors. The NW‐array photodetectors on rigid SiO₂/Si substrate and flexible PET substrate exhibit enhanced optoelectronic performance compared with the single‐NW devices. The results reveal that the p‐type Zn₃As₂ NWs have important applications in future electronic and optoelectronic devices.     

High‐Mobility and Low Turn‐On Voltage n‐Channel OTFTs Based on a Solution‐Processable Derivative of Naphthalene Bisimide

In organic electronics solution‐processable n‐channel field‐effect transistors (FETs) matching the parameters of the best p‐channel FETs are needed. Progress toward the fabrication of such devices is strongly impeded by a limited number of suitable organic semiconductors as well as by the lack of processing techniques that enable strict control of the supramolecular organization in the deposited layer. Here, the use of N,N′‐bis(4‐n‐butylphenyl)‐1,4,5,8‐naphthalenetetracarboxylic‐1,4:5,8‐bisimide (NBI‐4‐n‐BuPh) for fabrication of n‐channel FETs is described. The unidirectionally oriented crystalline layers of NBI‐4‐n‐BuPh are obtained by the zone‐casting method under ambient conditions. Due to the bottom‐contact, top‐gate configuration used, the gate dielectric, Parylene C, also acts as a protective layer. This, together with a sufficiently low LUMO level of NBI‐4‐n‐BuPh allows the fabrication and operation of these novel n‐channel transistors under ambient conditions. The high order of the NBI‐4‐n‐BuPh molecules in the zone‐cast layer and high purity of the gate dielectric yield good performance of the transistors.     

Contact-Barrier Free,High Mobility,Dual-Gated Junctionless Transistor Using Tellurium Nanowire

The gate-all-around nanowire transistor, due to its extremely tight electrostatic control and vertical integration capability, is a highly promising candidate for sub-5 nm technology nodes. In particular, the junctionless nanowire transistors are highly scalable with reduced variability due to avoidance of steep source/drain junction formation by ion implantation. Here a dual-gated junctionless nanowire p-type field effect transistor is demonstrated using tellurium nanowire as the channel. The dangling-bond-free surface due to the unique helical crystal structure of the nanowire, coupled with an integration of dangling-bond-free, high quality hBN gate dielectric, allows for a phonon-limited field effect hole mobility of 570 cm² V⁻¹ s⁻¹ at 270 K, which is well above state-of-the-art strained Si hole mobility. By lowering the temperature, the mobility increases to 1390 cm² V⁻¹ s⁻¹ and becomes primarily limited by Coulomb scattering. The combination of an electron affinity of ≈ 4 eV and a small bandgap of tellurium provides zero Schottky barrier height for hole injection at the metal-contact interface, which is remarkable for reduction of contact resistance in a highly scaled transistor. Exploiting these properties, coupled with the dual-gated operation, we achieve a high drive current of 216 μA μm⁻¹ while maintaining an on-off ratio in excess of 2 × 10⁴. The findings have intriguing prospects for alternate channel material based next-generation electronics.