| 基于CPLD的编码器倍频鉴相计数电路设计 |
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| 引用本文： | 马志建,戴炬,张峰,张田田.基于CPLD的编码器倍频鉴相计数电路设计[J].仪器仪表用户,2009,16(4):82-84. |
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| 作者姓名： | 马志建 戴炬 张峰 张田田 |
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| 作者单位： | 山东科技大学,信息与电气工程学院,山东青岛,266510 |
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| 摘 要： | 本文基于CPLD,设计了一种针对增量式光电编码器的倍频鉴相计数电路。在介绍了倍频、鉴相、计数原理的基础上。使用VHDL语言实现了对编码器脉冲的采集。
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| 关 键 词： | 倍频 鉴相 计数 增量式光电编码器 CPLD |
Design of the circuit of quadruple frequency phase discrimination and counting for encoder based on CPLD |
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| MA Zhi-jian,DAI Ju,ZHANG Feng,ZHANG Tian-tian.Design of the circuit of quadruple frequency phase discrimination and counting for encoder based on CPLD[J].Electronic Instrumentation Customer,2009,16(4):82-84. |
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| Authors: | MA Zhi-jian DAI Ju ZHANG Feng ZHANG Tian-tian |
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| Affiliation: | College of Info and Electric Eng;SDUST;Qingdao 266510;China |
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| Abstract: | In this paper,we design the circuit of quadruple frequency,phase discrimination and counting pulse for incremental encoder based on CPLD.On the base of introducing the theory about quadruple frequency,phase discrimination and counting pulse,we realize the acquisition of encoder using VHDL language. |
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| Keywords: | CPLD |
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