线阵CCD驱动时序及信号采集系统的设计

文中设计介绍了一种基于FPGA和ARM的线阵CCD传感器驱动时序和信号采集的实现方法。该系统通过分析TCD1707D线阵CCD的驱动时序,采用Verilog HDL硬件描述语言设计出驱动脉冲电路。CCD正常工作后,产生的模拟信号经过预处理和高速A/D转换送入FPGA的基本宏功能模块FIFO(先进先出数据缓存器),通过异步缓存实现ARM处理器对采集信号的主控及后续应用。线阵CCD驱动时序及信号采集系统,是基于CCD传感器图像处理系统的重要组成部分,经过上位测试平台验证,能够提供准确的数字图像信号。

Design of Linear CCD Driving Generator and Signal Acquisition System

This paper introduced an implement way of linear CCD sensor driving generator and signal acquisition based on FP-GA and ARM.By analyzing the driving generator of TCD1707D,the system applied Verilog HDL to design circuits of driving pulse.After being in operation,the analog signals of CCD were transmitted into the FIFO module of FPGA through the pre-pro-cessing and the high-speed A/D conversion.By using asynchronous cache,the master control and follow-up application of signal for ARM was implemented.Linear CCD driving generator and signal acquisition system is a very important part of the image pro-cessing system based on CCD sensor.Pass through the testing and verifying of the host testing platform,it Call provide the accurate digital image signal.