FPGA动态部分可重构技术概述

可重构计算是一种新的计算结构，它将通用处理器和专用集成电路的优点结合起来，具有灵活、高效的特点。FPGA的动态部分可重构是指在系统运行中对FPGA的部分逻辑资源实现动态的功能变换，从而提高数字系统集成度、增强灵活性、提升容错能力，同时降低成本和功耗。本文主要介绍FPGA动态部分可重构的原理以及实现动态部分可重构的方法，并着重分析4种常用的实现方法；介绍FPGA动态部分可重构技术目前在国内外的最新发展和应用；对FPGA动态部分可重构的未来研究发展方向做简单介绍。 

A Summarization of Dynamic Partial Reconfiguration Based on FPGA

The reconfigurable computing is a new computing architecture, which combines the advantages of general purpose processor and application specific integrated circuit. It is of flexibility and high-performance. The dynamic partial reconfiguration of FPGA allows on-the-fly dynamic reconfiguration of part of the logic resources in FPGA to finish the function transformation. Therefore, it can improve the integrations and flexibility and the tolerance of error of the system. Additionally, it can reduce the cost and the power consumption of the system. This paper presents the theory of dynamic partial reconfiguration of FPGA. Then the paper introduces the implementations of dynamic reconfiguration and analyzes four kinds of the most common ways in details. It also presents the latest development and applications of dynamic partial reconfiguration. At last the future work and study directions of dynamic partial reconfiguration of FPGA are presented. 