Load-Balancing in Multistage Interconnection Networks under Multiple-Pass Routing

Multistage interconnection networks (MINs) have been widely used in multiprocessor systems, and recently they have been adopted as a way to construct ATM switches for broadband networks. In such systems, the fault-tolerant ability is an important issue. Many researchers have proposed ways to enhance the reliability of MINs, among them a low-cost and efficient way is to use multipass routing schemes in MINs in which thedynamic full access(DFA) property exists. The performance of multipass routing, however, has been largely ignored by researchers in the past. In this paper, we show that multipass routing may degrade the system performance if the communication loads are not well balanced among processors; congestion may appear in some processors and the useful communication bandwidth is badly affected. We propose methods to design DFA routing schemes that are load-balanced and thus can utilize system resources (i.e., the bandwidth) more efficiently.