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基于国产CPU的并行冗余计算机系统研究
引用本文:黄晨,汪文明,张义超,岳玮.基于国产CPU的并行冗余计算机系统研究[J].计算机测量与控制,2017,25(7):257-259.
作者姓名:黄晨  汪文明  张义超  岳玮
作者单位:北京宇航系统工程研究所,北京 100076,北京宇航系统工程研究所,北京 100076,北京宇航系统工程研究所,北京 100076,北京宇航系统工程研究所,北京 100076
摘    要:目前国家不断推进的国产自主可控信息系统建设,其核心国产计算机系统由于技术成熟度低、市场推广晚等原因,暴露出可靠性低、稳定性差的问题,直接导致系统功能无法成功应用;围绕国产化计算机系统的并行冗余架构开展研究,通过计算机系统架构的软硬件设计,以及高速缓存一致性架构、高速互联总线和三状态转换机制方法的应用,基于国产CPU 并行冗余计算机系统,可以有效消除备份计算机系统进行当班切换时,存在的切换时间延时和切换过程数据丢失的问题;通过试验验证,该系统可以完成计算机系统中CPU处理器和功能桥片故障模式的容错处理,并保障信息数据的完整性和实时性,有效提高设备中计算机系统的工作可靠性与稳定性。

关 键 词:并行冗余计算机系统    HyperTransport总线  高速缓存一致性协议
收稿时间:2017/2/13 0:00:00
修稿时间:2017/3/31 0:00:00

Research of Parallel Redundant Computer System Based on Domestic CPU
Huang Chen,Wang Wenming,Zhang Yichao and Yue Wei.Research of Parallel Redundant Computer System Based on Domestic CPU[J].Computer Measurement & Control,2017,25(7):257-259.
Authors:Huang Chen  Wang Wenming  Zhang Yichao and Yue Wei
Affiliation:BeiJing Institute of Aerospace Systems Engineering,Beijing 100076,China,BeiJing Institute of Aerospace Systems Engineering,Beijing 100076,China,BeiJing Institute of Aerospace Systems Engineering,Beijing 100076,China and BeiJing Institute of Aerospace Systems Engineering,Beijing 100076,China
Abstract:The construction of the domestic information system at present the country continues to advance, the core of the domestic computer system due to the low degree of technological maturity, market promotion and other reasons later exposed, low reliability, poor stability, led directly to the system function cannot be successfully applied. The parallel redundant architecture research on localization of computer system, the hardware and software design of computer system architecture, application and conversion mechanism method of cache coherence architecture, high-speed interconnection bus and three state, domestic CPU parallel computer system based on redundancy, can effectively eliminate the backup computer system on duty when switching the switch time delay the problem of data loss and switching process. Through the test, the system can complete the fault-tolerant computer system of CPU processor and the function of bridge chip fault modes, and ensure the completeness and timeliness of information data, effectively improving the working reliability and stability of the computer system in equipment.
Keywords:parallel redundant computer system  HyperTransport bus  cache coherent protocol
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