基于FPGA的RC4加密算法设计及实现

针对通信安全问题，采用自顶向下的设计方法，设计了一种RC4算法基于FPGA的实现方式，实现了通信数据的加密传输。根据RC4加密算法的原理和设计流程，使用Verilog HDL编程语言，采用有限状态机（FSM）的编程方式实现算法，通过Modelsim SE 10.1a仿真软件进行仿真，并在FPGA开发板上进行验证。采用本文提出的FPGA设计方法实现的RC4加密算法相比软件加密方式和已有的FPGA实现方式速度有明显提高。

Design and achieve of FPGA-based RC4 encryption algorithm

According to the communication security problem, proposes a top-down design method of Top-Down FPGA RC4, hardware encryption method based on the realization of data encryption communication, this paper introduces the principle and design process of the RC4 encryption algorithm, using Verilog HDL programming language, using finite state machine(FSM) programming algorithm is simulated by Modelsim SE 10.1a the simulation software, and verified in the FPGA version of the development. The encryption algorithm FPGA encryption software design compared to the rate increased significantly, compared to other hardware encryption clock was significantly reduced.